Add code to identify D0 stepping ValleyView SoC.
[mirror_edk2.git] / Vlv2TbltDevicePkg / Library / PchPlatformLib / PchPlatformLibrary.c
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1/**\r
2\r
3Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved\r
4 \r\r
5 This program and the accompanying materials are licensed and made available under\r\r
6 the terms and conditions of the BSD License that accompanies this distribution. \r\r
7 The full text of the license may be found at \r\r
8 http://opensource.org/licenses/bsd-license.php. \r\r
9 \r\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r
12 \r\r
13\r
14 @file\r
15 PchPlatformLib.c\r
16\r
17 @brief\r
18 PCH Platform Lib implementation.\r
19\r
20**/\r
21\r
22#include "PchPlatformLibrary.h"\r
23\r
24//\r
25// Silicon Steppings\r
26//\r
27/**\r
28 Return Pch stepping type\r
29\r
30 @param[in] None\r
31\r
32 @retval PCH_STEPPING Pch stepping type\r
33\r
34**/\r
35PCH_STEPPING\r
36EFIAPI\r
37PchStepping (\r
38 VOID\r
39 )\r
40{\r
41 UINT8 RevId;\r
42\r
43 RevId = MmioRead8 (\r
44 MmPciAddress (0,\r
45 DEFAULT_PCI_BUS_NUMBER_PCH,\r
46 PCI_DEVICE_NUMBER_PCH_LPC,\r
47 PCI_FUNCTION_NUMBER_PCH_LPC,\r
48 R_PCH_LPC_RID_CC)\r
49 );\r
50\r
51 switch (RevId) {\r
52 case V_PCH_LPC_RID_0:\r
53 case V_PCH_LPC_RID_1:\r
54 return PchA0;\r
55 break;\r
56\r
57 case V_PCH_LPC_RID_2:\r
58 case V_PCH_LPC_RID_3:\r
59 return PchA1;\r
60 break;\r
61\r
62 case V_PCH_LPC_RID_4:\r
63 case V_PCH_LPC_RID_5:\r
64 return PchB0;\r
65 break;\r
66\r
67 case V_PCH_LPC_RID_6:\r
68 case V_PCH_LPC_RID_7:\r
69 return PchB1;\r
70 break;\r
71\r
72 case V_PCH_LPC_RID_8:\r
73 case V_PCH_LPC_RID_9:\r
74 return PchB2;\r
75 break;\r
76\r
77 case V_PCH_LPC_RID_A:\r
78 case V_PCH_LPC_RID_B:\r
79 return PchB3;\r
80 break;\r
81\r
82 case V_PCH_LPC_RID_C:\r
83 case V_PCH_LPC_RID_D:\r
84 return PchC0;\r
85 break;\r
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86 \r
87 case V_PCH_LPC_RID_E:\r
88 case V_PCH_LPC_RID_F:\r
89 return PchD0;\r
90 break;\r
91 \r
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92 default:\r
93 return PchSteppingMax;\r
94 break;\r
95\r
96 }\r
97}\r
98\r
99/**\r
100 Determine if PCH is supported\r
101\r
102 @param[in] None\r
103\r
104 @retval TRUE PCH is supported\r
105 @retval FALSE PCH is not supported\r
106\r
107**/\r
108BOOLEAN\r
109IsPchSupported (\r
110 VOID\r
111 )\r
112{\r
113 UINT32 Identifiers;\r
114 UINT16 PcuVendorId;\r
115 UINT16 PcuDeviceId;\r
116\r
117 Identifiers = MmioRead32 (\r
118 MmPciAddress (0,\r
119 DEFAULT_PCI_BUS_NUMBER_PCH,\r
120 PCI_DEVICE_NUMBER_PCH_LPC,\r
121 PCI_FUNCTION_NUMBER_PCH_LPC,\r
122 R_PCH_LPC_REG_ID)\r
123 );\r
124\r
125 PcuDeviceId = (UINT16) ((Identifiers & B_PCH_LPC_DEVICE_ID) >> 16);\r
126 PcuVendorId = (UINT16) (Identifiers & B_PCH_LPC_VENDOR_ID);\r
127\r
128 //\r
129 // Verify that this is a supported chipset\r
130 //\r
131 if (PcuVendorId != (UINT16) V_PCH_LPC_VENDOR_ID || !IS_PCH_VLV_LPC_DEVICE_ID (PcuDeviceId)) {\r
132 DEBUG ((EFI_D_ERROR, "VLV SC code doesn't support the PcuDeviceId: 0x%04x!\n", PcuDeviceId));\r
133 return FALSE;\r
134 }\r
135 return TRUE;\r
136}\r