Vlv2DeviceRefCodePkg&Vlv2TbltDevicePkg:Add setup option of LPE Audio.
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformDxe / PlatformDxe.inf
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1#/*++\r
2#\r
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3# Copyright (c) 1999 - 2015, Intel Corporation. All rights reserved\r
4# \r
5# This program and the accompanying materials are licensed and made available under\r
6# the terms and conditions of the BSD License that accompanies this distribution. \r
7# The full text of the license may be found at \r
8# http://opensource.org/licenses/bsd-license.php. \r
9# \r
10# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
11# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
12# \r
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13#\r
14# Module Name:\r
15#\r
16# PlatformBB.inf\r
17#\r
18# Abstract:\r
19#\r
20# Component description file for platform DXE driver\r
21# ------------------------------------------------------------------------------\r
22# Rev Date<MM/DD/YYYY> Name Description\r
23# ------------------------------------------------------------------------------\r
24# R01 <04/22/2011> LB Update code for SIO83627UHG support.\r
25# ------------------------------------------------------------------------------\r
26#\r
27#--*/\r
28\r
29[defines]\r
30 INF_VERSION = 0x00010005\r
31 BASE_NAME = PlatformDxe\r
32 FILE_GUID = 056E7324-A718-465b-9A84-228F06642B4F\r
33 MODULE_TYPE = DXE_DRIVER\r
34 VERSION_STRING = 1.0\r
35 PI_SPECIFICATION_VERSION = 0x0001000A\r
36 ENTRY_POINT = InitializePlatform\r
37\r
38[sources.common]\r
39 BoardId.c\r
40 BoardIdDecode.c\r
41 ClockControl.c\r
42 Platform.c\r
43 IchRegTable.c\r
44 IdccInfo.c\r
45 SioPlatformPolicy.c\r
46 IchPlatformPolicy.c\r
47 PciDevice.c\r
48 SlotConfig.c\r
49 IchTcoReset.c\r
50 SensorVar.c\r
51 LegacySpeaker.c\r
52 Observable/Observable.c\r
53 ExI.c\r
d71c25cf 54 Rtc.c\r
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55\r
56[Packages]\r
57 MdePkg/MdePkg.dec\r
58 MdeModulePkg/MdeModulePkg.dec\r
59 IntelFrameworkPkg/IntelFrameworkPkg.dec\r
60 IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec\r
61 Vlv2TbltDevicePkg/PlatformPkg.dec\r
62 Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec\r
63 SecurityPkg/SecurityPkg.dec\r
64 CryptoPkg/CryptoPkg.dec\r
fb1a4e36 65 IntelFspWrapperPkg/IntelFspWrapperPkg.dec\r
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66\r
67[LibraryClasses]\r
68 BaseLib\r
69 BaseMemoryLib\r
70 MemoryAllocationLib\r
71 UefiBootServicesTableLib\r
72 UefiDriverEntryPoint\r
73 UefiRuntimeServicesTableLib\r
74 DxeServicesTableLib\r
75 PchPlatformLib\r
76\r
77 DebugLib\r
78 HiiLib\r
79 PrintLib\r
80 UefiLib\r
81 S3BootScriptLib\r
82 ReportStatusCodeLib\r
83 EfiRegTableLib\r
84 BiosIdLib\r
85 BaseCryptLib\r
86\r
87[Guids]\r
88 gEfiBiosIdGuid\r
89 gEfiPlatformBootModeGuid\r
90 gEfiBoardFeaturesGuid\r
91 gItkDataVarGuid\r
92 gDmiDataGuid\r
93 gIdccDataHubGuid\r
94 gEfiPciLanInfoGuid\r
95 gEfiNormalSetupGuid\r
96 gEfiGlobalVariableGuid\r
97 gEfiEventExitBootServicesGuid\r
98 gEfiVlv2VariableGuid\r
99 gEfiSecureBootEnableDisableGuid\r
100\r
101[Protocols]\r
102 gEfiPciRootBridgeIoProtocolGuid # CONSUMES ## GUID\r
103 gEfiVariableArchProtocolGuid\r
104 gEfiVariableWriteArchProtocolGuid\r
105 gEfiHiiConfigAccessProtocolGuid\r
106 gEfiBootScriptSaveProtocolGuid\r
107 gEfiCpuIoProtocolGuid\r
108 gEfiDevicePathProtocolGuid\r
109 gEfiDiskInfoProtocolGuid\r
110 gEfiPs2PolicyProtocolGuid\r
111 gEfiIsaAcpiProtocolGuid\r
112 gEfiDataHubProtocolGuid\r
113 gEfiPciIoProtocolGuid\r
114 gDxePchPlatformPolicyProtocolGuid\r
115 gEfiTpmMpDriverProtocolGuid\r
116 gEfiLpcWpce791PolicyProtocolGuid\r
117 gUsbPolicyGuid\r
118 gEfiSpeakerInterfaceProtocolGuid\r
119 gDxeVlvPlatformPolicyGuid\r
120 gEfiSmbiosSlotPopulationGuid\r
121 gObservableProtocolGuid\r
122 gEfiCk505ClockPlatformInfoGuid\r
123 gEfiLpcWpc83627PolicyProtocolGuid\r
124 gEfiTcoResetProtocolGuid\r
125 gEfiWatchdogTimerDriverProtocolGuid\r
126 gEfiPlatformIdeInitProtocolGuid\r
127 gEfiGlobalNvsAreaProtocolGuid\r
128 gEfiCpuIo2ProtocolGuid\r
129 gIgdOpRegionProtocolGuid\r
d71c25cf 130 gExitPmAuthProtocolGuid\r
620f2891 131 gEdkiiVariableLockProtocolGuid\r
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132\r
133[Pcd.common]\r
134 gPlatformModuleTokenSpaceGuid.PcdPBTNDisableInterval\r
135 gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress\r
136 gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress\r
137 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress\r
fb1a4e36 138 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize\r
3cbfba02 139 gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdFastPS2Detection\r
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140 gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase\r
141 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase\r
142 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize\r
143 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase\r
144 \r
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145\r
146[Depex]\r
147 gEfiPciRootBridgeIoProtocolGuid AND\r
148 gEfiVariableArchProtocolGuid AND\r
149 gEfiVariableWriteArchProtocolGuid AND\r
150 gEfiBootScriptSaveProtocolGuid AND\r
151 gEfiCpuIoProtocolGuid AND\r
152 gDxePchPlatformPolicyProtocolGuid AND\r
153 gEfiGlobalNvsAreaProtocolGuid\r
154\r
155\r