Vlv2TbltDevicePkg: Use DpDynamicCommand to replace PerformancePkg/dp
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkg.fdf
CommitLineData
5e752084 1#/** @file\r
2# FDF file of Platform.\r
3#\r
7a0e4f8e 4# Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>\r
5e752084 5#\r
6# This program and the accompanying materials are licensed and made available under\r
7# the terms and conditions of the BSD License that accompanies this distribution.\r
8# The full text of the license may be found at\r
9# http://opensource.org/licenses/bsd-license.php.\r
10#\r
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13#\r
14#\r
15#**/\r
16\r
17[Defines]\r
18DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.\r
19DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.\r
20DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.\r
21DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.\r
22DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000\r
23DEFINE FLASH_AREA_SIZE = 0x00800000\r
24\r
25DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000\r
26DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000\r
27DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000\r
28\r
988715a3 29DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000\r
5e752084 30DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000\r
31\r
988715a3 32DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000\r
5e752084 33DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000\r
34\r
35\r
988715a3 36DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000\r
5e752084 37DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000\r
38\r
39!if $(MINNOW2_FSP_BUILD) == TRUE\r
988715a3 40DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000\r
5e752084 41DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000\r
988715a3 42DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000\r
5e752084 43\r
988715a3 44DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000\r
5e752084 45DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000\r
988715a3 46DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000\r
5e752084 47\r
48!endif\r
49\r
988715a3 50DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000\r
51DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00210000\r
5e752084 52\r
988715a3 53DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00320000\r
54DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x00070000\r
5e752084 55\r
988715a3 56DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000\r
57DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000\r
5e752084 58\r
59################################################################################\r
60#\r
61# FD Section\r
62# The [FD] Section is made up of the definition statements and a\r
63# description of what goes into the Flash Device Image. Each FD section\r
64# defines one flash "device" image. A flash device image may be one of\r
65# the following: Removable media bootable image (like a boot floppy\r
66# image,) an Option ROM image (that would be "flashed" into an add-in\r
67# card,) a System "Flash" image (that would be burned into a system's\r
68# flash) or an Update ("Capsule") image that will be used to update and\r
69# existing system flash.\r
70#\r
71################################################################################\r
72[FD.Vlv]\r
73BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.\r
74Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.\r
75ErasePolarity = 1\r
76BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.\r
77NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.\r
78\r
79#\r
80#Flash location override based on actual flash map\r
81#\r
82SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)\r
83SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)\r
84\r
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85SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60\r
86SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60\r
87\r
5e752084 88!if $(MINNOW2_FSP_BUILD) == TRUE\r
89# put below PCD value setting into dsc file\r
90#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)\r
91#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)\r
92#SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60\r
93#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)\r
94#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)\r
95#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)\r
96#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)\r
97\r
98!endif\r
99################################################################################\r
100#\r
101# Following are lists of FD Region layout which correspond to the locations of different\r
102# images within the flash device.\r
103#\r
104# Regions must be defined in ascending order and may not overlap.\r
105#\r
106# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
107# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
108# "0x" characters. Like:\r
109# Offset|Size\r
110# PcdOffsetCName|PcdSizeCName\r
111# RegionType <FV, DATA, or FILE>\r
112# Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000\r
113#\r
114################################################################################\r
115 #\r
116 # CPU Microcodes\r
117 #\r
118\r
119$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)\r
120gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize\r
121FV = MICROCODE_FV\r
122$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)\r
123gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
124#NV_VARIABLE_STORE\r
125DATA = {\r
126 ## This is the EFI_FIRMWARE_VOLUME_HEADER\r
127 # ZeroVector []\r
128 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
129 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
130 # FileSystemGuid: gEfiSystemNvDataFvGuid =\r
131 # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}\r
132 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,\r
133 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,\r
134 # FvLength: 0x80000\r
135 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,\r
136 #Signature "_FVH" #Attributes\r
137 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,\r
138 #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision\r
139 0x48, 0x00, 0x2A, 0x09, 0x00, 0x00, 0x00, 0x02,\r
140 #Blockmap[0]: 7 Blocks * 0x10000 Bytes / Block\r
141 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,\r
142 #Blockmap[1]: End\r
143 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
144 ## This is the VARIABLE_STORE_HEADER\r
145!if $(SECURE_BOOT_ENABLE) == TRUE\r
146 #Signature: gEfiAuthenticatedVariableGuid =\r
147 # { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}\r
148 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,\r
149 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,\r
150!else\r
151 #Signature: gEfiVariableGuid =\r
152 # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}\r
153 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,\r
154 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,\r
155!endif\r
156 #Size: 0x3E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x03DFB8\r
157 # This can speed up the Variable Dispatch a bit.\r
158 0xB8, 0xDF, 0x03, 0x00,\r
159 #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32\r
160 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
161}\r
162\r
163\r
164$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)\r
165gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\r
166#NV_FTW_WORKING\r
167DATA = {\r
168 # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =\r
169 # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}\r
170 0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,\r
171 0xA0, 0xCE, 0x65, 0x0, 0xFD, 0x9F, 0x1B, 0x95,\r
172\r
173 # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved\r
174 0xE2, 0x33, 0xF2, 0x3, 0xFE, 0xFF, 0xFF, 0xFF,\r
175 # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0\r
176 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
177}\r
178\r
179$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)\r
180gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
181\r
182!if $(MINNOW2_FSP_BUILD) == TRUE\r
183\r
184 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)\r
185 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize\r
186 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin\r
187\r
188\r
189 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)\r
190 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin\r
191\r
192!endif\r
193\r
194 #\r
195 # Main Block\r
196 #\r
197$(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)\r
198gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize\r
199FV = FVMAIN_COMPACT\r
200\r
201 #\r
202 # FV Recovery#2\r
203 #\r
204$(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)\r
205gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size\r
206FV = FVRECOVERY2\r
207\r
208 #\r
209 # FV Recovery\r
210 #\r
211$(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)\r
212gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize\r
213FV = FVRECOVERY\r
214\r
215################################################################################\r
216#\r
217# FV Section\r
218#\r
219# [FV] section is used to define what components or modules are placed within a flash\r
220# device file. This section also defines order the components and modules are positioned\r
221# within the image. The [FV] section consists of define statements, set statements and\r
222# module statements.\r
223#\r
224################################################################################\r
225[FV.MICROCODE_FV]\r
226BlockSize = $(FLASH_BLOCK_SIZE)\r
227FvAlignment = 16\r
228ERASE_POLARITY = 1\r
229MEMORY_MAPPED = TRUE\r
230STICKY_WRITE = TRUE\r
231LOCK_CAP = TRUE\r
232LOCK_STATUS = FALSE\r
233WRITE_DISABLED_CAP = TRUE\r
234WRITE_ENABLED_CAP = TRUE\r
235WRITE_STATUS = TRUE\r
236WRITE_LOCK_CAP = TRUE\r
237WRITE_LOCK_STATUS = TRUE\r
238READ_DISABLED_CAP = TRUE\r
239READ_ENABLED_CAP = TRUE\r
240READ_STATUS = TRUE\r
241READ_LOCK_CAP = TRUE\r
242READ_LOCK_STATUS = TRUE\r
243\r
244FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {\r
245 $(OUTPUT_DIRECTORY)\$(TARGET)_$(TOOL_CHAIN_TAG)\$(DXE_ARCHITECTURE)\MicrocodeUpdates.bin\r
246}\r
247\r
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248!if $(RECOVERY_ENABLE)\r
249[FV.FVRECOVERY_COMPONENTS]\r
250FvAlignment = 16 #FV alignment and FV attributes setting.\r
251ERASE_POLARITY = 1\r
252MEMORY_MAPPED = TRUE\r
253STICKY_WRITE = TRUE\r
254LOCK_CAP = TRUE\r
255LOCK_STATUS = TRUE\r
256WRITE_DISABLED_CAP = TRUE\r
257WRITE_ENABLED_CAP = TRUE\r
258WRITE_STATUS = TRUE\r
259WRITE_LOCK_CAP = TRUE\r
260WRITE_LOCK_STATUS = TRUE\r
261READ_DISABLED_CAP = TRUE\r
262READ_ENABLED_CAP = TRUE\r
263READ_STATUS = TRUE\r
264READ_LOCK_CAP = TRUE\r
265READ_LOCK_STATUS = TRUE\r
266\r
267INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf\r
268INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf\r
269INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf\r
270INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf\r
271INF FatPkg/FatPei/FatPei.inf\r
272INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf\r
273INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf\r
274!endif\r
275\r
5e752084 276################################################################################\r
277#\r
278# FV Section\r
279#\r
280# [FV] section is used to define what components or modules are placed within a flash\r
281# device file. This section also defines order the components and modules are positioned\r
282# within the image. The [FV] section consists of define statements, set statements and\r
283# module statements.\r
284#\r
285################################################################################\r
286[FV.FVRECOVERY2]\r
287BlockSize = $(FLASH_BLOCK_SIZE)\r
288FvAlignment = 16 #FV alignment and FV attributes setting.\r
289ERASE_POLARITY = 1\r
290MEMORY_MAPPED = TRUE\r
291STICKY_WRITE = TRUE\r
292LOCK_CAP = TRUE\r
293LOCK_STATUS = TRUE\r
294WRITE_DISABLED_CAP = TRUE\r
295WRITE_ENABLED_CAP = TRUE\r
296WRITE_STATUS = TRUE\r
297WRITE_LOCK_CAP = TRUE\r
298WRITE_LOCK_STATUS = TRUE\r
299READ_DISABLED_CAP = TRUE\r
300READ_ENABLED_CAP = TRUE\r
301READ_STATUS = TRUE\r
302READ_LOCK_CAP = TRUE\r
303READ_LOCK_STATUS = TRUE\r
304FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092\r
305\r
306\r
307\r
308INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf\r
309\r
310!if $(MINNOW2_FSP_BUILD) == FALSE\r
311INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf\r
312INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf\r
313INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf\r
314INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf\r
315INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf\r
316INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf\r
317INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf\r
318INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf\r
319INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf\r
320!endif\r
321\r
322INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf\r
323!if $(TPM_ENABLED) == TRUE\r
324INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf\r
325INF SecurityPkg/Tcg/TcgPei/TcgPei.inf\r
326INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf\r
327!endif\r
328!if $(FTPM_ENABLE) == TRUE\r
329INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config\r
330!endif\r
331INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
332\r
333!if $(ACPI50_ENABLE) == TRUE\r
334 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf\r
335!endif\r
336!if $(PERFORMANCE_ENABLE) == TRUE\r
337INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
338!endif\r
339\r
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340!if $(RECOVERY_ENABLE)\r
341FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {\r
342 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}\r
343 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID\r
344 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS\r
345 }\r
346}\r
347!endif\r
348\r
5e752084 349[FV.FVRECOVERY]\r
350BlockSize = $(FLASH_BLOCK_SIZE)\r
351FvAlignment = 16 #FV alignment and FV attributes setting.\r
352ERASE_POLARITY = 1\r
353MEMORY_MAPPED = TRUE\r
354STICKY_WRITE = TRUE\r
355LOCK_CAP = TRUE\r
356LOCK_STATUS = TRUE\r
357WRITE_DISABLED_CAP = TRUE\r
358WRITE_ENABLED_CAP = TRUE\r
359WRITE_STATUS = TRUE\r
360WRITE_LOCK_CAP = TRUE\r
361WRITE_LOCK_STATUS = TRUE\r
362READ_DISABLED_CAP = TRUE\r
363READ_ENABLED_CAP = TRUE\r
364READ_STATUS = TRUE\r
365READ_LOCK_CAP = TRUE\r
366READ_LOCK_STATUS = TRUE\r
367FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091\r
368\r
369\r
370!if $(MINNOW2_FSP_BUILD) == TRUE\r
371INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf\r
372!else\r
373INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf\r
374!endif\r
375\r
376INF MdeModulePkg/Core/Pei/PeiMain.inf\r
377!if $(MINNOW2_FSP_BUILD) == TRUE\r
378INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf\r
379INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf\r
380!endif\r
381INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf\r
382INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf\r
383INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
384\r
385INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf\r
386\r
387!if $(MINNOW2_FSP_BUILD) == FALSE\r
388INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf\r
389!endif\r
390\r
391!if $(FTPM_ENABLE) == TRUE\r
392INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf\r
393!endif\r
394\r
395!if $(SOURCE_DEBUG_ENABLE) == TRUE\r
396 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf\r
397!endif\r
398\r
399\r
400!if $(CAPSULE_ENABLE) == TRUE\r
401INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf\r
402!if $(DXE_ARCHITECTURE) == "X64"\r
403INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf\r
404!endif\r
405!endif\r
406\r
407!if $(MINNOW2_FSP_BUILD) == FALSE\r
408!if $(PCIESC_ENABLE) == TRUE\r
409INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf\r
410!endif\r
411INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf\r
412!endif\r
413\r
414INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
415\r
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416!if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)\r
417 # FMP image decriptor\r
418INF RuleOverride = FMP_IMAGE_DESC Vlv2TbltDevicePkg/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf\r
419!endif\r
420\r
5e752084 421[FV.FVMAIN]\r
422BlockSize = $(FLASH_BLOCK_SIZE)\r
423FvAlignment = 16\r
424ERASE_POLARITY = 1\r
425MEMORY_MAPPED = TRUE\r
426STICKY_WRITE = TRUE\r
427LOCK_CAP = TRUE\r
428LOCK_STATUS = TRUE\r
429WRITE_DISABLED_CAP = TRUE\r
430WRITE_ENABLED_CAP = TRUE\r
431WRITE_STATUS = TRUE\r
432WRITE_LOCK_CAP = TRUE\r
433WRITE_LOCK_STATUS = TRUE\r
434READ_DISABLED_CAP = TRUE\r
435READ_ENABLED_CAP = TRUE\r
436READ_STATUS = TRUE\r
437READ_LOCK_CAP = TRUE\r
438READ_LOCK_STATUS = TRUE\r
439FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5\r
440\r
441APRIORI DXE {\r
442 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
443 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
444 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
445 }\r
446\r
447FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {\r
448 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin\r
449 }\r
450\r
451 #\r
452 # EDK II Related Platform codes\r
453 #\r
454\r
455 !if $(MINNOW2_FSP_BUILD) == TRUE\r
456 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf\r
457 !endif\r
458\r
459INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
460INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
461!if $(ACPI50_ENABLE) == TRUE\r
462INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf\r
463INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf\r
464!endif\r
465\r
466\r
467INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf\r
468INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
469INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
470INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
471INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf\r
472INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
473INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf\r
474INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf\r
475INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
476INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
477INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
478INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
479INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r
480\r
481INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf\r
482INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf\r
483INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf\r
484INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf\r
485INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf\r
486!if $(SECURE_BOOT_ENABLE)\r
487INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
488!endif\r
489\r
490INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
491\r
492INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
493INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
494INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
495INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf\r
496\r
497\r
498INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf\r
499\r
500!if $(DATAHUB_ENABLE) == TRUE\r
501INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf\r
502!endif\r
503INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf\r
504INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
505\r
506INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf\r
507\r
508 #\r
509 # EDK II Related Silicon codes\r
510 #\r
511INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf\r
512\r
513!if $(USE_HPET_TIMER) == TRUE\r
514INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
515!else\r
516INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf\r
517!endif\r
518INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf\r
519\r
520INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf\r
521\r
522INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf\r
523INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf\r
524\r
525!if $(MINNOW2_FSP_BUILD) == FALSE\r
526INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf\r
527!endif\r
528INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf\r
529!if $(PCIESC_ENABLE) == TRUE\r
530INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf\r
531!endif\r
532\r
533INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf\r
534INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf\r
535INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf\r
536INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf\r
537INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf\r
538!if $(MINNOW2_FSP_BUILD) == FALSE\r
539INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf\r
540!else\r
541INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf\r
542INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf\r
543!endif\r
544!if $(MINNOW2_FSP_BUILD) == FALSE\r
545 !if $(SEC_ENABLE) == TRUE\r
546 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf\r
547 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf\r
548 !endif\r
549!endif\r
550!if $(TPM_ENABLED) == TRUE\r
551INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf\r
552INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf\r
553INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf\r
554!endif\r
555!if $(FTPM_ENABLE) == TRUE\r
556INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf\r
557INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf\r
558INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf\r
559INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf\r
560INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf\r
561!endif\r
562\r
563#\r
564# EDK II Related Platform codes\r
565#\r
566INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf\r
567INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf\r
568INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf\r
569INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf\r
570INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf\r
571INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf\r
572INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf\r
573INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf\r
574INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf\r
575!if $(GOP_DRIVER_ENABLE) == TRUE\r
576 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf\r
577 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {\r
578 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}\r
579 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi\r
580 SECTION UI = "IntelGopDriver"\r
581}\r
582!endif\r
583\r
584INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf\r
585 #\r
586 # SMM\r
587 #\r
588INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf\r
589INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf\r
f2ae1ef7 590INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf\r
5e752084 591\r
592INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf\r
593INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf\r
f2ae1ef7 594INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf\r
5e752084 595INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf\r
97e862bb
MK
596\r
597#\r
598# Remove the following two SMM binary modules that prevent platform from booting to UEFI Shell\r
599#\r
600#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf\r
601#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf\r
602\r
5e752084 603 #\r
604 # ACPI\r
605 #\r
606INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
607INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf\r
608INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf\r
609INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf\r
610\r
611INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf\r
612\r
613INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf\r
614\r
615 #\r
616 # PCI\r
617 #\r
618INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
619\r
620INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf\r
621\r
622\r
623#\r
624# ISA\r
625#\r
626INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf\r
627INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf\r
628INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf\r
629!if $(SOURCE_DEBUG_ENABLE) != TRUE\r
630INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf\r
631!endif\r
632#INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf\r
633#INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf\r
634\r
635#\r
636# SDIO\r
637#\r
638INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf\r
639INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf\r
640#\r
641# IDE/SCSI/AHCI\r
642#\r
643INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
644\r
645INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
646\r
647INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
648!if $(SATA_ENABLE) == TRUE\r
649INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf\r
650#\r
651\r
652#\r
653INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf\r
654INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf\r
655!if $(SCSI_ENABLE) == TRUE\r
656INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
657INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
658!endif\r
659#\r
660!endif\r
661# Console\r
662#\r
663INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
664INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
665INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
666INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf\r
667INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
668INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
669INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
670INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
671 #\r
672 # USB\r
673 #\r
674!if $(USB_ENABLE) == TRUE\r
675INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
676INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf\r
677INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
678INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
679INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf\r
680INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
681INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf\r
682!endif\r
683\r
684 #\r
685 # ECP\r
686 #\r
687INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf\r
688INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf\r
689INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf\r
690INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf\r
691INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf\r
692INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf\r
693 #\r
694 # SMBIOS\r
695 #\r
696INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
697INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf\r
698\r
699INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf\r
700\r
701 #\r
702 # Legacy Modules\r
703 #\r
704INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r
705\r
706#\r
707# FAT file system\r
708#\r
709INF FatPkg/EnhancedFatDxe/Fat.inf\r
710\r
711#\r
712# UEFI Shell\r
713#\r
714FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {\r
715# SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi\r
716 SECTION PE32 = ShellBinPkg/UefiShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi\r
717 }\r
718\r
7a0e4f8e
RN
719#\r
720# dp command\r
721#\r
722!if $(PERFORMANCE_ENABLE) == TRUE\r
723INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf\r
724!endif\r
5e752084 725\r
726!if $(GOP_DRIVER_ENABLE) == TRUE\r
727FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {\r
728 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin\r
729 SECTION UI = "IntelGopVbt"\r
730}\r
731!endif\r
732\r
733#\r
734# Network Modules\r
735#\r
736!if $(NETWORK_ENABLE) == TRUE\r
737 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {\r
738 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi\r
739 SECTION UI = "UNDI"\r
740 }\r
741 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf\r
742 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf\r
743 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf\r
744 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf\r
745 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf\r
746 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r
747 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r
748 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r
749 !if $(NETWORK_IP6_ENABLE) == TRUE\r
750 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf\r
751 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf\r
752 INF NetworkPkg/IpSecDxe/IpSecDxe.inf\r
753 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf\r
754 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf\r
755 !endif\r
756 !if $(NETWORK_IP6_ENABLE) == TRUE\r
757 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
758 INF NetworkPkg/TcpDxe/TcpDxe.inf\r
759 !else\r
760 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
761 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf\r
762 !endif\r
763 !if $(NETWORK_VLAN_ENABLE) == TRUE\r
764 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r
765 !endif\r
766 !if $(NETWORK_ISCSI_ENABLE) == TRUE\r
767 !if $(NETWORK_IP6_ENABLE) == TRUE\r
768 INF NetworkPkg/IScsiDxe/IScsiDxe.inf\r
769 !else\r
770 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf\r
771 !endif\r
772 !endif\r
773!endif\r
774\r
c5a59080
JY
775!if $(CAPSULE_ENABLE) || $(MICOCODE_CAPSULE_ENABLE)\r
776INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf\r
777!endif\r
778!if $(CAPSULE_ENABLE)\r
779INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf\r
780!endif\r
781!if $(MICOCODE_CAPSULE_ENABLE)\r
782INF UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf\r
783!endif\r
784\r
785!if $(RECOVERY_ENABLE)\r
786FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {\r
787 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin\r
788 SECTION UI = "Rsa2048Sha256TestSigningPublicKey"\r
789 }\r
790!endif\r
791\r
792!if $(CAPSULE_ENABLE)\r
793FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiPkcs7TestPublicKeyFileGuid) {\r
794 SECTION RAW = BaseTools/Source/Python/Pkcs7Sign/TestRoot.cer\r
795 SECTION UI = "Pkcs7TestRoot"\r
796 }\r
797!endif\r
798\r
5e752084 799[FV.FVMAIN_COMPACT]\r
800BlockSize = $(FLASH_BLOCK_SIZE)\r
801FvAlignment = 16\r
802ERASE_POLARITY = 1\r
803MEMORY_MAPPED = TRUE\r
804STICKY_WRITE = TRUE\r
805LOCK_CAP = TRUE\r
806LOCK_STATUS = TRUE\r
807WRITE_DISABLED_CAP = TRUE\r
808WRITE_ENABLED_CAP = TRUE\r
809WRITE_STATUS = TRUE\r
810WRITE_LOCK_CAP = TRUE\r
811WRITE_LOCK_STATUS = TRUE\r
812READ_DISABLED_CAP = TRUE\r
813READ_ENABLED_CAP = TRUE\r
814READ_STATUS = TRUE\r
815READ_LOCK_CAP = TRUE\r
816READ_LOCK_STATUS = TRUE\r
817\r
818\r
819\r
820FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
821!if $(LZMA_ENABLE) == TRUE\r
822# LZMA Compress\r
823 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
824 SECTION FV_IMAGE = FVMAIN\r
825 }\r
826!else\r
827!if $(DXE_COMPRESS_ENABLE) == TRUE\r
828# Tiano Compress\r
829 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
830 SECTION FV_IMAGE = FVMAIN\r
831 }\r
832!else\r
833# No Compress\r
834 SECTION COMPRESS PI_NONE {\r
835 SECTION FV_IMAGE = FVMAIN\r
836 }\r
837!endif\r
838!endif\r
839 }\r
840\r
841[FV.SETUP_DATA]\r
842BlockSize = $(FLASH_BLOCK_SIZE)\r
843#NumBlocks = 0x10\r
844FvAlignment = 16\r
845ERASE_POLARITY = 1\r
846MEMORY_MAPPED = TRUE\r
847STICKY_WRITE = TRUE\r
848LOCK_CAP = TRUE\r
849LOCK_STATUS = TRUE\r
850WRITE_DISABLED_CAP = TRUE\r
851WRITE_ENABLED_CAP = TRUE\r
852WRITE_STATUS = TRUE\r
853WRITE_LOCK_CAP = TRUE\r
854WRITE_LOCK_STATUS = TRUE\r
855READ_DISABLED_CAP = TRUE\r
856READ_ENABLED_CAP = TRUE\r
857READ_STATUS = TRUE\r
858READ_LOCK_CAP = TRUE\r
859READ_LOCK_STATUS = TRUE\r
860\r
861\r
c5a59080
JY
862!if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)\r
863[FV.CapsuleDispatchFv]\r
5e752084 864FvAlignment = 16\r
865ERASE_POLARITY = 1\r
866MEMORY_MAPPED = TRUE\r
867STICKY_WRITE = TRUE\r
868LOCK_CAP = TRUE\r
869LOCK_STATUS = TRUE\r
870WRITE_DISABLED_CAP = TRUE\r
871WRITE_ENABLED_CAP = TRUE\r
872WRITE_STATUS = TRUE\r
873WRITE_LOCK_CAP = TRUE\r
874WRITE_LOCK_STATUS = TRUE\r
875READ_DISABLED_CAP = TRUE\r
876READ_ENABLED_CAP = TRUE\r
877READ_STATUS = TRUE\r
878READ_LOCK_CAP = TRUE\r
879READ_LOCK_STATUS = TRUE\r
880\r
c5a59080
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881!if $(CAPSULE_ENABLE)\r
882INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf\r
883!endif\r
5e752084 884\r
c5a59080 885!endif\r
5e752084 886\r
887################################################################################\r
888#\r
889# Rules are use with the [FV] section's module INF type to define\r
890# how an FFS file is created for a given INF file. The following Rule are the default\r
891# rules for the different module type. User can add the customized rules to define the\r
892# content of the FFS file.\r
893#\r
894################################################################################\r
895[Rule.Common.SEC]\r
896 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
897 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
898 RAW BIN Align = 16 |.com\r
899 }\r
900\r
901[Rule.Common.SEC.BINARY]\r
902 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
903 PE32 PE32 Align = 8 |.efi\r
904 RAW BIN Align = 16 |.com\r
905 }\r
906\r
907[Rule.Common.PEI_CORE]\r
908 FILE PEI_CORE = $(NAMED_GUID) {\r
909 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
910 UI STRING="$(MODULE_NAME)" Optional\r
911 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
912 }\r
913\r
914[Rule.Common.PEIM]\r
915 FILE PEIM = $(NAMED_GUID) {\r
916 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
917 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
918 UI STRING="$(MODULE_NAME)" Optional\r
919 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
920 }\r
921\r
922[Rule.Common.PEIM.BINARY]\r
923 FILE PEIM = $(NAMED_GUID) {\r
924 PEI_DEPEX PEI_DEPEX Optional |.depex\r
925 PE32 PE32 Align = Auto |.efi\r
926 UI STRING="$(MODULE_NAME)" Optional\r
927 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
928 }\r
929\r
930[Rule.Common.PEIM.BIOSID]\r
931 FILE PEIM = $(NAMED_GUID) {\r
932 RAW BIN BiosId.bin\r
933 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
934 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
935 UI STRING="$(MODULE_NAME)" Optional\r
936 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
937 }\r
938\r
939[Rule.Common.USER_DEFINED.APINIT]\r
940 FILE RAW = $(NAMED_GUID) Fixed Align=4K {\r
941 RAW SEC_BIN |.com\r
942 }\r
943#cjia 2011-07-21\r
944[Rule.Common.USER_DEFINED.LEGACY16]\r
945 FILE FREEFORM = $(NAMED_GUID) {\r
946 UI STRING="$(MODULE_NAME)" Optional\r
947 RAW BIN |.bin\r
948 }\r
949#cjia\r
950\r
951[Rule.Common.USER_DEFINED.ASM16]\r
952 FILE FREEFORM = $(NAMED_GUID) {\r
953 UI STRING="$(MODULE_NAME)" Optional\r
954 RAW BIN |.com\r
955 }\r
956\r
957[Rule.Common.DXE_CORE]\r
958 FILE DXE_CORE = $(NAMED_GUID) {\r
959 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
960 UI STRING="$(MODULE_NAME)" Optional\r
961 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
962 }\r
963\r
964[Rule.Common.UEFI_DRIVER]\r
965 FILE DRIVER = $(NAMED_GUID) {\r
966 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
967 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
968 UI STRING="$(MODULE_NAME)" Optional\r
969 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
970 }\r
971\r
972[Rule.Common.UEFI_DRIVER.BINARY]\r
973 FILE DRIVER = $(NAMED_GUID) {\r
974 DXE_DEPEX DXE_DEPEX Optional |.depex\r
975 PE32 PE32 |.efi\r
976 UI STRING="$(MODULE_NAME)" Optional\r
977 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
978 }\r
979\r
980[Rule.Common.UEFI_DRIVER.NATIVE_BINARY]\r
981 FILE DRIVER = $(NAMED_GUID) {\r
982 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex\r
983 PE32 PE32 |.efi\r
984 UI STRING="$(MODULE_NAME)" Optional\r
985 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
986 }\r
987\r
988[Rule.Common.DXE_DRIVER]\r
989 FILE DRIVER = $(NAMED_GUID) {\r
990 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
991 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
992 UI STRING="$(MODULE_NAME)" Optional\r
993 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
994 }\r
995\r
996[Rule.Common.DXE_DRIVER.BINARY]\r
997 FILE DRIVER = $(NAMED_GUID) {\r
998 DXE_DEPEX DXE_DEPEX Optional |.depex\r
999 PE32 PE32 |.efi\r
1000 UI STRING="$(MODULE_NAME)" Optional\r
1001 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1002 }\r
1003\r
1004[Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]\r
1005 FILE DRIVER = $(NAMED_GUID) {\r
1006 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1007 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1008 UI STRING="$(MODULE_NAME)" Optional\r
1009 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1010 RAW ACPI Optional |.acpi\r
1011 RAW ASL Optional |.aml\r
1012 }\r
1013\r
1014[Rule.Common.DXE_RUNTIME_DRIVER]\r
1015 FILE DRIVER = $(NAMED_GUID) {\r
1016 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1017 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1018 UI STRING="$(MODULE_NAME)" Optional\r
1019 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1020 }\r
1021\r
1022[Rule.Common.DXE_RUNTIME_DRIVER.BINARY]\r
1023 FILE DRIVER = $(NAMED_GUID) {\r
1024 DXE_DEPEX DXE_DEPEX Optional |.depex\r
1025 PE32 PE32 |.efi\r
1026 UI STRING="$(MODULE_NAME)" Optional\r
1027 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1028 }\r
1029\r
1030[Rule.Common.DXE_SMM_DRIVER]\r
1031 FILE SMM = $(NAMED_GUID) {\r
1032 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1033 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1034 UI STRING="$(MODULE_NAME)" Optional\r
1035 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1036 }\r
1037\r
1038[Rule.Common.DXE_SMM_DRIVER.BINARY]\r
1039 FILE SMM = $(NAMED_GUID) {\r
1040 SMM_DEPEX SMM_DEPEX |.depex\r
1041 PE32 PE32 |.efi\r
1042 RAW BIN Optional |.aml\r
1043 UI STRING="$(MODULE_NAME)" Optional\r
1044 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1045 }\r
1046\r
1047[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]\r
1048 FILE SMM = $(NAMED_GUID) {\r
1049 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1050 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1051 UI STRING="$(MODULE_NAME)" Optional\r
1052 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1053 RAW ACPI Optional |.acpi\r
1054 RAW ASL Optional |.aml\r
1055 }\r
1056\r
1057[Rule.Common.SMM_CORE]\r
1058 FILE SMM_CORE = $(NAMED_GUID) {\r
1059 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1060 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1061 UI STRING="$(MODULE_NAME)" Optional\r
1062 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1063 }\r
1064\r
1065[Rule.Common.SMM_CORE.BINARY]\r
1066 FILE SMM_CORE = $(NAMED_GUID) {\r
1067 DXE_DEPEX DXE_DEPEX Optional |.depex\r
1068 PE32 PE32 |.efi\r
1069 UI STRING="$(MODULE_NAME)" Optional\r
1070 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1071 }\r
1072\r
1073[Rule.Common.UEFI_APPLICATION]\r
1074 FILE APPLICATION = $(NAMED_GUID) {\r
1075 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1076 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1077 UI STRING="$(MODULE_NAME)" Optional\r
1078 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1079 }\r
1080\r
1081[Rule.Common.UEFI_APPLICATION.UI]\r
1082 FILE APPLICATION = $(NAMED_GUID) {\r
1083 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1084 UI STRING="Enter Setup"\r
1085 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1086 }\r
1087\r
1088[Rule.Common.USER_DEFINED]\r
1089 FILE FREEFORM = $(NAMED_GUID) {\r
1090 UI STRING="$(MODULE_NAME)" Optional\r
1091 RAW BIN |.bin\r
1092 }\r
1093\r
1094[Rule.Common.USER_DEFINED.ACPITABLE]\r
1095 FILE FREEFORM = $(NAMED_GUID) {\r
1096 RAW ACPI Optional |.acpi\r
1097 RAW ASL Optional |.aml\r
1098 }\r
1099\r
1100[Rule.Common.USER_DEFINED.ACPITABLE2]\r
1101 FILE FREEFORM = $(NAMED_GUID) {\r
1102 RAW ASL Optional |.aml\r
1103 }\r
1104\r
1105[Rule.Common.ACPITABLE]\r
1106 FILE FREEFORM = $(NAMED_GUID) {\r
1107 RAW ACPI Optional |.acpi\r
1108 RAW ASL Optional |.aml\r
1109 }\r
1110\r
c5a59080
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1111[Rule.Common.PEIM.FMP_IMAGE_DESC]\r
1112 FILE PEIM = $(NAMED_GUID) {\r
1113 RAW BIN |.acpi\r
1114 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1115 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1116 UI STRING="$(MODULE_NAME)" Optional\r
1117 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1118 }\r