Vlv2TbltDevicePkg:Add PiSmmCommunication&PiSmmCpuDxeSmm of UefiCpuPkg.
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkg.fdf
CommitLineData
5e752084 1#/** @file\r
2# FDF file of Platform.\r
3#\r
4# Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>\r
5#\r
6# This program and the accompanying materials are licensed and made available under\r
7# the terms and conditions of the BSD License that accompanies this distribution.\r
8# The full text of the license may be found at\r
9# http://opensource.org/licenses/bsd-license.php.\r
10#\r
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13#\r
14#\r
15#**/\r
16\r
17[Defines]\r
18DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.\r
19DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.\r
20DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.\r
21DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.\r
22DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000\r
23DEFINE FLASH_AREA_SIZE = 0x00800000\r
24\r
25DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000\r
26DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000\r
27DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000\r
28\r
988715a3 29DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000\r
5e752084 30DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000\r
31\r
988715a3 32DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000\r
5e752084 33DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000\r
34\r
35\r
988715a3 36DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000\r
5e752084 37DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000\r
38\r
39!if $(MINNOW2_FSP_BUILD) == TRUE\r
988715a3 40DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000\r
5e752084 41DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000\r
988715a3 42DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000\r
5e752084 43\r
988715a3 44DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000\r
5e752084 45DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000\r
988715a3 46DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000\r
5e752084 47\r
48!endif\r
49\r
988715a3 50DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000\r
51DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00210000\r
5e752084 52\r
988715a3 53DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00320000\r
54DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x00070000\r
5e752084 55\r
988715a3 56DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000\r
57DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000\r
5e752084 58\r
59################################################################################\r
60#\r
61# FD Section\r
62# The [FD] Section is made up of the definition statements and a\r
63# description of what goes into the Flash Device Image. Each FD section\r
64# defines one flash "device" image. A flash device image may be one of\r
65# the following: Removable media bootable image (like a boot floppy\r
66# image,) an Option ROM image (that would be "flashed" into an add-in\r
67# card,) a System "Flash" image (that would be burned into a system's\r
68# flash) or an Update ("Capsule") image that will be used to update and\r
69# existing system flash.\r
70#\r
71################################################################################\r
72[FD.Vlv]\r
73BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.\r
74Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.\r
75ErasePolarity = 1\r
76BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.\r
77NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.\r
78\r
79#\r
80#Flash location override based on actual flash map\r
81#\r
82SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)\r
83SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)\r
84\r
85!if $(MINNOW2_FSP_BUILD) == TRUE\r
86# put below PCD value setting into dsc file\r
87#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)\r
88#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)\r
89#SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60\r
90#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)\r
91#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)\r
92#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)\r
93#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)\r
94\r
95!endif\r
96################################################################################\r
97#\r
98# Following are lists of FD Region layout which correspond to the locations of different\r
99# images within the flash device.\r
100#\r
101# Regions must be defined in ascending order and may not overlap.\r
102#\r
103# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
104# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
105# "0x" characters. Like:\r
106# Offset|Size\r
107# PcdOffsetCName|PcdSizeCName\r
108# RegionType <FV, DATA, or FILE>\r
109# Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000\r
110#\r
111################################################################################\r
112 #\r
113 # CPU Microcodes\r
114 #\r
115\r
116$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)\r
117gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize\r
118FV = MICROCODE_FV\r
119$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)\r
120gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
121#NV_VARIABLE_STORE\r
122DATA = {\r
123 ## This is the EFI_FIRMWARE_VOLUME_HEADER\r
124 # ZeroVector []\r
125 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
126 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
127 # FileSystemGuid: gEfiSystemNvDataFvGuid =\r
128 # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}\r
129 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,\r
130 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,\r
131 # FvLength: 0x80000\r
132 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,\r
133 #Signature "_FVH" #Attributes\r
134 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,\r
135 #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision\r
136 0x48, 0x00, 0x2A, 0x09, 0x00, 0x00, 0x00, 0x02,\r
137 #Blockmap[0]: 7 Blocks * 0x10000 Bytes / Block\r
138 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,\r
139 #Blockmap[1]: End\r
140 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
141 ## This is the VARIABLE_STORE_HEADER\r
142!if $(SECURE_BOOT_ENABLE) == TRUE\r
143 #Signature: gEfiAuthenticatedVariableGuid =\r
144 # { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}\r
145 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,\r
146 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,\r
147!else\r
148 #Signature: gEfiVariableGuid =\r
149 # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}\r
150 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,\r
151 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,\r
152!endif\r
153 #Size: 0x3E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x03DFB8\r
154 # This can speed up the Variable Dispatch a bit.\r
155 0xB8, 0xDF, 0x03, 0x00,\r
156 #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32\r
157 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
158}\r
159\r
160\r
161$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)\r
162gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\r
163#NV_FTW_WORKING\r
164DATA = {\r
165 # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =\r
166 # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}\r
167 0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,\r
168 0xA0, 0xCE, 0x65, 0x0, 0xFD, 0x9F, 0x1B, 0x95,\r
169\r
170 # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved\r
171 0xE2, 0x33, 0xF2, 0x3, 0xFE, 0xFF, 0xFF, 0xFF,\r
172 # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0\r
173 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
174}\r
175\r
176$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)\r
177gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
178\r
179!if $(MINNOW2_FSP_BUILD) == TRUE\r
180\r
181 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)\r
182 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize\r
183 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin\r
184\r
185\r
186 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)\r
187 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin\r
188\r
189!endif\r
190\r
191 #\r
192 # Main Block\r
193 #\r
194$(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)\r
195gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize\r
196FV = FVMAIN_COMPACT\r
197\r
198 #\r
199 # FV Recovery#2\r
200 #\r
201$(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)\r
202gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size\r
203FV = FVRECOVERY2\r
204\r
205 #\r
206 # FV Recovery\r
207 #\r
208$(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)\r
209gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize\r
210FV = FVRECOVERY\r
211\r
212################################################################################\r
213#\r
214# FV Section\r
215#\r
216# [FV] section is used to define what components or modules are placed within a flash\r
217# device file. This section also defines order the components and modules are positioned\r
218# within the image. The [FV] section consists of define statements, set statements and\r
219# module statements.\r
220#\r
221################################################################################\r
222[FV.MICROCODE_FV]\r
223BlockSize = $(FLASH_BLOCK_SIZE)\r
224FvAlignment = 16\r
225ERASE_POLARITY = 1\r
226MEMORY_MAPPED = TRUE\r
227STICKY_WRITE = TRUE\r
228LOCK_CAP = TRUE\r
229LOCK_STATUS = FALSE\r
230WRITE_DISABLED_CAP = TRUE\r
231WRITE_ENABLED_CAP = TRUE\r
232WRITE_STATUS = TRUE\r
233WRITE_LOCK_CAP = TRUE\r
234WRITE_LOCK_STATUS = TRUE\r
235READ_DISABLED_CAP = TRUE\r
236READ_ENABLED_CAP = TRUE\r
237READ_STATUS = TRUE\r
238READ_LOCK_CAP = TRUE\r
239READ_LOCK_STATUS = TRUE\r
240\r
241FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {\r
242 $(OUTPUT_DIRECTORY)\$(TARGET)_$(TOOL_CHAIN_TAG)\$(DXE_ARCHITECTURE)\MicrocodeUpdates.bin\r
243}\r
244\r
245################################################################################\r
246#\r
247# FV Section\r
248#\r
249# [FV] section is used to define what components or modules are placed within a flash\r
250# device file. This section also defines order the components and modules are positioned\r
251# within the image. The [FV] section consists of define statements, set statements and\r
252# module statements.\r
253#\r
254################################################################################\r
255[FV.FVRECOVERY2]\r
256BlockSize = $(FLASH_BLOCK_SIZE)\r
257FvAlignment = 16 #FV alignment and FV attributes setting.\r
258ERASE_POLARITY = 1\r
259MEMORY_MAPPED = TRUE\r
260STICKY_WRITE = TRUE\r
261LOCK_CAP = TRUE\r
262LOCK_STATUS = TRUE\r
263WRITE_DISABLED_CAP = TRUE\r
264WRITE_ENABLED_CAP = TRUE\r
265WRITE_STATUS = TRUE\r
266WRITE_LOCK_CAP = TRUE\r
267WRITE_LOCK_STATUS = TRUE\r
268READ_DISABLED_CAP = TRUE\r
269READ_ENABLED_CAP = TRUE\r
270READ_STATUS = TRUE\r
271READ_LOCK_CAP = TRUE\r
272READ_LOCK_STATUS = TRUE\r
273FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092\r
274\r
275\r
276\r
277INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf\r
278\r
279!if $(MINNOW2_FSP_BUILD) == FALSE\r
280INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf\r
281INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf\r
282INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf\r
283INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf\r
284INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf\r
285INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf\r
286INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf\r
287INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf\r
288INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf\r
289!endif\r
290\r
291INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf\r
292!if $(TPM_ENABLED) == TRUE\r
293INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf\r
294INF SecurityPkg/Tcg/TcgPei/TcgPei.inf\r
295INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf\r
296!endif\r
297!if $(FTPM_ENABLE) == TRUE\r
298INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config\r
299!endif\r
300INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
301\r
302!if $(ACPI50_ENABLE) == TRUE\r
303 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf\r
304!endif\r
305!if $(PERFORMANCE_ENABLE) == TRUE\r
306INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
307!endif\r
308\r
309[FV.FVRECOVERY]\r
310BlockSize = $(FLASH_BLOCK_SIZE)\r
311FvAlignment = 16 #FV alignment and FV attributes setting.\r
312ERASE_POLARITY = 1\r
313MEMORY_MAPPED = TRUE\r
314STICKY_WRITE = TRUE\r
315LOCK_CAP = TRUE\r
316LOCK_STATUS = TRUE\r
317WRITE_DISABLED_CAP = TRUE\r
318WRITE_ENABLED_CAP = TRUE\r
319WRITE_STATUS = TRUE\r
320WRITE_LOCK_CAP = TRUE\r
321WRITE_LOCK_STATUS = TRUE\r
322READ_DISABLED_CAP = TRUE\r
323READ_ENABLED_CAP = TRUE\r
324READ_STATUS = TRUE\r
325READ_LOCK_CAP = TRUE\r
326READ_LOCK_STATUS = TRUE\r
327FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091\r
328\r
329\r
330!if $(MINNOW2_FSP_BUILD) == TRUE\r
331INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf\r
332!else\r
333INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf\r
334!endif\r
335\r
336INF MdeModulePkg/Core/Pei/PeiMain.inf\r
337!if $(MINNOW2_FSP_BUILD) == TRUE\r
338INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf\r
339INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf\r
340!endif\r
341INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf\r
342INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf\r
343INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
344\r
345INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf\r
346\r
347!if $(MINNOW2_FSP_BUILD) == FALSE\r
348INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf\r
349!endif\r
350\r
351!if $(FTPM_ENABLE) == TRUE\r
352INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf\r
353!endif\r
354\r
355!if $(SOURCE_DEBUG_ENABLE) == TRUE\r
356 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf\r
357!endif\r
358\r
359\r
360!if $(CAPSULE_ENABLE) == TRUE\r
361INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf\r
362!if $(DXE_ARCHITECTURE) == "X64"\r
363INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf\r
364!endif\r
365!endif\r
366\r
367!if $(MINNOW2_FSP_BUILD) == FALSE\r
368!if $(PCIESC_ENABLE) == TRUE\r
369INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf\r
370!endif\r
371INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf\r
372!endif\r
373\r
374INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
375\r
376[FV.FVMAIN]\r
377BlockSize = $(FLASH_BLOCK_SIZE)\r
378FvAlignment = 16\r
379ERASE_POLARITY = 1\r
380MEMORY_MAPPED = TRUE\r
381STICKY_WRITE = TRUE\r
382LOCK_CAP = TRUE\r
383LOCK_STATUS = TRUE\r
384WRITE_DISABLED_CAP = TRUE\r
385WRITE_ENABLED_CAP = TRUE\r
386WRITE_STATUS = TRUE\r
387WRITE_LOCK_CAP = TRUE\r
388WRITE_LOCK_STATUS = TRUE\r
389READ_DISABLED_CAP = TRUE\r
390READ_ENABLED_CAP = TRUE\r
391READ_STATUS = TRUE\r
392READ_LOCK_CAP = TRUE\r
393READ_LOCK_STATUS = TRUE\r
394FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5\r
395\r
396APRIORI DXE {\r
397 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
398 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
399 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
400 }\r
401\r
402FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {\r
403 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin\r
404 }\r
405\r
406 #\r
407 # EDK II Related Platform codes\r
408 #\r
409\r
410 !if $(MINNOW2_FSP_BUILD) == TRUE\r
411 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf\r
412 !endif\r
413\r
414INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
415INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
416!if $(ACPI50_ENABLE) == TRUE\r
417INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf\r
418INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf\r
419!endif\r
420\r
421\r
422INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf\r
423INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
424INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
425INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
426INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf\r
427INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
428INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf\r
429INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf\r
430INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
431INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
432INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
433INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
434INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r
435\r
436INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf\r
437INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf\r
438INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf\r
439INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf\r
440INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf\r
441!if $(SECURE_BOOT_ENABLE)\r
442INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
443!endif\r
444\r
445INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
446\r
447INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
448INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
449INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
450INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf\r
451\r
452\r
453INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf\r
454\r
455!if $(DATAHUB_ENABLE) == TRUE\r
456INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf\r
457!endif\r
458INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf\r
459INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
460\r
461INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf\r
462\r
463 #\r
464 # EDK II Related Silicon codes\r
465 #\r
466INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf\r
467\r
468!if $(USE_HPET_TIMER) == TRUE\r
469INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
470!else\r
471INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf\r
472!endif\r
473INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf\r
474\r
475INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf\r
476\r
477INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf\r
478INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf\r
479\r
480!if $(MINNOW2_FSP_BUILD) == FALSE\r
481INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf\r
482!endif\r
483INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf\r
484!if $(PCIESC_ENABLE) == TRUE\r
485INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf\r
486!endif\r
487\r
488INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf\r
489INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf\r
490INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf\r
491INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf\r
492INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf\r
493!if $(MINNOW2_FSP_BUILD) == FALSE\r
494INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf\r
495!else\r
496INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf\r
497INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf\r
498!endif\r
499!if $(MINNOW2_FSP_BUILD) == FALSE\r
500 !if $(SEC_ENABLE) == TRUE\r
501 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf\r
502 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf\r
503 !endif\r
504!endif\r
505!if $(TPM_ENABLED) == TRUE\r
506INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf\r
507INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf\r
508INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf\r
509!endif\r
510!if $(FTPM_ENABLE) == TRUE\r
511INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf\r
512INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf\r
513INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf\r
514INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf\r
515INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf\r
516!endif\r
517\r
518#\r
519# EDK II Related Platform codes\r
520#\r
521INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf\r
522INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf\r
523INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf\r
524INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf\r
525INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf\r
526INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf\r
527INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf\r
528INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf\r
529INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf\r
530!if $(GOP_DRIVER_ENABLE) == TRUE\r
531 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf\r
532 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {\r
533 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}\r
534 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi\r
535 SECTION UI = "IntelGopDriver"\r
536}\r
537!endif\r
538\r
539INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf\r
540 #\r
541 # SMM\r
542 #\r
543INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf\r
544INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf\r
f2ae1ef7 545INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf\r
5e752084 546\r
547INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf\r
548INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf\r
f2ae1ef7 549INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf\r
5e752084 550INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf\r
551INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf\r
5e752084 552INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf\r
553 #\r
554 # ACPI\r
555 #\r
556INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
557INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf\r
558INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf\r
559INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf\r
560\r
561INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf\r
562\r
563INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf\r
564\r
565 #\r
566 # PCI\r
567 #\r
568INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
569\r
570INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf\r
571\r
572\r
573#\r
574# ISA\r
575#\r
576INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf\r
577INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf\r
578INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf\r
579!if $(SOURCE_DEBUG_ENABLE) != TRUE\r
580INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf\r
581!endif\r
582#INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf\r
583#INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf\r
584\r
585#\r
586# SDIO\r
587#\r
588INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf\r
589INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf\r
590#\r
591# IDE/SCSI/AHCI\r
592#\r
593INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
594\r
595INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
596\r
597INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
598!if $(SATA_ENABLE) == TRUE\r
599INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf\r
600#\r
601\r
602#\r
603INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf\r
604INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf\r
605!if $(SCSI_ENABLE) == TRUE\r
606INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
607INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
608!endif\r
609#\r
610!endif\r
611# Console\r
612#\r
613INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
614INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
615INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
616INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf\r
617INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
618INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
619INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
620INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
621 #\r
622 # USB\r
623 #\r
624!if $(USB_ENABLE) == TRUE\r
625INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
626INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf\r
627INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
628INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
629INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf\r
630INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
631INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf\r
632!endif\r
633\r
634 #\r
635 # ECP\r
636 #\r
637INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf\r
638INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf\r
639INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf\r
640INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf\r
641INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf\r
642INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf\r
643 #\r
644 # SMBIOS\r
645 #\r
646INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
647INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf\r
648\r
649INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf\r
650\r
651 #\r
652 # Legacy Modules\r
653 #\r
654INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r
655\r
656#\r
657# FAT file system\r
658#\r
659INF FatPkg/EnhancedFatDxe/Fat.inf\r
660\r
661#\r
662# UEFI Shell\r
663#\r
664FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {\r
665# SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi\r
666 SECTION PE32 = ShellBinPkg/UefiShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi\r
667 }\r
668\r
669\r
670\r
671!if $(GOP_DRIVER_ENABLE) == TRUE\r
672FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {\r
673 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin\r
674 SECTION UI = "IntelGopVbt"\r
675}\r
676!endif\r
677\r
678#\r
679# Network Modules\r
680#\r
681!if $(NETWORK_ENABLE) == TRUE\r
682 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {\r
683 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi\r
684 SECTION UI = "UNDI"\r
685 }\r
686 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf\r
687 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf\r
688 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf\r
689 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf\r
690 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf\r
691 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r
692 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r
693 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r
694 !if $(NETWORK_IP6_ENABLE) == TRUE\r
695 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf\r
696 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf\r
697 INF NetworkPkg/IpSecDxe/IpSecDxe.inf\r
698 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf\r
699 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf\r
700 !endif\r
701 !if $(NETWORK_IP6_ENABLE) == TRUE\r
702 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
703 INF NetworkPkg/TcpDxe/TcpDxe.inf\r
704 !else\r
705 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
706 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf\r
707 !endif\r
708 !if $(NETWORK_VLAN_ENABLE) == TRUE\r
709 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r
710 !endif\r
711 !if $(NETWORK_ISCSI_ENABLE) == TRUE\r
712 !if $(NETWORK_IP6_ENABLE) == TRUE\r
713 INF NetworkPkg/IScsiDxe/IScsiDxe.inf\r
714 !else\r
715 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf\r
716 !endif\r
717 !endif\r
718!endif\r
719\r
720[FV.FVMAIN_COMPACT]\r
721BlockSize = $(FLASH_BLOCK_SIZE)\r
722FvAlignment = 16\r
723ERASE_POLARITY = 1\r
724MEMORY_MAPPED = TRUE\r
725STICKY_WRITE = TRUE\r
726LOCK_CAP = TRUE\r
727LOCK_STATUS = TRUE\r
728WRITE_DISABLED_CAP = TRUE\r
729WRITE_ENABLED_CAP = TRUE\r
730WRITE_STATUS = TRUE\r
731WRITE_LOCK_CAP = TRUE\r
732WRITE_LOCK_STATUS = TRUE\r
733READ_DISABLED_CAP = TRUE\r
734READ_ENABLED_CAP = TRUE\r
735READ_STATUS = TRUE\r
736READ_LOCK_CAP = TRUE\r
737READ_LOCK_STATUS = TRUE\r
738\r
739\r
740\r
741FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
742!if $(LZMA_ENABLE) == TRUE\r
743# LZMA Compress\r
744 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
745 SECTION FV_IMAGE = FVMAIN\r
746 }\r
747!else\r
748!if $(DXE_COMPRESS_ENABLE) == TRUE\r
749# Tiano Compress\r
750 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
751 SECTION FV_IMAGE = FVMAIN\r
752 }\r
753!else\r
754# No Compress\r
755 SECTION COMPRESS PI_NONE {\r
756 SECTION FV_IMAGE = FVMAIN\r
757 }\r
758!endif\r
759!endif\r
760 }\r
761\r
762[FV.SETUP_DATA]\r
763BlockSize = $(FLASH_BLOCK_SIZE)\r
764#NumBlocks = 0x10\r
765FvAlignment = 16\r
766ERASE_POLARITY = 1\r
767MEMORY_MAPPED = TRUE\r
768STICKY_WRITE = TRUE\r
769LOCK_CAP = TRUE\r
770LOCK_STATUS = TRUE\r
771WRITE_DISABLED_CAP = TRUE\r
772WRITE_ENABLED_CAP = TRUE\r
773WRITE_STATUS = TRUE\r
774WRITE_LOCK_CAP = TRUE\r
775WRITE_LOCK_STATUS = TRUE\r
776READ_DISABLED_CAP = TRUE\r
777READ_ENABLED_CAP = TRUE\r
778READ_STATUS = TRUE\r
779READ_LOCK_CAP = TRUE\r
780READ_LOCK_STATUS = TRUE\r
781\r
782\r
783[FV.Update_Data]\r
784BlockSize = $(FLASH_BLOCK_SIZE)\r
785FvAlignment = 16\r
786ERASE_POLARITY = 1\r
787MEMORY_MAPPED = TRUE\r
788STICKY_WRITE = TRUE\r
789LOCK_CAP = TRUE\r
790LOCK_STATUS = TRUE\r
791WRITE_DISABLED_CAP = TRUE\r
792WRITE_ENABLED_CAP = TRUE\r
793WRITE_STATUS = TRUE\r
794WRITE_LOCK_CAP = TRUE\r
795WRITE_LOCK_STATUS = TRUE\r
796READ_DISABLED_CAP = TRUE\r
797READ_ENABLED_CAP = TRUE\r
798READ_STATUS = TRUE\r
799READ_LOCK_CAP = TRUE\r
800READ_LOCK_STATUS = TRUE\r
801\r
802FILE RAW = 88888888-8888-8888-8888-888888888888 {\r
803 FD = Vlv\r
804 }\r
805\r
806[FV.BiosUpdateCargo]\r
807BlockSize = $(FLASH_BLOCK_SIZE)\r
808FvAlignment = 16\r
809ERASE_POLARITY = 1\r
810MEMORY_MAPPED = TRUE\r
811STICKY_WRITE = TRUE\r
812LOCK_CAP = TRUE\r
813LOCK_STATUS = TRUE\r
814WRITE_DISABLED_CAP = TRUE\r
815WRITE_ENABLED_CAP = TRUE\r
816WRITE_STATUS = TRUE\r
817WRITE_LOCK_CAP = TRUE\r
818WRITE_LOCK_STATUS = TRUE\r
819READ_DISABLED_CAP = TRUE\r
820READ_ENABLED_CAP = TRUE\r
821READ_STATUS = TRUE\r
822READ_LOCK_CAP = TRUE\r
823READ_LOCK_STATUS = TRUE\r
824\r
825\r
826\r
827[FV.BiosUpdate]\r
828BlockSize = $(FLASH_BLOCK_SIZE)\r
829FvAlignment = 16\r
830ERASE_POLARITY = 1\r
831MEMORY_MAPPED = TRUE\r
832STICKY_WRITE = TRUE\r
833LOCK_CAP = TRUE\r
834LOCK_STATUS = TRUE\r
835WRITE_DISABLED_CAP = TRUE\r
836WRITE_ENABLED_CAP = TRUE\r
837WRITE_STATUS = TRUE\r
838WRITE_LOCK_CAP = TRUE\r
839WRITE_LOCK_STATUS = TRUE\r
840READ_DISABLED_CAP = TRUE\r
841READ_ENABLED_CAP = TRUE\r
842READ_STATUS = TRUE\r
843READ_LOCK_CAP = TRUE\r
844READ_LOCK_STATUS = TRUE\r
845\r
846[Capsule.Capsule_Boot]\r
847#\r
848# gEfiCapsuleGuid supported by platform\r
849# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}\r
850#\r
851CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0\r
852CAPSULE_FLAGS = PersistAcrossReset\r
853CAPSULE_HEADER_SIZE = 0x20\r
854\r
855FV = BiosUpdate\r
856\r
857[Capsule.Capsule_Reset]\r
858#\r
859# gEfiCapsuleGuid supported by platform\r
860# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}\r
861#\r
862CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0\r
863CAPSULE_FLAGS = PersistAcrossReset\r
864CAPSULE_HEADER_SIZE = 0x20\r
865\r
866FV = BiosUpdate\r
867\r
868################################################################################\r
869#\r
870# Rules are use with the [FV] section's module INF type to define\r
871# how an FFS file is created for a given INF file. The following Rule are the default\r
872# rules for the different module type. User can add the customized rules to define the\r
873# content of the FFS file.\r
874#\r
875################################################################################\r
876[Rule.Common.SEC]\r
877 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
878 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
879 RAW BIN Align = 16 |.com\r
880 }\r
881\r
882[Rule.Common.SEC.BINARY]\r
883 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
884 PE32 PE32 Align = 8 |.efi\r
885 RAW BIN Align = 16 |.com\r
886 }\r
887\r
888[Rule.Common.PEI_CORE]\r
889 FILE PEI_CORE = $(NAMED_GUID) {\r
890 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
891 UI STRING="$(MODULE_NAME)" Optional\r
892 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
893 }\r
894\r
895[Rule.Common.PEIM]\r
896 FILE PEIM = $(NAMED_GUID) {\r
897 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
898 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
899 UI STRING="$(MODULE_NAME)" Optional\r
900 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
901 }\r
902\r
903[Rule.Common.PEIM.BINARY]\r
904 FILE PEIM = $(NAMED_GUID) {\r
905 PEI_DEPEX PEI_DEPEX Optional |.depex\r
906 PE32 PE32 Align = Auto |.efi\r
907 UI STRING="$(MODULE_NAME)" Optional\r
908 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
909 }\r
910\r
911[Rule.Common.PEIM.BIOSID]\r
912 FILE PEIM = $(NAMED_GUID) {\r
913 RAW BIN BiosId.bin\r
914 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
915 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
916 UI STRING="$(MODULE_NAME)" Optional\r
917 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
918 }\r
919\r
920[Rule.Common.USER_DEFINED.APINIT]\r
921 FILE RAW = $(NAMED_GUID) Fixed Align=4K {\r
922 RAW SEC_BIN |.com\r
923 }\r
924#cjia 2011-07-21\r
925[Rule.Common.USER_DEFINED.LEGACY16]\r
926 FILE FREEFORM = $(NAMED_GUID) {\r
927 UI STRING="$(MODULE_NAME)" Optional\r
928 RAW BIN |.bin\r
929 }\r
930#cjia\r
931\r
932[Rule.Common.USER_DEFINED.ASM16]\r
933 FILE FREEFORM = $(NAMED_GUID) {\r
934 UI STRING="$(MODULE_NAME)" Optional\r
935 RAW BIN |.com\r
936 }\r
937\r
938[Rule.Common.DXE_CORE]\r
939 FILE DXE_CORE = $(NAMED_GUID) {\r
940 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
941 UI STRING="$(MODULE_NAME)" Optional\r
942 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
943 }\r
944\r
945[Rule.Common.UEFI_DRIVER]\r
946 FILE DRIVER = $(NAMED_GUID) {\r
947 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
948 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
949 UI STRING="$(MODULE_NAME)" Optional\r
950 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
951 }\r
952\r
953[Rule.Common.UEFI_DRIVER.BINARY]\r
954 FILE DRIVER = $(NAMED_GUID) {\r
955 DXE_DEPEX DXE_DEPEX Optional |.depex\r
956 PE32 PE32 |.efi\r
957 UI STRING="$(MODULE_NAME)" Optional\r
958 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
959 }\r
960\r
961[Rule.Common.UEFI_DRIVER.NATIVE_BINARY]\r
962 FILE DRIVER = $(NAMED_GUID) {\r
963 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex\r
964 PE32 PE32 |.efi\r
965 UI STRING="$(MODULE_NAME)" Optional\r
966 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
967 }\r
968\r
969[Rule.Common.DXE_DRIVER]\r
970 FILE DRIVER = $(NAMED_GUID) {\r
971 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
972 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
973 UI STRING="$(MODULE_NAME)" Optional\r
974 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
975 }\r
976\r
977[Rule.Common.DXE_DRIVER.BINARY]\r
978 FILE DRIVER = $(NAMED_GUID) {\r
979 DXE_DEPEX DXE_DEPEX Optional |.depex\r
980 PE32 PE32 |.efi\r
981 UI STRING="$(MODULE_NAME)" Optional\r
982 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
983 }\r
984\r
985[Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]\r
986 FILE DRIVER = $(NAMED_GUID) {\r
987 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
988 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
989 UI STRING="$(MODULE_NAME)" Optional\r
990 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
991 RAW ACPI Optional |.acpi\r
992 RAW ASL Optional |.aml\r
993 }\r
994\r
995[Rule.Common.DXE_RUNTIME_DRIVER]\r
996 FILE DRIVER = $(NAMED_GUID) {\r
997 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
998 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
999 UI STRING="$(MODULE_NAME)" Optional\r
1000 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1001 }\r
1002\r
1003[Rule.Common.DXE_RUNTIME_DRIVER.BINARY]\r
1004 FILE DRIVER = $(NAMED_GUID) {\r
1005 DXE_DEPEX DXE_DEPEX Optional |.depex\r
1006 PE32 PE32 |.efi\r
1007 UI STRING="$(MODULE_NAME)" Optional\r
1008 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1009 }\r
1010\r
1011[Rule.Common.DXE_SMM_DRIVER]\r
1012 FILE SMM = $(NAMED_GUID) {\r
1013 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1014 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1015 UI STRING="$(MODULE_NAME)" Optional\r
1016 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1017 }\r
1018\r
1019[Rule.Common.DXE_SMM_DRIVER.BINARY]\r
1020 FILE SMM = $(NAMED_GUID) {\r
1021 SMM_DEPEX SMM_DEPEX |.depex\r
1022 PE32 PE32 |.efi\r
1023 RAW BIN Optional |.aml\r
1024 UI STRING="$(MODULE_NAME)" Optional\r
1025 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1026 }\r
1027\r
1028[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]\r
1029 FILE SMM = $(NAMED_GUID) {\r
1030 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1031 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1032 UI STRING="$(MODULE_NAME)" Optional\r
1033 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1034 RAW ACPI Optional |.acpi\r
1035 RAW ASL Optional |.aml\r
1036 }\r
1037\r
1038[Rule.Common.SMM_CORE]\r
1039 FILE SMM_CORE = $(NAMED_GUID) {\r
1040 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1041 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1042 UI STRING="$(MODULE_NAME)" Optional\r
1043 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1044 }\r
1045\r
1046[Rule.Common.SMM_CORE.BINARY]\r
1047 FILE SMM_CORE = $(NAMED_GUID) {\r
1048 DXE_DEPEX DXE_DEPEX Optional |.depex\r
1049 PE32 PE32 |.efi\r
1050 UI STRING="$(MODULE_NAME)" Optional\r
1051 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1052 }\r
1053\r
1054[Rule.Common.UEFI_APPLICATION]\r
1055 FILE APPLICATION = $(NAMED_GUID) {\r
1056 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1057 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1058 UI STRING="$(MODULE_NAME)" Optional\r
1059 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1060 }\r
1061\r
1062[Rule.Common.UEFI_APPLICATION.UI]\r
1063 FILE APPLICATION = $(NAMED_GUID) {\r
1064 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1065 UI STRING="Enter Setup"\r
1066 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1067 }\r
1068\r
1069[Rule.Common.USER_DEFINED]\r
1070 FILE FREEFORM = $(NAMED_GUID) {\r
1071 UI STRING="$(MODULE_NAME)" Optional\r
1072 RAW BIN |.bin\r
1073 }\r
1074\r
1075[Rule.Common.USER_DEFINED.ACPITABLE]\r
1076 FILE FREEFORM = $(NAMED_GUID) {\r
1077 RAW ACPI Optional |.acpi\r
1078 RAW ASL Optional |.aml\r
1079 }\r
1080\r
1081[Rule.Common.USER_DEFINED.ACPITABLE2]\r
1082 FILE FREEFORM = $(NAMED_GUID) {\r
1083 RAW ASL Optional |.aml\r
1084 }\r
1085\r
1086[Rule.Common.ACPITABLE]\r
1087 FILE FREEFORM = $(NAMED_GUID) {\r
1088 RAW ACPI Optional |.acpi\r
1089 RAW ASL Optional |.aml\r
1090 }\r
1091\r