projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 3cbfba02 DW |
1 | #/** @file\r |
| 2 | # platform configuration file.\r | |
| 3 | #\r | |
| c5a59080 | 4 | # Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>\r |
| 3cbfba02 DW |
5 | # \r\r |
| 6 | # This program and the accompanying materials are licensed and made available under\r\r | |
| 7 | # the terms and conditions of the BSD License that accompanies this distribution. \r\r | |
| 8 | # The full text of the license may be found at \r\r | |
| 9 | # http://opensource.org/licenses/bsd-license.php. \r\r | |
| 10 | # \r\r | |
| 11 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r | |
| 12 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r | |
| 13 | # \r\r | |
| 14 | #\r | |
| 15 | #**/\r | |
| 16 | \r | |
| 17 | #\r | |
| 18 | # TRUE is ENABLE. FASLE is DISABLE.\r | |
| 19 | #\r | |
| 20 | \r | |
| 21 | #\r | |
| 22 | # FSP selection\r | |
| 23 | #\r | |
| 24 | DEFINE MINNOW2_FSP_BUILD = FALSE\r | |
| 25 | \r | |
| 26 | \r | |
| 27 | DEFINE SCSI_ENABLE = TRUE\r | |
| 28 | \r | |
| 29 | \r | |
| 30 | #\r | |
| 31 | # To enable extra configuration for clk gen\r | |
| 32 | #\r | |
| 33 | DEFINE CLKGEN_CONFIG_EXTRA_ENABLE=TRUE\r | |
| 34 | \r | |
| 35 | #\r | |
| 36 | # Feature selection\r | |
| 37 | #\r | |
| 38 | \r | |
| 39 | #\r | |
| 40 | # Select system timer which is used to produce Timer Arch Protocol:\r | |
| 41 | # TRUE - HPET timer is used.\r | |
| 42 | # FALSE - 8254 timer is used.\r | |
| 43 | #\r | |
| 44 | DEFINE USE_HPET_TIMER = FALSE\r | |
| 45 | \r | |
| f4e7aa05 | 46 | \r |
| 3cbfba02 DW |
47 | #\r |
| 48 | # Feature selection\r | |
| 49 | #\r | |
| 50 | \r | |
| 51 | DEFINE TPM_ENABLED = FALSE\r | |
| 52 | \r | |
| 53 | DEFINE ACPI50_ENABLE = TRUE\r | |
| 54 | DEFINE PERFORMANCE_ENABLE = FALSE\r | |
| 55 | \r | |
| 56 | \r | |
| 57 | DEFINE LFMA_ENABLE = FALSE # Load module at fixed address feature\r | |
| 58 | DEFINE DXE_COMPRESS_ENABLE = TRUE\r | |
| 59 | DEFINE DXE_CRC32_SECTION_ENABLE = TRUE\r | |
| 60 | DEFINE SSE2_ENABLE = FALSE\r | |
| 61 | \r | |
| 62 | DEFINE SECURE_BOOT_ENABLE = TRUE\r | |
| 63 | DEFINE USER_IDENTIFICATION_ENABLE = FALSE\r | |
| 64 | DEFINE VARIABLE_INFO_ENABLE = FALSE\r | |
| 65 | DEFINE S3_ENABLE = TRUE\r | |
| eadc05bd | 66 | DEFINE CAPSULE_ENABLE = TRUE\r |
| 3cbfba02 | 67 | DEFINE CAPSULE_RESET_ENABLE = TRUE\r |
| c5a59080 JY |
68 | DEFINE RECOVERY_ENABLE = FALSE\r |
| 69 | DEFINE MICOCODE_CAPSULE_ENABLE = FALSE\r | |
| 3cbfba02 DW |
70 | \r |
| 71 | DEFINE GOP_DRIVER_ENABLE = TRUE\r | |
| 72 | DEFINE DATAHUB_ENABLE = TRUE\r | |
| 73 | DEFINE DATAHUB_STATUS_CODE_ENABLE = TRUE\r | |
| 74 | DEFINE USB_ENABLE = TRUE\r | |
| 75 | \r | |
| 76 | DEFINE ISA_SERIAL_STATUS_CODE_ENABLE = TRUE\r | |
| 77 | DEFINE USB_SERIAL_STATUS_CODE_ENABLE = FALSE\r | |
| 78 | DEFINE RAM_SERIAL_STATUS_CODE_ENABLE = FALSE\r | |
| 79 | \r | |
| 80 | DEFINE ENBDT_S3_SUPPORT = TRUE\r | |
| 81 | \r | |
| 82 | DEFINE LZMA_ENABLE = TRUE\r | |
| 83 | DEFINE S4_ENABLE = TRUE\r | |
| 84 | DEFINE NETWORK_ENABLE = TRUE\r | |
| 85 | DEFINE NETWORK_IP6_ENABLE = TRUE\r | |
| 86 | DEFINE NETWORK_ISCSI_ENABLE = FALSE\r | |
| 87 | DEFINE NETWORK_VLAN_ENABLE = FALSE\r | |
| 88 | \r | |
| 89 | DEFINE SATA_ENABLE = TRUE\r | |
| 90 | DEFINE PCIESC_ENABLE = TRUE\r | |
| 91 | \r | |
| 92 | #\r | |
| 93 | # Enable source level debug default\r | |
| 94 | #\r | |
| 95 | DEFINE SOURCE_DEBUG_ENABLE = FALSE\r | |
| 96 | \r | |
| 97 | \r | |
| 98 | \r | |
| 99 | \r |