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Fix comments error.
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkgGcc.fdf
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DW		 1#/** @file
2# FDF file of Platform.
3#
4# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
5#
6# This program and the accompanying materials are licensed and made available under
7# the terms and conditions of the BSD License that accompanies this distribution.
8# The full text of the license may be found at
9# http://opensource.org/licenses/bsd-license.php.
10#
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13#
14#
15#**/
16
17[Defines]
18DEFINE FLASH_BASE = 0xFFD00000 #The base address of the 3Mb FLASH Device.
19DEFINE FLASH_SIZE = 0x00300000 #The flash size in bytes of the 3Mb FLASH Device.
20DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 3Mb FLASH Device.
21DEFINE FLASH_NUM_BLOCKS = 0x300 #The number of blocks in 3Mb FLASH Device.
22DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
23DEFINE FLASH_AREA_SIZE = 0x00800000
24
25
26DEFINE FLASH_REGION_VPD_OFFSET = 0x00000000
27DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
28
29DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0003E000
30DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
31
32
33DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00040000
34DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
35
36!if $(MINNOW2_FSP_BUILD) == TRUE
37DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000B0000
38DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
39DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000
40
41DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x000F8000
42DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
43DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000
44
45!endif
46
47DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00100000
48DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00030000
49DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFE00000
50
51DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00130000
52DEFINE FLASH_REGION_FVMAIN_SIZE = 0x0016C000
53
54
55DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x0029C000
56DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002F000
57
58DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x002CB000
59DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00035000
60
61################################################################################
62#
63# FD Section
64# The [FD] Section is made up of the definition statements and a
65# description of what goes into the Flash Device Image. Each FD section
66# defines one flash "device" image. A flash device image may be one of
67# the following: Removable media bootable image (like a boot floppy
68# image,) an Option ROM image (that would be "flashed" into an add-in
69# card,) a System "Flash" image (that would be burned into a system's
70# flash) or an Update ("Capsule") image that will be used to update and
71# existing system flash.
72#
73################################################################################
74[FD.Vlv]
75BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
76Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
77ErasePolarity = 1
78BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
79NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
80
81#
82#Flash location override based on actual flash map
83#
84SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
85SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
86
87!if $(MINNOW2_FSP_BUILD) == TRUE
88# put below PCD value setting into dsc file
89#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
90#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
91#SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
92#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
93#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
94#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
95#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
96
97!endif
98################################################################################
99#
100# Following are lists of FD Region layout which correspond to the locations of different
101# images within the flash device.
102#
103# Regions must be defined in ascending order and may not overlap.
104#
105# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
106# the pipe "|" character, followed by the size of the region, also in hex with the leading
107# "0x" characters. Like:
108# Offset|Size
109# PcdOffsetCName|PcdSizeCName
110# RegionType <FV, DATA, or FILE>
111# Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
112#
113################################################################################
114# Since the Fce tool don't have gcc version, we can't handle default variable in Linux,
115# so we hardcode the default value of variable here.
116# Please note that we MUST update the binary once the default value is changed.
117$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
118gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
119FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin
120
121$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
122gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
123FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin
124
125$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
126gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
127FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin
128
129!if $(MINNOW2_FSP_BUILD) == TRUE
130
131 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
132 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
133 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin
134
135
136 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
137 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
138
139!endif
140 #
141 # CPU Microcodes
142 #
143
144$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
145gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
146FV = MICROCODE_FV
147
148 #
149 # Main Block
150 #
151$(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
152gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
153FV = FVMAIN_COMPACT
154
155 #
156 # FV Recovery#2
157 #
158$(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
159gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
160FV = FVRECOVERY2
161
162 #
163 # FV Recovery
164 #
165$(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
166gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
167FV = FVRECOVERY
168
169################################################################################
170#
171# FV Section
172#
173# [FV] section is used to define what components or modules are placed within a flash
174# device file. This section also defines order the components and modules are positioned
175# within the image. The [FV] section consists of define statements, set statements and
176# module statements.
177#
178################################################################################
179[FV.MICROCODE_FV]
180BlockSize = $(FLASH_BLOCK_SIZE)
181FvAlignment = 16
182ERASE_POLARITY = 1
183MEMORY_MAPPED = TRUE
184STICKY_WRITE = TRUE
185LOCK_CAP = TRUE
186LOCK_STATUS = FALSE
187WRITE_DISABLED_CAP = TRUE
188WRITE_ENABLED_CAP = TRUE
189WRITE_STATUS = TRUE
190WRITE_LOCK_CAP = TRUE
191WRITE_LOCK_STATUS = TRUE
192READ_DISABLED_CAP = TRUE
193READ_ENABLED_CAP = TRUE
194READ_STATUS = TRUE
195READ_LOCK_CAP = TRUE
196READ_LOCK_STATUS = TRUE
197
198FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
199 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
200}
201
202################################################################################
203#
204# FV Section
205#
206# [FV] section is used to define what components or modules are placed within a flash
207# device file. This section also defines order the components and modules are positioned
208# within the image. The [FV] section consists of define statements, set statements and
209# module statements.
210#
211################################################################################
212[FV.FVRECOVERY2]
213BlockSize = $(FLASH_BLOCK_SIZE)
214FvAlignment = 16 #FV alignment and FV attributes setting.
215ERASE_POLARITY = 1
216MEMORY_MAPPED = TRUE
217STICKY_WRITE = TRUE
218LOCK_CAP = TRUE
219LOCK_STATUS = TRUE
220WRITE_DISABLED_CAP = TRUE
221WRITE_ENABLED_CAP = TRUE
222WRITE_STATUS = TRUE
223WRITE_LOCK_CAP = TRUE
224WRITE_LOCK_STATUS = TRUE
225READ_DISABLED_CAP = TRUE
226READ_ENABLED_CAP = TRUE
227READ_STATUS = TRUE
228READ_LOCK_CAP = TRUE
229READ_LOCK_STATUS = TRUE
230FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
231
232
233
234INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
235
236!if $(MINNOW2_FSP_BUILD) == FALSE
237INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
238INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
239INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
240INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
241INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
242INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
243INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
244INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
245INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
246!endif
247
248INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
249!if $(TPM_ENABLED) == TRUE
250INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf
251INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
252INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
253!endif
254INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
255
256!if $(ACPI50_ENABLE) == TRUE
257 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
258!endif
259!if $(PERFORMANCE_ENABLE) == TRUE
260INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
261!endif
262
263[FV.FVRECOVERY]
264BlockSize = $(FLASH_BLOCK_SIZE)
265FvAlignment = 16 #FV alignment and FV attributes setting.
266ERASE_POLARITY = 1
267MEMORY_MAPPED = TRUE
268STICKY_WRITE = TRUE
269LOCK_CAP = TRUE
270LOCK_STATUS = TRUE
271WRITE_DISABLED_CAP = TRUE
272WRITE_ENABLED_CAP = TRUE
273WRITE_STATUS = TRUE
274WRITE_LOCK_CAP = TRUE
275WRITE_LOCK_STATUS = TRUE
276READ_DISABLED_CAP = TRUE
277READ_ENABLED_CAP = TRUE
278READ_STATUS = TRUE
279READ_LOCK_CAP = TRUE
280READ_LOCK_STATUS = TRUE
281FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
282
283
284!if $(MINNOW2_FSP_BUILD) == TRUE
285INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
286!else
287INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
288!endif
289
290INF MdeModulePkg/Core/Pei/PeiMain.inf
291!if $(MINNOW2_FSP_BUILD) == TRUE
292INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
293INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
294!endif
295INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
296INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
297!if $(SECURE_BOOT_ENABLE) == TRUE
298INF SecurityPkg/VariableAuthenticated/Pei/VariablePei.inf
299!else
300INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
301!endif
302
303INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
304
305!if $(MINNOW2_FSP_BUILD) == FALSE
306INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
307!endif
308
309!if $(SOURCE_DEBUG_ENABLE) == TRUE
310 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
311!endif
312
313
314!if $(CAPSULE_ENABLE) == TRUE
315INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
316INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
317!endif
318
319!if $(MINNOW2_FSP_BUILD) == FALSE
320!if $(PCIESC_ENABLE) == TRUE
321INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
322!endif
323INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
324!endif
325
326INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
327
328[FV.FVMAIN]
329BlockSize = $(FLASH_BLOCK_SIZE)
330FvAlignment = 16
331ERASE_POLARITY = 1
332MEMORY_MAPPED = TRUE
333STICKY_WRITE = TRUE
334LOCK_CAP = TRUE
335LOCK_STATUS = TRUE
336WRITE_DISABLED_CAP = TRUE
337WRITE_ENABLED_CAP = TRUE
338WRITE_STATUS = TRUE
339WRITE_LOCK_CAP = TRUE
340WRITE_LOCK_STATUS = TRUE
341READ_DISABLED_CAP = TRUE
342READ_ENABLED_CAP = TRUE
343READ_STATUS = TRUE
344READ_LOCK_CAP = TRUE
345READ_LOCK_STATUS = TRUE
346FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
347
348APRIORI DXE {
349 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
350 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
351 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
352 }
353
354FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
355 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
356 }
357
358 #
359 # EDK II Related Platform codes
360 #
361
362 !if $(MINNOW2_FSP_BUILD) == TRUE
363 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
364 !endif
365
366INF MdeModulePkg/Core/Dxe/DxeMain.inf
367INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
368!if $(ACPI50_ENABLE) == TRUE
369INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
370INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
371!endif
372
373
374INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
375INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
376INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
377INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
378INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
379INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
380INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
381INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
382INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
383INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
384INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
385INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
386INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
387
388!if $(SECURE_BOOT_ENABLE)
389INF SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableSmmRuntimeDxe.inf
390INF SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableSmm.inf
391INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
392INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
393INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
394INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
395!else
396INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
397INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
398INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
399INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
400INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
401!endif
402
403INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
404
405INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
406INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
407INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
408INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
409
410
411INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
412
413!if $(DATAHUB_ENABLE) == TRUE
414INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
415!endif
416INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
417INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
418
419INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
420
421 #
422 # EDK II Related Silicon codes
423 #
424INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
425
426!if $(USE_HPET_TIMER) == TRUE
427INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
428!else
429INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
430!endif
431INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
432
433INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
434
435INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
436INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
437
438!if $(MINNOW2_FSP_BUILD) == FALSE
439INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
440!endif
441INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
442!if $(PCIESC_ENABLE) == TRUE
443INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
444!endif
445
446INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
447INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
448INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
449INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
450INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
451!if $(MINNOW2_FSP_BUILD) == FALSE
452INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
453!else
454INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
455INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
456!endif
457!if $(TPM_ENABLED) == TRUE
458INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
459INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
460INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
461!endif
462
463#
464# EDK II Related Platform codes
465#
466INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
467INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
468INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
469INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
470INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
471INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
472INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
473INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
474INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
475!if $(GOP_DRIVER_ENABLE) == TRUE
476 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
477 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
478 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
479 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
480 SECTION UI = "IntelGopDriver"
481}
482!endif
483
484INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
485 #
486 # SMM
487 #
488INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
489INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
490INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCpuDxeSmm.inf
491
492INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
493INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
494INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCommunicationSmm.inf
495INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
496INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
497# INF Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/Dts/Smm/DigitalThermalSensor.inf
498 #
499 # ACPI
500 #
501INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
502INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
503INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
504INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
505
506INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
507
508INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
509
510 #
511 # PCI
512 #
513INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
514
515INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
516
517
518#
519# ISA
520#
521INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
522INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
523INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
524!if $(SOURCE_DEBUG_ENABLE) != TRUE
525INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
526!endif
1b354b08
TH		 527#INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
528#INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
3cbfba02
DW		 529
530#
531# SDIO
532#
533INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
534INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
535#
536# IDE/SCSI/AHCI
537#
538INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
539
540INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
541
542INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
543!if $(SATA_ENABLE) == TRUE
544INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
545#
546
547#
548INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
549INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
550!if $(SCSI_ENABLE) == TRUE
551INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
552INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
553!endif
554#
555!endif
556# Console
557#
558INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
559INF Vlv2TbltDevicePkg/Override/MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
560INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
561INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
562INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
563INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
564INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
565INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
566 #
567 # USB
568 #
569!if $(USB_ENABLE) == TRUE
570INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
571INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
572INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
573INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
574INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
575INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
576INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
577!endif
578
579 #
580 # ECP
581 #
582INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf
583INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf
584INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf
585INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf
586INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf
587INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf
588 #
589 # SMBIOS
590 #
591INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
592INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
593
594INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
595
596 #
597 # Legacy Modules
598 #
599INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
600
601#
602# FAT file system
603#
604FILE DRIVER = 961578FE-B6B7-44c3-AF35-6BC705CD2B1F {
605 SECTION PE32 = FatBinPkg/EnhancedFatDxe/$(EDK_DXE_ARCHITECTURE)/Fat.efi
606 }
607#
608# UEFI Shell
609#
610FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
611# SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
612 SECTION PE32 = EdkShellBinPkg/MinimumShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
613 }
614
615
616
617!if $(GOP_DRIVER_ENABLE) == TRUE
618FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
619 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
620 SECTION UI = "IntelGopVbt"
621}
622!endif
623
624#
625# Network Modules
626#
627!if $(NETWORK_ENABLE) == TRUE
628 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
629 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
630 SECTION UI = "UNDI"
631 }
632 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
633 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
634 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
635 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
636 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
637 INF MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf
638 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
639 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
640 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
641 !if $(NETWORK_IP6_ENABLE) == TRUE
642 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
643 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
644 INF NetworkPkg/IpSecDxe/IpSecDxe.inf
645 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
646 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
647 !endif
648 !if $(NETWORK_IP6_ENABLE) == TRUE
649 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
650 INF NetworkPkg/TcpDxe/TcpDxe.inf
651 !else
652 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
653 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
654 !endif
655 !if $(NETWORK_VLAN_ENABLE) == TRUE
656 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
657 !endif
658 !if $(NETWORK_ISCSI_ENABLE) == TRUE
659 !if $(NETWORK_IP6_ENABLE) == TRUE
660 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
661 !else
662 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
663 !endif
664 !endif
665!endif
666
667[FV.FVMAIN_COMPACT]
668BlockSize = $(FLASH_BLOCK_SIZE)
669FvAlignment = 16
670ERASE_POLARITY = 1
671MEMORY_MAPPED = TRUE
672STICKY_WRITE = TRUE
673LOCK_CAP = TRUE
674LOCK_STATUS = TRUE
675WRITE_DISABLED_CAP = TRUE
676WRITE_ENABLED_CAP = TRUE
677WRITE_STATUS = TRUE
678WRITE_LOCK_CAP = TRUE
679WRITE_LOCK_STATUS = TRUE
680READ_DISABLED_CAP = TRUE
681READ_ENABLED_CAP = TRUE
682READ_STATUS = TRUE
683READ_LOCK_CAP = TRUE
684READ_LOCK_STATUS = TRUE
685
686
687
688FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
689!if $(LZMA_ENABLE) == TRUE
690# LZMA Compress
691 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
692 SECTION FV_IMAGE = FVMAIN
693 }
694!else
695!if $(DXE_COMPRESS_ENABLE) == TRUE
696# Tiano Compress
697 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
698 SECTION FV_IMAGE = FVMAIN
699 }
700!else
701# No Compress
702 SECTION COMPRESS PI_NONE {
703 SECTION FV_IMAGE = FVMAIN
704 }
705!endif
706!endif
707 }
708
709[FV.SETUP_DATA]
710BlockSize = $(FLASH_BLOCK_SIZE)
711#NumBlocks = 0x10
712FvAlignment = 16
713ERASE_POLARITY = 1
714MEMORY_MAPPED = TRUE
715STICKY_WRITE = TRUE
716LOCK_CAP = TRUE
717LOCK_STATUS = TRUE
718WRITE_DISABLED_CAP = TRUE
719WRITE_ENABLED_CAP = TRUE
720WRITE_STATUS = TRUE
721WRITE_LOCK_CAP = TRUE
722WRITE_LOCK_STATUS = TRUE
723READ_DISABLED_CAP = TRUE
724READ_ENABLED_CAP = TRUE
725READ_STATUS = TRUE
726READ_LOCK_CAP = TRUE
727READ_LOCK_STATUS = TRUE
728
729
730[FV.Update_Data]
731BlockSize = $(FLASH_BLOCK_SIZE)
732FvAlignment = 16
733ERASE_POLARITY = 1
734MEMORY_MAPPED = TRUE
735STICKY_WRITE = TRUE
736LOCK_CAP = TRUE
737LOCK_STATUS = TRUE
738WRITE_DISABLED_CAP = TRUE
739WRITE_ENABLED_CAP = TRUE
740WRITE_STATUS = TRUE
741WRITE_LOCK_CAP = TRUE
742WRITE_LOCK_STATUS = TRUE
743READ_DISABLED_CAP = TRUE
744READ_ENABLED_CAP = TRUE
745READ_STATUS = TRUE
746READ_LOCK_CAP = TRUE
747READ_LOCK_STATUS = TRUE
748
749FILE RAW = 88888888-8888-8888-8888-888888888888 {
750 FD = Vlv
751 }
752
753[FV.BiosUpdateCargo]
754BlockSize = $(FLASH_BLOCK_SIZE)
755FvAlignment = 16
756ERASE_POLARITY = 1
757MEMORY_MAPPED = TRUE
758STICKY_WRITE = TRUE
759LOCK_CAP = TRUE
760LOCK_STATUS = TRUE
761WRITE_DISABLED_CAP = TRUE
762WRITE_ENABLED_CAP = TRUE
763WRITE_STATUS = TRUE
764WRITE_LOCK_CAP = TRUE
765WRITE_LOCK_STATUS = TRUE
766READ_DISABLED_CAP = TRUE
767READ_ENABLED_CAP = TRUE
768READ_STATUS = TRUE
769READ_LOCK_CAP = TRUE
770READ_LOCK_STATUS = TRUE
771
772
773
774[FV.BiosUpdate]
775BlockSize = $(FLASH_BLOCK_SIZE)
776FvAlignment = 16
777ERASE_POLARITY = 1
778MEMORY_MAPPED = TRUE
779STICKY_WRITE = TRUE
780LOCK_CAP = TRUE
781LOCK_STATUS = TRUE
782WRITE_DISABLED_CAP = TRUE
783WRITE_ENABLED_CAP = TRUE
784WRITE_STATUS = TRUE
785WRITE_LOCK_CAP = TRUE
786WRITE_LOCK_STATUS = TRUE
787READ_DISABLED_CAP = TRUE
788READ_ENABLED_CAP = TRUE
789READ_STATUS = TRUE
790READ_LOCK_CAP = TRUE
791READ_LOCK_STATUS = TRUE
792
793[Capsule.Capsule_Boot]
794#
795# gEfiCapsuleGuid supported by platform
796# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
797#
798CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
799CAPSULE_FLAGS = PersistAcrossReset
800CAPSULE_HEADER_SIZE = 0x20
801
802FV = BiosUpdate
803
804[Capsule.Capsule_Reset]
805#
806# gEfiCapsuleGuid supported by platform
807# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
808#
809CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
810CAPSULE_FLAGS = PersistAcrossReset
811CAPSULE_HEADER_SIZE = 0x20
812
813FV = BiosUpdate
814
815################################################################################
816#
817# Rules are use with the [FV] section's module INF type to define
818# how an FFS file is created for a given INF file. The following Rule are the default
819# rules for the different module type. User can add the customized rules to define the
820# content of the FFS file.
821#
822################################################################################
823[Rule.Common.SEC]
824 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
825 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
826 RAW BIN Align = 16 |.com
827 }
828
829[Rule.Common.SEC.BINARY]
830 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
831 PE32 PE32 Align = 8 |.efi
832 RAW BIN Align = 16 |.com
833 }
834
835[Rule.Common.PEI_CORE]
836 FILE PEI_CORE = $(NAMED_GUID) {
837 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
838 UI STRING="$(MODULE_NAME)" Optional
839 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
840 }
841
842[Rule.Common.PEIM]
843 FILE PEIM = $(NAMED_GUID) {
844 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
845 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
846 UI STRING="$(MODULE_NAME)" Optional
847 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
848 }
849
850[Rule.Common.PEIM.BINARY]
851 FILE PEIM = $(NAMED_GUID) {
852 PEI_DEPEX PEI_DEPEX Optional |.depex
853 PE32 PE32 Align = Auto |.efi
854 UI STRING="$(MODULE_NAME)" Optional
855 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
856 }
857
858[Rule.Common.PEIM.BIOSID]
859 FILE PEIM = $(NAMED_GUID) {
860 RAW BIN BiosId.bin
861 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
862 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
863 UI STRING="$(MODULE_NAME)" Optional
864 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
865 }
866
867[Rule.Common.USER_DEFINED.APINIT]
868 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
869 RAW SEC_BIN |.com
870 }
871#cjia 2011-07-21
872[Rule.Common.USER_DEFINED.LEGACY16]
873 FILE FREEFORM = $(NAMED_GUID) {
874 UI STRING="$(MODULE_NAME)" Optional
875 RAW BIN |.bin
876 }
877#cjia
878
879[Rule.Common.USER_DEFINED.ASM16]
880 FILE FREEFORM = $(NAMED_GUID) {
881 UI STRING="$(MODULE_NAME)" Optional
882 RAW BIN |.com
883 }
884
885[Rule.Common.DXE_CORE]
886 FILE DXE_CORE = $(NAMED_GUID) {
887 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
888 UI STRING="$(MODULE_NAME)" Optional
889 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
890 }
891
892[Rule.Common.UEFI_DRIVER]
893 FILE DRIVER = $(NAMED_GUID) {
894 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
895 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
896 UI STRING="$(MODULE_NAME)" Optional
897 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
898 }
899
900[Rule.Common.UEFI_DRIVER.BINARY]
901 FILE DRIVER = $(NAMED_GUID) {
902 DXE_DEPEX DXE_DEPEX Optional |.depex
903 PE32 PE32 |.efi
904 UI STRING="$(MODULE_NAME)" Optional
905 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
906 }
907
908[Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
909 FILE DRIVER = $(NAMED_GUID) {
910 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
911 PE32 PE32 |.efi
912 UI STRING="$(MODULE_NAME)" Optional
913 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
914 }
915
916[Rule.Common.DXE_DRIVER]
917 FILE DRIVER = $(NAMED_GUID) {
918 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
919 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
920 UI STRING="$(MODULE_NAME)" Optional
921 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
922 }
923
924[Rule.Common.DXE_DRIVER.BINARY]
925 FILE DRIVER = $(NAMED_GUID) {
926 DXE_DEPEX DXE_DEPEX Optional |.depex
927 PE32 PE32 |.efi
928 UI STRING="$(MODULE_NAME)" Optional
929 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
930 }
931
932[Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
933 FILE DRIVER = $(NAMED_GUID) {
934 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
935 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
936 UI STRING="$(MODULE_NAME)" Optional
937 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
938 RAW ACPI Optional |.acpi
939 RAW ASL Optional |.aml
940 }
941
942[Rule.Common.DXE_RUNTIME_DRIVER]
943 FILE DRIVER = $(NAMED_GUID) {
944 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
945 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
946 UI STRING="$(MODULE_NAME)" Optional
947 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
948 }
949
950[Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
951 FILE DRIVER = $(NAMED_GUID) {
952 DXE_DEPEX DXE_DEPEX Optional |.depex
953 PE32 PE32 |.efi
954 UI STRING="$(MODULE_NAME)" Optional
955 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
956 }
957
958[Rule.Common.DXE_SMM_DRIVER]
959 FILE SMM = $(NAMED_GUID) {
960 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
961 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
962 UI STRING="$(MODULE_NAME)" Optional
963 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
964 }
965
966[Rule.Common.DXE_SMM_DRIVER.BINARY]
967 FILE SMM = $(NAMED_GUID) {
968 SMM_DEPEX SMM_DEPEX |.depex
969 PE32 PE32 |.efi
970 UI STRING="$(MODULE_NAME)" Optional
971 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
972 }
973
974[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
975 FILE SMM = $(NAMED_GUID) {
976 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
977 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
978 UI STRING="$(MODULE_NAME)" Optional
979 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
980 RAW ACPI Optional |.acpi
981 RAW ASL Optional |.aml
982 }
983
984[Rule.Common.SMM_CORE]
985 FILE SMM_CORE = $(NAMED_GUID) {
986 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
987 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
988 UI STRING="$(MODULE_NAME)" Optional
989 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
990 }
991
992[Rule.Common.SMM_CORE.BINARY]
993 FILE SMM_CORE = $(NAMED_GUID) {
994 DXE_DEPEX DXE_DEPEX Optional |.depex
995 PE32 PE32 |.efi
996 UI STRING="$(MODULE_NAME)" Optional
997 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
998 }
999
1000[Rule.Common.UEFI_APPLICATION]
1001 FILE APPLICATION = $(NAMED_GUID) {
1002 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1003 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1004 UI STRING="$(MODULE_NAME)" Optional
1005 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1006 }
1007
1008[Rule.Common.UEFI_APPLICATION.UI]
1009 FILE APPLICATION = $(NAMED_GUID) {
1010 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1011 UI STRING="Enter Setup"
1012 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1013 }
1014
1015[Rule.Common.USER_DEFINED]
1016 FILE FREEFORM = $(NAMED_GUID) {
1017 UI STRING="$(MODULE_NAME)" Optional
1018 RAW BIN |.bin
1019 }
1020
1021[Rule.Common.USER_DEFINED.ACPITABLE]
1022 FILE FREEFORM = $(NAMED_GUID) {
1023 RAW ACPI Optional |.acpi
1024 RAW ASL Optional |.aml
1025 }
1026
1027[Rule.Common.USER_DEFINED.ACPITABLE2]
1028 FILE FREEFORM = $(NAMED_GUID) {
1029 RAW ASL Optional |.aml
1030 }
1031
1032[Rule.Common.ACPITABLE]
1033 FILE FREEFORM = $(NAMED_GUID) {
1034 RAW ACPI Optional |.acpi
1035 RAW ASL Optional |.aml
1036 }
1037
EFI Development Kit II mirror for PVE