| 5e752084 |
1 | #/** @file\r |
| 2 | # FDF file of Platform.\r |
| 3 | #\r |
| 4 | # Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>\r |
| 5 | #\r |
| 6 | # This program and the accompanying materials are licensed and made available under\r |
| 7 | # the terms and conditions of the BSD License that accompanies this distribution.\r |
| 8 | # The full text of the license may be found at\r |
| 9 | # http://opensource.org/licenses/bsd-license.php.\r |
| 10 | #\r |
| 11 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
| 12 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
| 13 | #\r |
| 14 | #\r |
| 15 | #**/\r |
| 16 | \r |
| 17 | [Defines]\r |
| 18 | DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.\r |
| 19 | DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.\r |
| 20 | DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.\r |
| 21 | DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.\r |
| 22 | DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000\r |
| 23 | DEFINE FLASH_AREA_SIZE = 0x00800000\r |
| 24 | \r |
| 25 | DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000\r |
| 26 | DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000\r |
| 27 | DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000\r |
| 28 | \r |
| 29 | DEFINE FLASH_REGION_VPD_OFFSET = 0x00130000\r |
| 30 | DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000\r |
| 31 | \r |
| 32 | DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0016E000\r |
| 33 | DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000\r |
| 34 | \r |
| 35 | \r |
| 36 | DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00170000\r |
| 37 | DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000\r |
| 38 | \r |
| 39 | !if $(MINNOW2_FSP_BUILD) == TRUE\r |
| 40 | DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x001B0000\r |
| 41 | DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000\r |
| 42 | DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000\r |
| 43 | \r |
| 44 | DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x001F8000\r |
| 45 | DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000\r |
| 46 | DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000\r |
| 47 | \r |
| 48 | !endif\r |
| 49 | \r |
| 50 | DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00200000\r |
| 51 | DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00196000\r |
| 52 | \r |
| 53 | DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00396000\r |
| 54 | DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002C000\r |
| 55 | \r |
| 56 | DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x003C2000\r |
| 57 | DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x0003E000\r |
| 58 | \r |
| 59 | ################################################################################\r |
| 60 | #\r |
| 61 | # FD Section\r |
| 62 | # The [FD] Section is made up of the definition statements and a\r |
| 63 | # description of what goes into the Flash Device Image. Each FD section\r |
| 64 | # defines one flash "device" image. A flash device image may be one of\r |
| 65 | # the following: Removable media bootable image (like a boot floppy\r |
| 66 | # image,) an Option ROM image (that would be "flashed" into an add-in\r |
| 67 | # card,) a System "Flash" image (that would be burned into a system's\r |
| 68 | # flash) or an Update ("Capsule") image that will be used to update and\r |
| 69 | # existing system flash.\r |
| 70 | #\r |
| 71 | ################################################################################\r |
| 72 | [FD.Vlv]\r |
| 73 | BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.\r |
| 74 | Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.\r |
| 75 | ErasePolarity = 1\r |
| 76 | BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.\r |
| 77 | NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.\r |
| 78 | \r |
| 79 | #\r |
| 80 | #Flash location override based on actual flash map\r |
| 81 | #\r |
| 82 | SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)\r |
| 83 | SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)\r |
| 84 | \r |
| 85 | !if $(MINNOW2_FSP_BUILD) == TRUE\r |
| 86 | # put below PCD value setting into dsc file\r |
| 87 | #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)\r |
| 88 | #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)\r |
| 89 | #SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60\r |
| 90 | #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)\r |
| 91 | #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)\r |
| 92 | #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)\r |
| 93 | #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)\r |
| 94 | \r |
| 95 | !endif\r |
| 96 | ################################################################################\r |
| 97 | #\r |
| 98 | # Following are lists of FD Region layout which correspond to the locations of different\r |
| 99 | # images within the flash device.\r |
| 100 | #\r |
| 101 | # Regions must be defined in ascending order and may not overlap.\r |
| 102 | #\r |
| 103 | # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r |
| 104 | # the pipe "|" character, followed by the size of the region, also in hex with the leading\r |
| 105 | # "0x" characters. Like:\r |
| 106 | # Offset|Size\r |
| 107 | # PcdOffsetCName|PcdSizeCName\r |
| 108 | # RegionType <FV, DATA, or FILE>\r |
| 109 | # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000\r |
| 110 | #\r |
| 111 | ################################################################################\r |
| 112 | # Since the Fce tool don't have gcc version, we can't handle default variable in Linux,\r |
| 113 | # so we hardcode the default value of variable here.\r |
| 114 | # Please note that we MUST update the binary once the default value is changed.\r |
| 115 | \r |
| 116 | #\r |
| 117 | # CPU Microcodes\r |
| 118 | #\r |
| 119 | \r |
| 120 | $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)\r |
| 121 | gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize\r |
| 122 | FV = MICROCODE_FV\r |
| 123 | \r |
| 124 | $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)\r |
| 125 | gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r |
| 126 | FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin\r |
| 127 | \r |
| 128 | $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)\r |
| 129 | gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\r |
| 130 | FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin\r |
| 131 | \r |
| 132 | $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)\r |
| 133 | gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r |
| 134 | FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin\r |
| 135 | \r |
| 136 | !if $(MINNOW2_FSP_BUILD) == TRUE\r |
| 137 | \r |
| 138 | $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)\r |
| 139 | gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize\r |
| 140 | FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin\r |
| 141 | \r |
| 142 | \r |
| 143 | $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)\r |
| 144 | FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin\r |
| 145 | \r |
| 146 | !endif\r |
| 147 | \r |
| 148 | #\r |
| 149 | # Main Block\r |
| 150 | #\r |
| 151 | $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)\r |
| 152 | gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize\r |
| 153 | FV = FVMAIN_COMPACT\r |
| 154 | \r |
| 155 | #\r |
| 156 | # FV Recovery#2\r |
| 157 | #\r |
| 158 | $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)\r |
| 159 | gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size\r |
| 160 | FV = FVRECOVERY2\r |
| 161 | \r |
| 162 | #\r |
| 163 | # FV Recovery\r |
| 164 | #\r |
| 165 | $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)\r |
| 166 | gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize\r |
| 167 | FV = FVRECOVERY\r |
| 168 | \r |
| 169 | ################################################################################\r |
| 170 | #\r |
| 171 | # FV Section\r |
| 172 | #\r |
| 173 | # [FV] section is used to define what components or modules are placed within a flash\r |
| 174 | # device file. This section also defines order the components and modules are positioned\r |
| 175 | # within the image. The [FV] section consists of define statements, set statements and\r |
| 176 | # module statements.\r |
| 177 | #\r |
| 178 | ################################################################################\r |
| 179 | [FV.MICROCODE_FV]\r |
| 180 | BlockSize = $(FLASH_BLOCK_SIZE)\r |
| 181 | FvAlignment = 16\r |
| 182 | ERASE_POLARITY = 1\r |
| 183 | MEMORY_MAPPED = TRUE\r |
| 184 | STICKY_WRITE = TRUE\r |
| 185 | LOCK_CAP = TRUE\r |
| 186 | LOCK_STATUS = FALSE\r |
| 187 | WRITE_DISABLED_CAP = TRUE\r |
| 188 | WRITE_ENABLED_CAP = TRUE\r |
| 189 | WRITE_STATUS = TRUE\r |
| 190 | WRITE_LOCK_CAP = TRUE\r |
| 191 | WRITE_LOCK_STATUS = TRUE\r |
| 192 | READ_DISABLED_CAP = TRUE\r |
| 193 | READ_ENABLED_CAP = TRUE\r |
| 194 | READ_STATUS = TRUE\r |
| 195 | READ_LOCK_CAP = TRUE\r |
| 196 | READ_LOCK_STATUS = TRUE\r |
| 197 | \r |
| 198 | FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {\r |
| 199 | $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin\r |
| 200 | }\r |
| 201 | \r |
| 202 | ################################################################################\r |
| 203 | #\r |
| 204 | # FV Section\r |
| 205 | #\r |
| 206 | # [FV] section is used to define what components or modules are placed within a flash\r |
| 207 | # device file. This section also defines order the components and modules are positioned\r |
| 208 | # within the image. The [FV] section consists of define statements, set statements and\r |
| 209 | # module statements.\r |
| 210 | #\r |
| 211 | ################################################################################\r |
| 212 | [FV.FVRECOVERY2]\r |
| 213 | BlockSize = $(FLASH_BLOCK_SIZE)\r |
| 214 | FvAlignment = 16 #FV alignment and FV attributes setting.\r |
| 215 | ERASE_POLARITY = 1\r |
| 216 | MEMORY_MAPPED = TRUE\r |
| 217 | STICKY_WRITE = TRUE\r |
| 218 | LOCK_CAP = TRUE\r |
| 219 | LOCK_STATUS = TRUE\r |
| 220 | WRITE_DISABLED_CAP = TRUE\r |
| 221 | WRITE_ENABLED_CAP = TRUE\r |
| 222 | WRITE_STATUS = TRUE\r |
| 223 | WRITE_LOCK_CAP = TRUE\r |
| 224 | WRITE_LOCK_STATUS = TRUE\r |
| 225 | READ_DISABLED_CAP = TRUE\r |
| 226 | READ_ENABLED_CAP = TRUE\r |
| 227 | READ_STATUS = TRUE\r |
| 228 | READ_LOCK_CAP = TRUE\r |
| 229 | READ_LOCK_STATUS = TRUE\r |
| 230 | FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092\r |
| 231 | \r |
| 232 | \r |
| 233 | \r |
| 234 | INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf\r |
| 235 | \r |
| 236 | !if $(MINNOW2_FSP_BUILD) == FALSE\r |
| 237 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf\r |
| 238 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf\r |
| 239 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf\r |
| 240 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf\r |
| 241 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf\r |
| 242 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf\r |
| 243 | INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf\r |
| 244 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf\r |
| 245 | INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf\r |
| 246 | !endif\r |
| 247 | \r |
| 248 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf\r |
| 249 | !if $(TPM_ENABLED) == TRUE\r |
| 250 | INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf\r |
| 251 | INF SecurityPkg/Tcg/TcgPei/TcgPei.inf\r |
| 252 | INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf\r |
| 253 | !endif\r |
| 254 | !if $(FTPM_ENABLE) == TRUE\r |
| 255 | INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config\r |
| 256 | !endif\r |
| 257 | INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r |
| 258 | \r |
| 259 | !if $(ACPI50_ENABLE) == TRUE\r |
| 260 | INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf\r |
| 261 | !endif\r |
| 262 | !if $(PERFORMANCE_ENABLE) == TRUE\r |
| 263 | INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r |
| 264 | !endif\r |
| 265 | \r |
| 266 | [FV.FVRECOVERY]\r |
| 267 | BlockSize = $(FLASH_BLOCK_SIZE)\r |
| 268 | FvAlignment = 16 #FV alignment and FV attributes setting.\r |
| 269 | ERASE_POLARITY = 1\r |
| 270 | MEMORY_MAPPED = TRUE\r |
| 271 | STICKY_WRITE = TRUE\r |
| 272 | LOCK_CAP = TRUE\r |
| 273 | LOCK_STATUS = TRUE\r |
| 274 | WRITE_DISABLED_CAP = TRUE\r |
| 275 | WRITE_ENABLED_CAP = TRUE\r |
| 276 | WRITE_STATUS = TRUE\r |
| 277 | WRITE_LOCK_CAP = TRUE\r |
| 278 | WRITE_LOCK_STATUS = TRUE\r |
| 279 | READ_DISABLED_CAP = TRUE\r |
| 280 | READ_ENABLED_CAP = TRUE\r |
| 281 | READ_STATUS = TRUE\r |
| 282 | READ_LOCK_CAP = TRUE\r |
| 283 | READ_LOCK_STATUS = TRUE\r |
| 284 | FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091\r |
| 285 | \r |
| 286 | \r |
| 287 | !if $(MINNOW2_FSP_BUILD) == TRUE\r |
| 288 | INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf\r |
| 289 | !else\r |
| 290 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf\r |
| 291 | !endif\r |
| 292 | \r |
| 293 | INF MdeModulePkg/Core/Pei/PeiMain.inf\r |
| 294 | !if $(MINNOW2_FSP_BUILD) == TRUE\r |
| 295 | INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf\r |
| 296 | INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf\r |
| 297 | !endif\r |
| 298 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf\r |
| 299 | INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf\r |
| 300 | INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r |
| 301 | \r |
| 302 | INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf\r |
| 303 | \r |
| 304 | !if $(MINNOW2_FSP_BUILD) == FALSE\r |
| 305 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf\r |
| 306 | !endif\r |
| 307 | \r |
| 308 | !if $(FTPM_ENABLE) == TRUE\r |
| 309 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf\r |
| 310 | !endif\r |
| 311 | \r |
| 312 | !if $(SOURCE_DEBUG_ENABLE) == TRUE\r |
| 313 | INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf\r |
| 314 | !endif\r |
| 315 | \r |
| 316 | \r |
| 317 | !if $(CAPSULE_ENABLE) == TRUE\r |
| 318 | INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf\r |
| 319 | !if $(DXE_ARCHITECTURE) == "X64"\r |
| 320 | INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf\r |
| 321 | !endif\r |
| 322 | !endif\r |
| 323 | \r |
| 324 | !if $(MINNOW2_FSP_BUILD) == FALSE\r |
| 325 | !if $(PCIESC_ENABLE) == TRUE\r |
| 326 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf\r |
| 327 | !endif\r |
| 328 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf\r |
| 329 | !endif\r |
| 330 | \r |
| 331 | INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r |
| 332 | \r |
| 333 | [FV.FVMAIN]\r |
| 334 | BlockSize = $(FLASH_BLOCK_SIZE)\r |
| 335 | FvAlignment = 16\r |
| 336 | ERASE_POLARITY = 1\r |
| 337 | MEMORY_MAPPED = TRUE\r |
| 338 | STICKY_WRITE = TRUE\r |
| 339 | LOCK_CAP = TRUE\r |
| 340 | LOCK_STATUS = TRUE\r |
| 341 | WRITE_DISABLED_CAP = TRUE\r |
| 342 | WRITE_ENABLED_CAP = TRUE\r |
| 343 | WRITE_STATUS = TRUE\r |
| 344 | WRITE_LOCK_CAP = TRUE\r |
| 345 | WRITE_LOCK_STATUS = TRUE\r |
| 346 | READ_DISABLED_CAP = TRUE\r |
| 347 | READ_ENABLED_CAP = TRUE\r |
| 348 | READ_STATUS = TRUE\r |
| 349 | READ_LOCK_CAP = TRUE\r |
| 350 | READ_LOCK_STATUS = TRUE\r |
| 351 | FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5\r |
| 352 | \r |
| 353 | APRIORI DXE {\r |
| 354 | INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r |
| 355 | INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r |
| 356 | INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r |
| 357 | }\r |
| 358 | \r |
| 359 | FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {\r |
| 360 | SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin\r |
| 361 | }\r |
| 362 | \r |
| 363 | #\r |
| 364 | # EDK II Related Platform codes\r |
| 365 | #\r |
| 366 | \r |
| 367 | !if $(MINNOW2_FSP_BUILD) == TRUE\r |
| 368 | INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf\r |
| 369 | !endif\r |
| 370 | \r |
| 371 | INF MdeModulePkg/Core/Dxe/DxeMain.inf\r |
| 372 | INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r |
| 373 | !if $(ACPI50_ENABLE) == TRUE\r |
| 374 | INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf\r |
| 375 | INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf\r |
| 376 | !endif\r |
| 377 | \r |
| 378 | \r |
| 379 | INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf\r |
| 380 | INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r |
| 381 | INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r |
| 382 | INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r |
| 383 | INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf\r |
| 384 | INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r |
| 385 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf\r |
| 386 | INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf\r |
| 387 | INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r |
| 388 | INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r |
| 389 | INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r |
| 390 | INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r |
| 391 | INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r |
| 392 | \r |
| 393 | INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf\r |
| 394 | INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf\r |
| 395 | INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf\r |
| 396 | INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf\r |
| 397 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf\r |
| 398 | !if $(SECURE_BOOT_ENABLE)\r |
| 399 | INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r |
| 400 | !endif\r |
| 401 | \r |
| 402 | INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r |
| 403 | \r |
| 404 | INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r |
| 405 | INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r |
| 406 | INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r |
| 407 | INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf\r |
| 408 | \r |
| 409 | \r |
| 410 | INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf\r |
| 411 | \r |
| 412 | !if $(DATAHUB_ENABLE) == TRUE\r |
| 413 | INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf\r |
| 414 | !endif\r |
| 415 | INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf\r |
| 416 | INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r |
| 417 | \r |
| 418 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf\r |
| 419 | \r |
| 420 | #\r |
| 421 | # EDK II Related Silicon codes\r |
| 422 | #\r |
| 423 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf\r |
| 424 | \r |
| 425 | !if $(USE_HPET_TIMER) == TRUE\r |
| 426 | INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r |
| 427 | !else\r |
| 428 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf\r |
| 429 | !endif\r |
| 430 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf\r |
| 431 | \r |
| 432 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf\r |
| 433 | \r |
| 434 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf\r |
| 435 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf\r |
| 436 | \r |
| 437 | !if $(MINNOW2_FSP_BUILD) == FALSE\r |
| 438 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf\r |
| 439 | !endif\r |
| 440 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf\r |
| 441 | !if $(PCIESC_ENABLE) == TRUE\r |
| 442 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf\r |
| 443 | !endif\r |
| 444 | \r |
| 445 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf\r |
| 446 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf\r |
| 447 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf\r |
| 448 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf\r |
| 449 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf\r |
| 450 | !if $(MINNOW2_FSP_BUILD) == FALSE\r |
| 451 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf\r |
| 452 | !else\r |
| 453 | INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf\r |
| 454 | INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf\r |
| 455 | !endif\r |
| 456 | !if $(MINNOW2_FSP_BUILD) == FALSE\r |
| 457 | !if $(SEC_ENABLE) == TRUE\r |
| 458 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf\r |
| 459 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf\r |
| 460 | !endif\r |
| 461 | !endif\r |
| 462 | !if $(TPM_ENABLED) == TRUE\r |
| 463 | INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf\r |
| 464 | INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf\r |
| 465 | INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf\r |
| 466 | !endif\r |
| 467 | !if $(FTPM_ENABLE) == TRUE\r |
| 468 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf\r |
| 469 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf\r |
| 470 | INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf\r |
| 471 | INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf\r |
| 472 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf\r |
| 473 | !endif\r |
| 474 | \r |
| 475 | #\r |
| 476 | # EDK II Related Platform codes\r |
| 477 | #\r |
| 478 | INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf\r |
| 479 | INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf\r |
| 480 | INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf\r |
| 481 | INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf\r |
| 482 | INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf\r |
| 483 | INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf\r |
| 484 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf\r |
| 485 | INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf\r |
| 486 | INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf\r |
| 487 | !if $(GOP_DRIVER_ENABLE) == TRUE\r |
| 488 | INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf\r |
| 489 | FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {\r |
| 490 | SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}\r |
| 491 | SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi\r |
| 492 | SECTION UI = "IntelGopDriver"\r |
| 493 | }\r |
| 494 | !endif\r |
| 495 | \r |
| 496 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf\r |
| 497 | #\r |
| 498 | # SMM\r |
| 499 | #\r |
| 500 | INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf\r |
| 501 | INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf\r |
| 502 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCpuDxeSmm.inf\r |
| 503 | \r |
| 504 | INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf\r |
| 505 | INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf\r |
| 506 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCommunicationSmm.inf\r |
| 507 | INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf\r |
| 508 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf\r |
| 509 | # INF Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/Dts/Smm/DigitalThermalSensor.inf\r |
| 510 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf\r |
| 511 | #\r |
| 512 | # ACPI\r |
| 513 | #\r |
| 514 | INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r |
| 515 | INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf\r |
| 516 | INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf\r |
| 517 | INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf\r |
| 518 | \r |
| 519 | INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf\r |
| 520 | \r |
| 521 | INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf\r |
| 522 | \r |
| 523 | #\r |
| 524 | # PCI\r |
| 525 | #\r |
| 526 | INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r |
| 527 | \r |
| 528 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf\r |
| 529 | \r |
| 530 | \r |
| 531 | #\r |
| 532 | # ISA\r |
| 533 | #\r |
| 534 | INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf\r |
| 535 | INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf\r |
| 536 | INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf\r |
| 537 | !if $(SOURCE_DEBUG_ENABLE) != TRUE\r |
| 538 | INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf\r |
| 539 | !endif\r |
| 540 | #INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf\r |
| 541 | #INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf\r |
| 542 | \r |
| 543 | #\r |
| 544 | # SDIO\r |
| 545 | #\r |
| 546 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf\r |
| 547 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf\r |
| 548 | #\r |
| 549 | # IDE/SCSI/AHCI\r |
| 550 | #\r |
| 551 | INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r |
| 552 | \r |
| 553 | INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r |
| 554 | \r |
| 555 | INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r |
| 556 | !if $(SATA_ENABLE) == TRUE\r |
| 557 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf\r |
| 558 | #\r |
| 559 | \r |
| 560 | #\r |
| 561 | INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf\r |
| 562 | INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf\r |
| 563 | !if $(SCSI_ENABLE) == TRUE\r |
| 564 | INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r |
| 565 | INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r |
| 566 | !endif\r |
| 567 | #\r |
| 568 | !endif\r |
| 569 | # Console\r |
| 570 | #\r |
| 571 | INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r |
| 572 | INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r |
| 573 | INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r |
| 574 | INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf\r |
| 575 | INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r |
| 576 | INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r |
| 577 | INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r |
| 578 | INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r |
| 579 | #\r |
| 580 | # USB\r |
| 581 | #\r |
| 582 | !if $(USB_ENABLE) == TRUE\r |
| 583 | INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r |
| 584 | INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf\r |
| 585 | INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r |
| 586 | INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r |
| 587 | INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf\r |
| 588 | INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r |
| 589 | INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf\r |
| 590 | !endif\r |
| 591 | \r |
| 592 | #\r |
| 593 | # ECP\r |
| 594 | #\r |
| 595 | INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf\r |
| 596 | INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf\r |
| 597 | INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf\r |
| 598 | INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf\r |
| 599 | INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf\r |
| 600 | INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf\r |
| 601 | #\r |
| 602 | # SMBIOS\r |
| 603 | #\r |
| 604 | INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r |
| 605 | INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf\r |
| 606 | \r |
| 607 | INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf\r |
| 608 | \r |
| 609 | #\r |
| 610 | # Legacy Modules\r |
| 611 | #\r |
| 612 | INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r |
| 613 | \r |
| 614 | #\r |
| 615 | # FAT file system\r |
| 616 | #\r |
| 617 | INF FatPkg/EnhancedFatDxe/Fat.inf\r |
| 618 | \r |
| 619 | #\r |
| 620 | # UEFI Shell\r |
| 621 | #\r |
| 622 | FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {\r |
| 623 | # SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi\r |
| 624 | SECTION PE32 = EdkShellBinPkg/MinimumShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi\r |
| 625 | }\r |
| 626 | \r |
| 627 | \r |
| 628 | \r |
| 629 | !if $(GOP_DRIVER_ENABLE) == TRUE\r |
| 630 | FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {\r |
| 631 | SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin\r |
| 632 | SECTION UI = "IntelGopVbt"\r |
| 633 | }\r |
| 634 | !endif\r |
| 635 | \r |
| 636 | #\r |
| 637 | # Network Modules\r |
| 638 | #\r |
| 639 | !if $(NETWORK_ENABLE) == TRUE\r |
| 640 | FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {\r |
| 641 | SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi\r |
| 642 | SECTION UI = "UNDI"\r |
| 643 | }\r |
| 644 | INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf\r |
| 645 | INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf\r |
| 646 | INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf\r |
| 647 | INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf\r |
| 648 | INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf\r |
| 649 | INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r |
| 650 | INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r |
| 651 | INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r |
| 652 | !if $(NETWORK_IP6_ENABLE) == TRUE\r |
| 653 | INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf\r |
| 654 | INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf\r |
| 655 | INF NetworkPkg/IpSecDxe/IpSecDxe.inf\r |
| 656 | INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf\r |
| 657 | INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf\r |
| 658 | !endif\r |
| 659 | !if $(NETWORK_IP6_ENABLE) == TRUE\r |
| 660 | INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf\r |
| 661 | INF NetworkPkg/TcpDxe/TcpDxe.inf\r |
| 662 | !else\r |
| 663 | INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf\r |
| 664 | INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf\r |
| 665 | !endif\r |
| 666 | !if $(NETWORK_VLAN_ENABLE) == TRUE\r |
| 667 | INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r |
| 668 | !endif\r |
| 669 | !if $(NETWORK_ISCSI_ENABLE) == TRUE\r |
| 670 | !if $(NETWORK_IP6_ENABLE) == TRUE\r |
| 671 | INF NetworkPkg/IScsiDxe/IScsiDxe.inf\r |
| 672 | !else\r |
| 673 | INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf\r |
| 674 | !endif\r |
| 675 | !endif\r |
| 676 | !endif\r |
| 677 | \r |
| 678 | [FV.FVMAIN_COMPACT]\r |
| 679 | BlockSize = $(FLASH_BLOCK_SIZE)\r |
| 680 | FvAlignment = 16\r |
| 681 | ERASE_POLARITY = 1\r |
| 682 | MEMORY_MAPPED = TRUE\r |
| 683 | STICKY_WRITE = TRUE\r |
| 684 | LOCK_CAP = TRUE\r |
| 685 | LOCK_STATUS = TRUE\r |
| 686 | WRITE_DISABLED_CAP = TRUE\r |
| 687 | WRITE_ENABLED_CAP = TRUE\r |
| 688 | WRITE_STATUS = TRUE\r |
| 689 | WRITE_LOCK_CAP = TRUE\r |
| 690 | WRITE_LOCK_STATUS = TRUE\r |
| 691 | READ_DISABLED_CAP = TRUE\r |
| 692 | READ_ENABLED_CAP = TRUE\r |
| 693 | READ_STATUS = TRUE\r |
| 694 | READ_LOCK_CAP = TRUE\r |
| 695 | READ_LOCK_STATUS = TRUE\r |
| 696 | \r |
| 697 | \r |
| 698 | \r |
| 699 | FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r |
| 700 | !if $(LZMA_ENABLE) == TRUE\r |
| 701 | # LZMA Compress\r |
| 702 | SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r |
| 703 | SECTION FV_IMAGE = FVMAIN\r |
| 704 | }\r |
| 705 | !else\r |
| 706 | !if $(DXE_COMPRESS_ENABLE) == TRUE\r |
| 707 | # Tiano Compress\r |
| 708 | SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r |
| 709 | SECTION FV_IMAGE = FVMAIN\r |
| 710 | }\r |
| 711 | !else\r |
| 712 | # No Compress\r |
| 713 | SECTION COMPRESS PI_NONE {\r |
| 714 | SECTION FV_IMAGE = FVMAIN\r |
| 715 | }\r |
| 716 | !endif\r |
| 717 | !endif\r |
| 718 | }\r |
| 719 | \r |
| 720 | [FV.SETUP_DATA]\r |
| 721 | BlockSize = $(FLASH_BLOCK_SIZE)\r |
| 722 | #NumBlocks = 0x10\r |
| 723 | FvAlignment = 16\r |
| 724 | ERASE_POLARITY = 1\r |
| 725 | MEMORY_MAPPED = TRUE\r |
| 726 | STICKY_WRITE = TRUE\r |
| 727 | LOCK_CAP = TRUE\r |
| 728 | LOCK_STATUS = TRUE\r |
| 729 | WRITE_DISABLED_CAP = TRUE\r |
| 730 | WRITE_ENABLED_CAP = TRUE\r |
| 731 | WRITE_STATUS = TRUE\r |
| 732 | WRITE_LOCK_CAP = TRUE\r |
| 733 | WRITE_LOCK_STATUS = TRUE\r |
| 734 | READ_DISABLED_CAP = TRUE\r |
| 735 | READ_ENABLED_CAP = TRUE\r |
| 736 | READ_STATUS = TRUE\r |
| 737 | READ_LOCK_CAP = TRUE\r |
| 738 | READ_LOCK_STATUS = TRUE\r |
| 739 | \r |
| 740 | \r |
| 741 | [FV.Update_Data]\r |
| 742 | BlockSize = $(FLASH_BLOCK_SIZE)\r |
| 743 | FvAlignment = 16\r |
| 744 | ERASE_POLARITY = 1\r |
| 745 | MEMORY_MAPPED = TRUE\r |
| 746 | STICKY_WRITE = TRUE\r |
| 747 | LOCK_CAP = TRUE\r |
| 748 | LOCK_STATUS = TRUE\r |
| 749 | WRITE_DISABLED_CAP = TRUE\r |
| 750 | WRITE_ENABLED_CAP = TRUE\r |
| 751 | WRITE_STATUS = TRUE\r |
| 752 | WRITE_LOCK_CAP = TRUE\r |
| 753 | WRITE_LOCK_STATUS = TRUE\r |
| 754 | READ_DISABLED_CAP = TRUE\r |
| 755 | READ_ENABLED_CAP = TRUE\r |
| 756 | READ_STATUS = TRUE\r |
| 757 | READ_LOCK_CAP = TRUE\r |
| 758 | READ_LOCK_STATUS = TRUE\r |
| 759 | \r |
| 760 | FILE RAW = 88888888-8888-8888-8888-888888888888 {\r |
| 761 | FD = Vlv\r |
| 762 | }\r |
| 763 | \r |
| 764 | [FV.BiosUpdateCargo]\r |
| 765 | BlockSize = $(FLASH_BLOCK_SIZE)\r |
| 766 | FvAlignment = 16\r |
| 767 | ERASE_POLARITY = 1\r |
| 768 | MEMORY_MAPPED = TRUE\r |
| 769 | STICKY_WRITE = TRUE\r |
| 770 | LOCK_CAP = TRUE\r |
| 771 | LOCK_STATUS = TRUE\r |
| 772 | WRITE_DISABLED_CAP = TRUE\r |
| 773 | WRITE_ENABLED_CAP = TRUE\r |
| 774 | WRITE_STATUS = TRUE\r |
| 775 | WRITE_LOCK_CAP = TRUE\r |
| 776 | WRITE_LOCK_STATUS = TRUE\r |
| 777 | READ_DISABLED_CAP = TRUE\r |
| 778 | READ_ENABLED_CAP = TRUE\r |
| 779 | READ_STATUS = TRUE\r |
| 780 | READ_LOCK_CAP = TRUE\r |
| 781 | READ_LOCK_STATUS = TRUE\r |
| 782 | \r |
| 783 | \r |
| 784 | \r |
| 785 | [FV.BiosUpdate]\r |
| 786 | BlockSize = $(FLASH_BLOCK_SIZE)\r |
| 787 | FvAlignment = 16\r |
| 788 | ERASE_POLARITY = 1\r |
| 789 | MEMORY_MAPPED = TRUE\r |
| 790 | STICKY_WRITE = TRUE\r |
| 791 | LOCK_CAP = TRUE\r |
| 792 | LOCK_STATUS = TRUE\r |
| 793 | WRITE_DISABLED_CAP = TRUE\r |
| 794 | WRITE_ENABLED_CAP = TRUE\r |
| 795 | WRITE_STATUS = TRUE\r |
| 796 | WRITE_LOCK_CAP = TRUE\r |
| 797 | WRITE_LOCK_STATUS = TRUE\r |
| 798 | READ_DISABLED_CAP = TRUE\r |
| 799 | READ_ENABLED_CAP = TRUE\r |
| 800 | READ_STATUS = TRUE\r |
| 801 | READ_LOCK_CAP = TRUE\r |
| 802 | READ_LOCK_STATUS = TRUE\r |
| 803 | \r |
| 804 | [Capsule.Capsule_Boot]\r |
| 805 | #\r |
| 806 | # gEfiCapsuleGuid supported by platform\r |
| 807 | # { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}\r |
| 808 | #\r |
| 809 | CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0\r |
| 810 | CAPSULE_FLAGS = PersistAcrossReset\r |
| 811 | CAPSULE_HEADER_SIZE = 0x20\r |
| 812 | \r |
| 813 | FV = BiosUpdate\r |
| 814 | \r |
| 815 | [Capsule.Capsule_Reset]\r |
| 816 | #\r |
| 817 | # gEfiCapsuleGuid supported by platform\r |
| 818 | # { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}\r |
| 819 | #\r |
| 820 | CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0\r |
| 821 | CAPSULE_FLAGS = PersistAcrossReset\r |
| 822 | CAPSULE_HEADER_SIZE = 0x20\r |
| 823 | \r |
| 824 | FV = BiosUpdate\r |
| 825 | \r |
| 826 | ################################################################################\r |
| 827 | #\r |
| 828 | # Rules are use with the [FV] section's module INF type to define\r |
| 829 | # how an FFS file is created for a given INF file. The following Rule are the default\r |
| 830 | # rules for the different module type. User can add the customized rules to define the\r |
| 831 | # content of the FFS file.\r |
| 832 | #\r |
| 833 | ################################################################################\r |
| 834 | [Rule.Common.SEC]\r |
| 835 | FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r |
| 836 | PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
| 837 | RAW BIN Align = 16 |.com\r |
| 838 | }\r |
| 839 | \r |
| 840 | [Rule.Common.SEC.BINARY]\r |
| 841 | FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r |
| 842 | PE32 PE32 Align = 8 |.efi\r |
| 843 | RAW BIN Align = 16 |.com\r |
| 844 | }\r |
| 845 | \r |
| 846 | [Rule.Common.PEI_CORE]\r |
| 847 | FILE PEI_CORE = $(NAMED_GUID) {\r |
| 848 | PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
| 849 | UI STRING="$(MODULE_NAME)" Optional\r |
| 850 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 851 | }\r |
| 852 | \r |
| 853 | [Rule.Common.PEIM]\r |
| 854 | FILE PEIM = $(NAMED_GUID) {\r |
| 855 | PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
| 856 | PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
| 857 | UI STRING="$(MODULE_NAME)" Optional\r |
| 858 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 859 | }\r |
| 860 | \r |
| 861 | [Rule.Common.PEIM.BINARY]\r |
| 862 | FILE PEIM = $(NAMED_GUID) {\r |
| 863 | PEI_DEPEX PEI_DEPEX Optional |.depex\r |
| 864 | PE32 PE32 Align = Auto |.efi\r |
| 865 | UI STRING="$(MODULE_NAME)" Optional\r |
| 866 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 867 | }\r |
| 868 | \r |
| 869 | [Rule.Common.PEIM.BIOSID]\r |
| 870 | FILE PEIM = $(NAMED_GUID) {\r |
| 871 | RAW BIN BiosId.bin\r |
| 872 | PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
| 873 | PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
| 874 | UI STRING="$(MODULE_NAME)" Optional\r |
| 875 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 876 | }\r |
| 877 | \r |
| 878 | [Rule.Common.USER_DEFINED.APINIT]\r |
| 879 | FILE RAW = $(NAMED_GUID) Fixed Align=4K {\r |
| 880 | RAW SEC_BIN |.com\r |
| 881 | }\r |
| 882 | #cjia 2011-07-21\r |
| 883 | [Rule.Common.USER_DEFINED.LEGACY16]\r |
| 884 | FILE FREEFORM = $(NAMED_GUID) {\r |
| 885 | UI STRING="$(MODULE_NAME)" Optional\r |
| 886 | RAW BIN |.bin\r |
| 887 | }\r |
| 888 | #cjia\r |
| 889 | \r |
| 890 | [Rule.Common.USER_DEFINED.ASM16]\r |
| 891 | FILE FREEFORM = $(NAMED_GUID) {\r |
| 892 | UI STRING="$(MODULE_NAME)" Optional\r |
| 893 | RAW BIN |.com\r |
| 894 | }\r |
| 895 | \r |
| 896 | [Rule.Common.DXE_CORE]\r |
| 897 | FILE DXE_CORE = $(NAMED_GUID) {\r |
| 898 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
| 899 | UI STRING="$(MODULE_NAME)" Optional\r |
| 900 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 901 | }\r |
| 902 | \r |
| 903 | [Rule.Common.UEFI_DRIVER]\r |
| 904 | FILE DRIVER = $(NAMED_GUID) {\r |
| 905 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
| 906 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
| 907 | UI STRING="$(MODULE_NAME)" Optional\r |
| 908 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 909 | }\r |
| 910 | \r |
| 911 | [Rule.Common.UEFI_DRIVER.BINARY]\r |
| 912 | FILE DRIVER = $(NAMED_GUID) {\r |
| 913 | DXE_DEPEX DXE_DEPEX Optional |.depex\r |
| 914 | PE32 PE32 |.efi\r |
| 915 | UI STRING="$(MODULE_NAME)" Optional\r |
| 916 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 917 | }\r |
| 918 | \r |
| 919 | [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]\r |
| 920 | FILE DRIVER = $(NAMED_GUID) {\r |
| 921 | DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex\r |
| 922 | PE32 PE32 |.efi\r |
| 923 | UI STRING="$(MODULE_NAME)" Optional\r |
| 924 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 925 | }\r |
| 926 | \r |
| 927 | [Rule.Common.DXE_DRIVER]\r |
| 928 | FILE DRIVER = $(NAMED_GUID) {\r |
| 929 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
| 930 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
| 931 | UI STRING="$(MODULE_NAME)" Optional\r |
| 932 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 933 | }\r |
| 934 | \r |
| 935 | [Rule.Common.DXE_DRIVER.BINARY]\r |
| 936 | FILE DRIVER = $(NAMED_GUID) {\r |
| 937 | DXE_DEPEX DXE_DEPEX Optional |.depex\r |
| 938 | PE32 PE32 |.efi\r |
| 939 | UI STRING="$(MODULE_NAME)" Optional\r |
| 940 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 941 | }\r |
| 942 | \r |
| 943 | [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]\r |
| 944 | FILE DRIVER = $(NAMED_GUID) {\r |
| 945 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
| 946 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
| 947 | UI STRING="$(MODULE_NAME)" Optional\r |
| 948 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 949 | RAW ACPI Optional |.acpi\r |
| 950 | RAW ASL Optional |.aml\r |
| 951 | }\r |
| 952 | \r |
| 953 | [Rule.Common.DXE_RUNTIME_DRIVER]\r |
| 954 | FILE DRIVER = $(NAMED_GUID) {\r |
| 955 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
| 956 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
| 957 | UI STRING="$(MODULE_NAME)" Optional\r |
| 958 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 959 | }\r |
| 960 | \r |
| 961 | [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]\r |
| 962 | FILE DRIVER = $(NAMED_GUID) {\r |
| 963 | DXE_DEPEX DXE_DEPEX Optional |.depex\r |
| 964 | PE32 PE32 |.efi\r |
| 965 | UI STRING="$(MODULE_NAME)" Optional\r |
| 966 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 967 | }\r |
| 968 | \r |
| 969 | [Rule.Common.DXE_SMM_DRIVER]\r |
| 970 | FILE SMM = $(NAMED_GUID) {\r |
| 971 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
| 972 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
| 973 | UI STRING="$(MODULE_NAME)" Optional\r |
| 974 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 975 | }\r |
| 976 | \r |
| 977 | [Rule.Common.DXE_SMM_DRIVER.BINARY]\r |
| 978 | FILE SMM = $(NAMED_GUID) {\r |
| 979 | SMM_DEPEX SMM_DEPEX |.depex\r |
| 980 | PE32 PE32 |.efi\r |
| 981 | RAW BIN Optional |.aml\r |
| 982 | UI STRING="$(MODULE_NAME)" Optional\r |
| 983 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 984 | }\r |
| 985 | \r |
| 986 | [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]\r |
| 987 | FILE SMM = $(NAMED_GUID) {\r |
| 988 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
| 989 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
| 990 | UI STRING="$(MODULE_NAME)" Optional\r |
| 991 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 992 | RAW ACPI Optional |.acpi\r |
| 993 | RAW ASL Optional |.aml\r |
| 994 | }\r |
| 995 | \r |
| 996 | [Rule.Common.SMM_CORE]\r |
| 997 | FILE SMM_CORE = $(NAMED_GUID) {\r |
| 998 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
| 999 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
| 1000 | UI STRING="$(MODULE_NAME)" Optional\r |
| 1001 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 1002 | }\r |
| 1003 | \r |
| 1004 | [Rule.Common.SMM_CORE.BINARY]\r |
| 1005 | FILE SMM_CORE = $(NAMED_GUID) {\r |
| 1006 | DXE_DEPEX DXE_DEPEX Optional |.depex\r |
| 1007 | PE32 PE32 |.efi\r |
| 1008 | UI STRING="$(MODULE_NAME)" Optional\r |
| 1009 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 1010 | }\r |
| 1011 | \r |
| 1012 | [Rule.Common.UEFI_APPLICATION]\r |
| 1013 | FILE APPLICATION = $(NAMED_GUID) {\r |
| 1014 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r |
| 1015 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
| 1016 | UI STRING="$(MODULE_NAME)" Optional\r |
| 1017 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 1018 | }\r |
| 1019 | \r |
| 1020 | [Rule.Common.UEFI_APPLICATION.UI]\r |
| 1021 | FILE APPLICATION = $(NAMED_GUID) {\r |
| 1022 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r |
| 1023 | UI STRING="Enter Setup"\r |
| 1024 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r |
| 1025 | }\r |
| 1026 | \r |
| 1027 | [Rule.Common.USER_DEFINED]\r |
| 1028 | FILE FREEFORM = $(NAMED_GUID) {\r |
| 1029 | UI STRING="$(MODULE_NAME)" Optional\r |
| 1030 | RAW BIN |.bin\r |
| 1031 | }\r |
| 1032 | \r |
| 1033 | [Rule.Common.USER_DEFINED.ACPITABLE]\r |
| 1034 | FILE FREEFORM = $(NAMED_GUID) {\r |
| 1035 | RAW ACPI Optional |.acpi\r |
| 1036 | RAW ASL Optional |.aml\r |
| 1037 | }\r |
| 1038 | \r |
| 1039 | [Rule.Common.USER_DEFINED.ACPITABLE2]\r |
| 1040 | FILE FREEFORM = $(NAMED_GUID) {\r |
| 1041 | RAW ASL Optional |.aml\r |
| 1042 | }\r |
| 1043 | \r |
| 1044 | [Rule.Common.ACPITABLE]\r |
| 1045 | FILE FREEFORM = $(NAMED_GUID) {\r |
| 1046 | RAW ACPI Optional |.acpi\r |
| 1047 | RAW ASL Optional |.aml\r |
| 1048 | }\r |
| 1049 | \r |
projects / mirror_edk2.git / blame