]> git.proxmox.com Git - mirror_edk2.git/blame - Vlv2TbltDevicePkg/PlatformPkgGcc.fdf
projects / mirror_edk2.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Vlv2TbltDevicePkg/PlatformFspLib: Fix the include path
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkgGcc.fdf
CommitLineData
5e752084 1#/** @file\r
2# FDF file of Platform.\r
3#\r
4# Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>\r
5#\r
6# This program and the accompanying materials are licensed and made available under\r
7# the terms and conditions of the BSD License that accompanies this distribution.\r
8# The full text of the license may be found at\r
9# http://opensource.org/licenses/bsd-license.php.\r
10#\r
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13#\r
14#\r
15#**/\r
16\r
17[Defines]\r
18DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.\r
19DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.\r
20DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.\r
21DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.\r
22DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000\r
23DEFINE FLASH_AREA_SIZE = 0x00800000\r
24\r
25DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000\r
26DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000\r
27DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000\r
28\r
988715a3 29DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000\r
5e752084 30DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000\r
31\r
988715a3 32DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000\r
5e752084 33DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000\r
34\r
35\r
988715a3 36DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000\r
5e752084 37DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000\r
38\r
39!if $(MINNOW2_FSP_BUILD) == TRUE\r
988715a3 40DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000\r
5e752084 41DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000\r
988715a3 42DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000\r
5e752084 43\r
988715a3 44DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000\r
5e752084 45DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000\r
988715a3 46DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000\r
5e752084 47\r
48!endif\r
49\r
988715a3 50DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000\r
51DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000\r
5e752084 52\r
988715a3 53DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000\r
54DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000\r
5e752084 55\r
988715a3 56DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000\r
57DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000\r
5e752084 58\r
59################################################################################\r
60#\r
61# FD Section\r
62# The [FD] Section is made up of the definition statements and a\r
63# description of what goes into the Flash Device Image. Each FD section\r
64# defines one flash "device" image. A flash device image may be one of\r
65# the following: Removable media bootable image (like a boot floppy\r
66# image,) an Option ROM image (that would be "flashed" into an add-in\r
67# card,) a System "Flash" image (that would be burned into a system's\r
68# flash) or an Update ("Capsule") image that will be used to update and\r
69# existing system flash.\r
70#\r
71################################################################################\r
72[FD.Vlv]\r
73BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.\r
74Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.\r
75ErasePolarity = 1\r
76BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.\r
77NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.\r
78\r
79#\r
80#Flash location override based on actual flash map\r
81#\r
82SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)\r
83SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)\r
84\r
85!if $(MINNOW2_FSP_BUILD) == TRUE\r
86# put below PCD value setting into dsc file\r
87#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)\r
88#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)\r
89#SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60\r
90#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)\r
91#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)\r
92#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)\r
93#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)\r
94\r
95!endif\r
96################################################################################\r
97#\r
98# Following are lists of FD Region layout which correspond to the locations of different\r
99# images within the flash device.\r
100#\r
101# Regions must be defined in ascending order and may not overlap.\r
102#\r
103# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
104# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
105# "0x" characters. Like:\r
106# Offset|Size\r
107# PcdOffsetCName|PcdSizeCName\r
108# RegionType <FV, DATA, or FILE>\r
109# Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000\r
110#\r
111################################################################################\r
112# Since the Fce tool don't have gcc version, we can't handle default variable in Linux,\r
113# so we hardcode the default value of variable here.\r
114# Please note that we MUST update the binary once the default value is changed.\r
115\r
116#\r
117 # CPU Microcodes\r
118 #\r
119\r
120$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)\r
121gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize\r
122FV = MICROCODE_FV\r
123\r
124$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)\r
125gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
126FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin\r
127\r
128$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)\r
129gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\r
130FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin\r
131\r
132$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)\r
133gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
134FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin\r
135\r
136!if $(MINNOW2_FSP_BUILD) == TRUE\r
137\r
138 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)\r
139 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize\r
140 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin\r
141\r
142\r
143 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)\r
144 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin\r
145\r
146!endif\r
147\r
148 #\r
149 # Main Block\r
150 #\r
151$(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)\r
152gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize\r
153FV = FVMAIN_COMPACT\r
154\r
155 #\r
156 # FV Recovery#2\r
157 #\r
158$(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)\r
159gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size\r
160FV = FVRECOVERY2\r
161\r
162 #\r
163 # FV Recovery\r
164 #\r
165$(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)\r
166gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize\r
167FV = FVRECOVERY\r
168\r
169################################################################################\r
170#\r
171# FV Section\r
172#\r
173# [FV] section is used to define what components or modules are placed within a flash\r
174# device file. This section also defines order the components and modules are positioned\r
175# within the image. The [FV] section consists of define statements, set statements and\r
176# module statements.\r
177#\r
178################################################################################\r
179[FV.MICROCODE_FV]\r
180BlockSize = $(FLASH_BLOCK_SIZE)\r
181FvAlignment = 16\r
182ERASE_POLARITY = 1\r
183MEMORY_MAPPED = TRUE\r
184STICKY_WRITE = TRUE\r
185LOCK_CAP = TRUE\r
186LOCK_STATUS = FALSE\r
187WRITE_DISABLED_CAP = TRUE\r
188WRITE_ENABLED_CAP = TRUE\r
189WRITE_STATUS = TRUE\r
190WRITE_LOCK_CAP = TRUE\r
191WRITE_LOCK_STATUS = TRUE\r
192READ_DISABLED_CAP = TRUE\r
193READ_ENABLED_CAP = TRUE\r
194READ_STATUS = TRUE\r
195READ_LOCK_CAP = TRUE\r
196READ_LOCK_STATUS = TRUE\r
197\r
198FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {\r
199 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin\r
200}\r
201\r
202################################################################################\r
203#\r
204# FV Section\r
205#\r
206# [FV] section is used to define what components or modules are placed within a flash\r
207# device file. This section also defines order the components and modules are positioned\r
208# within the image. The [FV] section consists of define statements, set statements and\r
209# module statements.\r
210#\r
211################################################################################\r
212[FV.FVRECOVERY2]\r
213BlockSize = $(FLASH_BLOCK_SIZE)\r
214FvAlignment = 16 #FV alignment and FV attributes setting.\r
215ERASE_POLARITY = 1\r
216MEMORY_MAPPED = TRUE\r
217STICKY_WRITE = TRUE\r
218LOCK_CAP = TRUE\r
219LOCK_STATUS = TRUE\r
220WRITE_DISABLED_CAP = TRUE\r
221WRITE_ENABLED_CAP = TRUE\r
222WRITE_STATUS = TRUE\r
223WRITE_LOCK_CAP = TRUE\r
224WRITE_LOCK_STATUS = TRUE\r
225READ_DISABLED_CAP = TRUE\r
226READ_ENABLED_CAP = TRUE\r
227READ_STATUS = TRUE\r
228READ_LOCK_CAP = TRUE\r
229READ_LOCK_STATUS = TRUE\r
230FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092\r
231\r
232\r
233\r
234INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf\r
235\r
236!if $(MINNOW2_FSP_BUILD) == FALSE\r
237INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf\r
238INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf\r
239INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf\r
240INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf\r
241INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf\r
242INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf\r
243INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf\r
244INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf\r
245INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf\r
246!endif\r
247\r
248INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf\r
249!if $(TPM_ENABLED) == TRUE\r
250INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf\r
251INF SecurityPkg/Tcg/TcgPei/TcgPei.inf\r
252INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf\r
253!endif\r
254!if $(FTPM_ENABLE) == TRUE\r
255INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config\r
256!endif\r
257INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
258\r
259!if $(ACPI50_ENABLE) == TRUE\r
260 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf\r
261!endif\r
262!if $(PERFORMANCE_ENABLE) == TRUE\r
263INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
264!endif\r
265\r
266[FV.FVRECOVERY]\r
267BlockSize = $(FLASH_BLOCK_SIZE)\r
268FvAlignment = 16 #FV alignment and FV attributes setting.\r
269ERASE_POLARITY = 1\r
270MEMORY_MAPPED = TRUE\r
271STICKY_WRITE = TRUE\r
272LOCK_CAP = TRUE\r
273LOCK_STATUS = TRUE\r
274WRITE_DISABLED_CAP = TRUE\r
275WRITE_ENABLED_CAP = TRUE\r
276WRITE_STATUS = TRUE\r
277WRITE_LOCK_CAP = TRUE\r
278WRITE_LOCK_STATUS = TRUE\r
279READ_DISABLED_CAP = TRUE\r
280READ_ENABLED_CAP = TRUE\r
281READ_STATUS = TRUE\r
282READ_LOCK_CAP = TRUE\r
283READ_LOCK_STATUS = TRUE\r
284FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091\r
285\r
286\r
287!if $(MINNOW2_FSP_BUILD) == TRUE\r
288INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf\r
289!else\r
290INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf\r
291!endif\r
292\r
293INF MdeModulePkg/Core/Pei/PeiMain.inf\r
294!if $(MINNOW2_FSP_BUILD) == TRUE\r
295INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf\r
296INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf\r
297!endif\r
298INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf\r
299INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf\r
300INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
301\r
302INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf\r
303\r
304!if $(MINNOW2_FSP_BUILD) == FALSE\r
305INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf\r
306!endif\r
307\r
308!if $(FTPM_ENABLE) == TRUE\r
309INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf\r
310!endif\r
311\r
312!if $(SOURCE_DEBUG_ENABLE) == TRUE\r
313 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf\r
314!endif\r
315\r
316\r
317!if $(CAPSULE_ENABLE) == TRUE\r
318INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf\r
319!if $(DXE_ARCHITECTURE) == "X64"\r
320INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf\r
321!endif\r
322!endif\r
323\r
324!if $(MINNOW2_FSP_BUILD) == FALSE\r
325!if $(PCIESC_ENABLE) == TRUE\r
326INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf\r
327!endif\r
328INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf\r
329!endif\r
330\r
331INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
332\r
333[FV.FVMAIN]\r
334BlockSize = $(FLASH_BLOCK_SIZE)\r
335FvAlignment = 16\r
336ERASE_POLARITY = 1\r
337MEMORY_MAPPED = TRUE\r
338STICKY_WRITE = TRUE\r
339LOCK_CAP = TRUE\r
340LOCK_STATUS = TRUE\r
341WRITE_DISABLED_CAP = TRUE\r
342WRITE_ENABLED_CAP = TRUE\r
343WRITE_STATUS = TRUE\r
344WRITE_LOCK_CAP = TRUE\r
345WRITE_LOCK_STATUS = TRUE\r
346READ_DISABLED_CAP = TRUE\r
347READ_ENABLED_CAP = TRUE\r
348READ_STATUS = TRUE\r
349READ_LOCK_CAP = TRUE\r
350READ_LOCK_STATUS = TRUE\r
351FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5\r
352\r
353APRIORI DXE {\r
354 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
355 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
356 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
357 }\r
358\r
359FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {\r
360 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin\r
361 }\r
362\r
363 #\r
364 # EDK II Related Platform codes\r
365 #\r
366\r
367 !if $(MINNOW2_FSP_BUILD) == TRUE\r
368 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf\r
369 !endif\r
370\r
371INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
372INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
373!if $(ACPI50_ENABLE) == TRUE\r
374INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf\r
375INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf\r
376!endif\r
377\r
378\r
379INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf\r
380INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
381INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
382INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
383INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf\r
384INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
385INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf\r
386INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf\r
387INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
388INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
389INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
390INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
391INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r
392\r
393INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf\r
394INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf\r
395INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf\r
396INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf\r
397INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf\r
398!if $(SECURE_BOOT_ENABLE)\r
399INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
400!endif\r
401\r
402INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
403\r
404INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
405INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
406INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
407INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf\r
408\r
409\r
410INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf\r
411\r
412!if $(DATAHUB_ENABLE) == TRUE\r
413INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf\r
414!endif\r
415INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf\r
416INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
417\r
418INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf\r
419\r
420 #\r
421 # EDK II Related Silicon codes\r
422 #\r
423INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf\r
424\r
425!if $(USE_HPET_TIMER) == TRUE\r
426INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
427!else\r
428INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf\r
429!endif\r
430INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf\r
431\r
432INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf\r
433\r
434INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf\r
435INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf\r
436\r
437!if $(MINNOW2_FSP_BUILD) == FALSE\r
438INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf\r
439!endif\r
440INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf\r
441!if $(PCIESC_ENABLE) == TRUE\r
442INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf\r
443!endif\r
444\r
445INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf\r
446INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf\r
447INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf\r
448INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf\r
449INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf\r
450!if $(MINNOW2_FSP_BUILD) == FALSE\r
451INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf\r
452!else\r
453INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf\r
454INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf\r
455!endif\r
456!if $(MINNOW2_FSP_BUILD) == FALSE\r
457 !if $(SEC_ENABLE) == TRUE\r
458 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf\r
459 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf\r
460 !endif\r
461!endif\r
462!if $(TPM_ENABLED) == TRUE\r
463INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf\r
464INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf\r
465INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf\r
466!endif\r
467!if $(FTPM_ENABLE) == TRUE\r
468INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf\r
469INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf\r
470INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf\r
471INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf\r
472INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf\r
473!endif\r
474\r
475#\r
476# EDK II Related Platform codes\r
477#\r
478INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf\r
479INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf\r
480INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf\r
481INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf\r
482INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf\r
483INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf\r
484INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf\r
485INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf\r
486INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf\r
487!if $(GOP_DRIVER_ENABLE) == TRUE\r
488 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf\r
489 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {\r
490 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}\r
491 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi\r
492 SECTION UI = "IntelGopDriver"\r
493}\r
494!endif\r
495\r
496INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf\r
497 #\r
498 # SMM\r
499 #\r
500INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf\r
501INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf\r
f2ae1ef7 502INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf\r
5e752084 503\r
504INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf\r
505INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf\r
f2ae1ef7 506INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf\r
5e752084 507INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf\r
508INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf\r
5e752084 509INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf\r
510 #\r
511 # ACPI\r
512 #\r
513INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
514INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf\r
515INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf\r
516INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf\r
517\r
518INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf\r
519\r
520INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf\r
521\r
522 #\r
523 # PCI\r
524 #\r
525INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
526\r
527INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf\r
528\r
529\r
530#\r
531# ISA\r
532#\r
533INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf\r
534INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf\r
535INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf\r
536!if $(SOURCE_DEBUG_ENABLE) != TRUE\r
537INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf\r
538!endif\r
539#INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf\r
540#INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf\r
541\r
542#\r
543# SDIO\r
544#\r
545INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf\r
546INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf\r
547#\r
548# IDE/SCSI/AHCI\r
549#\r
550INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
551\r
552INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
553\r
554INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
555!if $(SATA_ENABLE) == TRUE\r
556INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf\r
557#\r
558\r
559#\r
560INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf\r
561INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf\r
562!if $(SCSI_ENABLE) == TRUE\r
563INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
564INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
565!endif\r
566#\r
567!endif\r
568# Console\r
569#\r
570INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
571INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
572INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
573INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf\r
574INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
575INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
576INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
577INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
578 #\r
579 # USB\r
580 #\r
581!if $(USB_ENABLE) == TRUE\r
582INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
583INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf\r
584INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
585INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
586INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf\r
587INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
588INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf\r
589!endif\r
590\r
591 #\r
592 # ECP\r
593 #\r
594INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf\r
595INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf\r
596INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf\r
597INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf\r
598INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf\r
599INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf\r
600 #\r
601 # SMBIOS\r
602 #\r
603INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
604INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf\r
605\r
606INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf\r
607\r
608 #\r
609 # Legacy Modules\r
610 #\r
611INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r
612\r
613#\r
614# FAT file system\r
615#\r
616INF FatPkg/EnhancedFatDxe/Fat.inf\r
617\r
618#\r
619# UEFI Shell\r
620#\r
621FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {\r
622# SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi\r
623 SECTION PE32 = EdkShellBinPkg/MinimumShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi\r
624 }\r
625\r
626\r
627\r
628!if $(GOP_DRIVER_ENABLE) == TRUE\r
629FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {\r
630 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin\r
631 SECTION UI = "IntelGopVbt"\r
632}\r
633!endif\r
634\r
635#\r
636# Network Modules\r
637#\r
638!if $(NETWORK_ENABLE) == TRUE\r
639 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {\r
640 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi\r
641 SECTION UI = "UNDI"\r
642 }\r
643 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf\r
644 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf\r
645 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf\r
646 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf\r
647 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf\r
648 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r
649 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r
650 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r
651 !if $(NETWORK_IP6_ENABLE) == TRUE\r
652 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf\r
653 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf\r
654 INF NetworkPkg/IpSecDxe/IpSecDxe.inf\r
655 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf\r
656 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf\r
657 !endif\r
658 !if $(NETWORK_IP6_ENABLE) == TRUE\r
659 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
660 INF NetworkPkg/TcpDxe/TcpDxe.inf\r
661 !else\r
662 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
663 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf\r
664 !endif\r
665 !if $(NETWORK_VLAN_ENABLE) == TRUE\r
666 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r
667 !endif\r
668 !if $(NETWORK_ISCSI_ENABLE) == TRUE\r
669 !if $(NETWORK_IP6_ENABLE) == TRUE\r
670 INF NetworkPkg/IScsiDxe/IScsiDxe.inf\r
671 !else\r
672 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf\r
673 !endif\r
674 !endif\r
675!endif\r
676\r
677[FV.FVMAIN_COMPACT]\r
678BlockSize = $(FLASH_BLOCK_SIZE)\r
679FvAlignment = 16\r
680ERASE_POLARITY = 1\r
681MEMORY_MAPPED = TRUE\r
682STICKY_WRITE = TRUE\r
683LOCK_CAP = TRUE\r
684LOCK_STATUS = TRUE\r
685WRITE_DISABLED_CAP = TRUE\r
686WRITE_ENABLED_CAP = TRUE\r
687WRITE_STATUS = TRUE\r
688WRITE_LOCK_CAP = TRUE\r
689WRITE_LOCK_STATUS = TRUE\r
690READ_DISABLED_CAP = TRUE\r
691READ_ENABLED_CAP = TRUE\r
692READ_STATUS = TRUE\r
693READ_LOCK_CAP = TRUE\r
694READ_LOCK_STATUS = TRUE\r
695\r
696\r
697\r
698FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
699!if $(LZMA_ENABLE) == TRUE\r
700# LZMA Compress\r
701 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
702 SECTION FV_IMAGE = FVMAIN\r
703 }\r
704!else\r
705!if $(DXE_COMPRESS_ENABLE) == TRUE\r
706# Tiano Compress\r
707 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
708 SECTION FV_IMAGE = FVMAIN\r
709 }\r
710!else\r
711# No Compress\r
712 SECTION COMPRESS PI_NONE {\r
713 SECTION FV_IMAGE = FVMAIN\r
714 }\r
715!endif\r
716!endif\r
717 }\r
718\r
719[FV.SETUP_DATA]\r
720BlockSize = $(FLASH_BLOCK_SIZE)\r
721#NumBlocks = 0x10\r
722FvAlignment = 16\r
723ERASE_POLARITY = 1\r
724MEMORY_MAPPED = TRUE\r
725STICKY_WRITE = TRUE\r
726LOCK_CAP = TRUE\r
727LOCK_STATUS = TRUE\r
728WRITE_DISABLED_CAP = TRUE\r
729WRITE_ENABLED_CAP = TRUE\r
730WRITE_STATUS = TRUE\r
731WRITE_LOCK_CAP = TRUE\r
732WRITE_LOCK_STATUS = TRUE\r
733READ_DISABLED_CAP = TRUE\r
734READ_ENABLED_CAP = TRUE\r
735READ_STATUS = TRUE\r
736READ_LOCK_CAP = TRUE\r
737READ_LOCK_STATUS = TRUE\r
738\r
739\r
740[FV.Update_Data]\r
741BlockSize = $(FLASH_BLOCK_SIZE)\r
742FvAlignment = 16\r
743ERASE_POLARITY = 1\r
744MEMORY_MAPPED = TRUE\r
745STICKY_WRITE = TRUE\r
746LOCK_CAP = TRUE\r
747LOCK_STATUS = TRUE\r
748WRITE_DISABLED_CAP = TRUE\r
749WRITE_ENABLED_CAP = TRUE\r
750WRITE_STATUS = TRUE\r
751WRITE_LOCK_CAP = TRUE\r
752WRITE_LOCK_STATUS = TRUE\r
753READ_DISABLED_CAP = TRUE\r
754READ_ENABLED_CAP = TRUE\r
755READ_STATUS = TRUE\r
756READ_LOCK_CAP = TRUE\r
757READ_LOCK_STATUS = TRUE\r
758\r
759FILE RAW = 88888888-8888-8888-8888-888888888888 {\r
760 FD = Vlv\r
761 }\r
762\r
763[FV.BiosUpdateCargo]\r
764BlockSize = $(FLASH_BLOCK_SIZE)\r
765FvAlignment = 16\r
766ERASE_POLARITY = 1\r
767MEMORY_MAPPED = TRUE\r
768STICKY_WRITE = TRUE\r
769LOCK_CAP = TRUE\r
770LOCK_STATUS = TRUE\r
771WRITE_DISABLED_CAP = TRUE\r
772WRITE_ENABLED_CAP = TRUE\r
773WRITE_STATUS = TRUE\r
774WRITE_LOCK_CAP = TRUE\r
775WRITE_LOCK_STATUS = TRUE\r
776READ_DISABLED_CAP = TRUE\r
777READ_ENABLED_CAP = TRUE\r
778READ_STATUS = TRUE\r
779READ_LOCK_CAP = TRUE\r
780READ_LOCK_STATUS = TRUE\r
781\r
782\r
783\r
784[FV.BiosUpdate]\r
785BlockSize = $(FLASH_BLOCK_SIZE)\r
786FvAlignment = 16\r
787ERASE_POLARITY = 1\r
788MEMORY_MAPPED = TRUE\r
789STICKY_WRITE = TRUE\r
790LOCK_CAP = TRUE\r
791LOCK_STATUS = TRUE\r
792WRITE_DISABLED_CAP = TRUE\r
793WRITE_ENABLED_CAP = TRUE\r
794WRITE_STATUS = TRUE\r
795WRITE_LOCK_CAP = TRUE\r
796WRITE_LOCK_STATUS = TRUE\r
797READ_DISABLED_CAP = TRUE\r
798READ_ENABLED_CAP = TRUE\r
799READ_STATUS = TRUE\r
800READ_LOCK_CAP = TRUE\r
801READ_LOCK_STATUS = TRUE\r
802\r
803[Capsule.Capsule_Boot]\r
804#\r
805# gEfiCapsuleGuid supported by platform\r
806# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}\r
807#\r
808CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0\r
809CAPSULE_FLAGS = PersistAcrossReset\r
810CAPSULE_HEADER_SIZE = 0x20\r
811\r
812FV = BiosUpdate\r
813\r
814[Capsule.Capsule_Reset]\r
815#\r
816# gEfiCapsuleGuid supported by platform\r
817# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}\r
818#\r
819CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0\r
820CAPSULE_FLAGS = PersistAcrossReset\r
821CAPSULE_HEADER_SIZE = 0x20\r
822\r
823FV = BiosUpdate\r
824\r
825################################################################################\r
826#\r
827# Rules are use with the [FV] section's module INF type to define\r
828# how an FFS file is created for a given INF file. The following Rule are the default\r
829# rules for the different module type. User can add the customized rules to define the\r
830# content of the FFS file.\r
831#\r
832################################################################################\r
833[Rule.Common.SEC]\r
834 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
835 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
836 RAW BIN Align = 16 |.com\r
837 }\r
838\r
839[Rule.Common.SEC.BINARY]\r
840 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
841 PE32 PE32 Align = 8 |.efi\r
842 RAW BIN Align = 16 |.com\r
843 }\r
844\r
845[Rule.Common.PEI_CORE]\r
846 FILE PEI_CORE = $(NAMED_GUID) {\r
847 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
848 UI STRING="$(MODULE_NAME)" Optional\r
849 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
850 }\r
851\r
852[Rule.Common.PEIM]\r
853 FILE PEIM = $(NAMED_GUID) {\r
854 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
855 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
856 UI STRING="$(MODULE_NAME)" Optional\r
857 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
858 }\r
859\r
860[Rule.Common.PEIM.BINARY]\r
861 FILE PEIM = $(NAMED_GUID) {\r
862 PEI_DEPEX PEI_DEPEX Optional |.depex\r
863 PE32 PE32 Align = Auto |.efi\r
864 UI STRING="$(MODULE_NAME)" Optional\r
865 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
866 }\r
867\r
868[Rule.Common.PEIM.BIOSID]\r
869 FILE PEIM = $(NAMED_GUID) {\r
870 RAW BIN BiosId.bin\r
871 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
872 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
873 UI STRING="$(MODULE_NAME)" Optional\r
874 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
875 }\r
876\r
877[Rule.Common.USER_DEFINED.APINIT]\r
878 FILE RAW = $(NAMED_GUID) Fixed Align=4K {\r
879 RAW SEC_BIN |.com\r
880 }\r
881#cjia 2011-07-21\r
882[Rule.Common.USER_DEFINED.LEGACY16]\r
883 FILE FREEFORM = $(NAMED_GUID) {\r
884 UI STRING="$(MODULE_NAME)" Optional\r
885 RAW BIN |.bin\r
886 }\r
887#cjia\r
888\r
889[Rule.Common.USER_DEFINED.ASM16]\r
890 FILE FREEFORM = $(NAMED_GUID) {\r
891 UI STRING="$(MODULE_NAME)" Optional\r
892 RAW BIN |.com\r
893 }\r
894\r
895[Rule.Common.DXE_CORE]\r
896 FILE DXE_CORE = $(NAMED_GUID) {\r
897 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
898 UI STRING="$(MODULE_NAME)" Optional\r
899 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
900 }\r
901\r
902[Rule.Common.UEFI_DRIVER]\r
903 FILE DRIVER = $(NAMED_GUID) {\r
904 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
905 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
906 UI STRING="$(MODULE_NAME)" Optional\r
907 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
908 }\r
909\r
910[Rule.Common.UEFI_DRIVER.BINARY]\r
911 FILE DRIVER = $(NAMED_GUID) {\r
912 DXE_DEPEX DXE_DEPEX Optional |.depex\r
913 PE32 PE32 |.efi\r
914 UI STRING="$(MODULE_NAME)" Optional\r
915 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
916 }\r
917\r
918[Rule.Common.UEFI_DRIVER.NATIVE_BINARY]\r
919 FILE DRIVER = $(NAMED_GUID) {\r
920 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex\r
921 PE32 PE32 |.efi\r
922 UI STRING="$(MODULE_NAME)" Optional\r
923 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
924 }\r
925\r
926[Rule.Common.DXE_DRIVER]\r
927 FILE DRIVER = $(NAMED_GUID) {\r
928 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
929 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
930 UI STRING="$(MODULE_NAME)" Optional\r
931 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
932 }\r
933\r
934[Rule.Common.DXE_DRIVER.BINARY]\r
935 FILE DRIVER = $(NAMED_GUID) {\r
936 DXE_DEPEX DXE_DEPEX Optional |.depex\r
937 PE32 PE32 |.efi\r
938 UI STRING="$(MODULE_NAME)" Optional\r
939 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
940 }\r
941\r
942[Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]\r
943 FILE DRIVER = $(NAMED_GUID) {\r
944 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
945 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
946 UI STRING="$(MODULE_NAME)" Optional\r
947 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
948 RAW ACPI Optional |.acpi\r
949 RAW ASL Optional |.aml\r
950 }\r
951\r
952[Rule.Common.DXE_RUNTIME_DRIVER]\r
953 FILE DRIVER = $(NAMED_GUID) {\r
954 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
955 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
956 UI STRING="$(MODULE_NAME)" Optional\r
957 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
958 }\r
959\r
960[Rule.Common.DXE_RUNTIME_DRIVER.BINARY]\r
961 FILE DRIVER = $(NAMED_GUID) {\r
962 DXE_DEPEX DXE_DEPEX Optional |.depex\r
963 PE32 PE32 |.efi\r
964 UI STRING="$(MODULE_NAME)" Optional\r
965 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
966 }\r
967\r
968[Rule.Common.DXE_SMM_DRIVER]\r
969 FILE SMM = $(NAMED_GUID) {\r
970 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
971 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
972 UI STRING="$(MODULE_NAME)" Optional\r
973 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
974 }\r
975\r
976[Rule.Common.DXE_SMM_DRIVER.BINARY]\r
977 FILE SMM = $(NAMED_GUID) {\r
978 SMM_DEPEX SMM_DEPEX |.depex\r
979 PE32 PE32 |.efi\r
980 RAW BIN Optional |.aml\r
981 UI STRING="$(MODULE_NAME)" Optional\r
982 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
983 }\r
984\r
985[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]\r
986 FILE SMM = $(NAMED_GUID) {\r
987 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
988 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
989 UI STRING="$(MODULE_NAME)" Optional\r
990 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
991 RAW ACPI Optional |.acpi\r
992 RAW ASL Optional |.aml\r
993 }\r
994\r
995[Rule.Common.SMM_CORE]\r
996 FILE SMM_CORE = $(NAMED_GUID) {\r
997 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
998 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
999 UI STRING="$(MODULE_NAME)" Optional\r
1000 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1001 }\r
1002\r
1003[Rule.Common.SMM_CORE.BINARY]\r
1004 FILE SMM_CORE = $(NAMED_GUID) {\r
1005 DXE_DEPEX DXE_DEPEX Optional |.depex\r
1006 PE32 PE32 |.efi\r
1007 UI STRING="$(MODULE_NAME)" Optional\r
1008 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1009 }\r
1010\r
1011[Rule.Common.UEFI_APPLICATION]\r
1012 FILE APPLICATION = $(NAMED_GUID) {\r
1013 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1014 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1015 UI STRING="$(MODULE_NAME)" Optional\r
1016 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1017 }\r
1018\r
1019[Rule.Common.UEFI_APPLICATION.UI]\r
1020 FILE APPLICATION = $(NAMED_GUID) {\r
1021 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1022 UI STRING="Enter Setup"\r
1023 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1024 }\r
1025\r
1026[Rule.Common.USER_DEFINED]\r
1027 FILE FREEFORM = $(NAMED_GUID) {\r
1028 UI STRING="$(MODULE_NAME)" Optional\r
1029 RAW BIN |.bin\r
1030 }\r
1031\r
1032[Rule.Common.USER_DEFINED.ACPITABLE]\r
1033 FILE FREEFORM = $(NAMED_GUID) {\r
1034 RAW ACPI Optional |.acpi\r
1035 RAW ASL Optional |.aml\r
1036 }\r
1037\r
1038[Rule.Common.USER_DEFINED.ACPITABLE2]\r
1039 FILE FREEFORM = $(NAMED_GUID) {\r
1040 RAW ASL Optional |.aml\r
1041 }\r
1042\r
1043[Rule.Common.ACPITABLE]\r
1044 FILE FREEFORM = $(NAMED_GUID) {\r
1045 RAW ACPI Optional |.acpi\r
1046 RAW ASL Optional |.aml\r
1047 }\r
1048\r
EFI Development Kit II mirror for PVE