MdeModulePkg: Fix IPv4 UseDefaultAddress failure case.
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkgGcc.fdf
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1#/** @file
2# FDF file of Platform.
3#
6b49f0e0 4# Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>
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5#
6# This program and the accompanying materials are licensed and made available under
7# the terms and conditions of the BSD License that accompanies this distribution.
8# The full text of the license may be found at
9# http://opensource.org/licenses/bsd-license.php.
10#
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13#
14#
15#**/
16
17[Defines]
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18DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.
19DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.
20DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.
21DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.
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22DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
23DEFINE FLASH_AREA_SIZE = 0x00800000
24
b9459211 25DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
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26DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
27DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
3cbfba02 28
9ea2d901 29DEFINE FLASH_REGION_VPD_OFFSET = 0x00130000
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30DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
31
9ea2d901 32DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0016E000
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33DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
34
35
9ea2d901 36DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00170000
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37DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
38
39!if $(MINNOW2_FSP_BUILD) == TRUE
9ea2d901 40DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x001B0000
3cbfba02 41DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
b9459211 42DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000
3cbfba02 43
9ea2d901 44DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x001F8000
3cbfba02 45DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
b9459211 46DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000
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47
48!endif
49
9ea2d901 50DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00200000
a4d42c22 51DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00196000
3cbfba02 52
9ea2d901 53DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00396000
d58cb22f 54DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002C000
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55
56DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x003C2000
d58cb22f 57DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x0003E000
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58
59################################################################################
60#
61# FD Section
62# The [FD] Section is made up of the definition statements and a
63# description of what goes into the Flash Device Image. Each FD section
64# defines one flash "device" image. A flash device image may be one of
65# the following: Removable media bootable image (like a boot floppy
66# image,) an Option ROM image (that would be "flashed" into an add-in
67# card,) a System "Flash" image (that would be burned into a system's
68# flash) or an Update ("Capsule") image that will be used to update and
69# existing system flash.
70#
71################################################################################
72[FD.Vlv]
73BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
74Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
75ErasePolarity = 1
76BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
77NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
78
79#
80#Flash location override based on actual flash map
81#
82SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
83SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
84
85!if $(MINNOW2_FSP_BUILD) == TRUE
86# put below PCD value setting into dsc file
87#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
88#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
89#SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
90#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
91#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
92#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
93#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
94
95!endif
96################################################################################
97#
98# Following are lists of FD Region layout which correspond to the locations of different
99# images within the flash device.
100#
101# Regions must be defined in ascending order and may not overlap.
102#
103# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
104# the pipe "|" character, followed by the size of the region, also in hex with the leading
105# "0x" characters. Like:
106# Offset|Size
107# PcdOffsetCName|PcdSizeCName
108# RegionType <FV, DATA, or FILE>
109# Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
110#
111################################################################################
112# Since the Fce tool don't have gcc version, we can't handle default variable in Linux,
113# so we hardcode the default value of variable here.
114# Please note that we MUST update the binary once the default value is changed.
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115
116#
117 # CPU Microcodes
118 #
119
120$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
121gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
122FV = MICROCODE_FV
123
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124$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
125gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
126FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin
127
128$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
129gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
130FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin
131
132$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
133gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
134FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin
135
136!if $(MINNOW2_FSP_BUILD) == TRUE
137
138 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
139 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
140 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin
141
142
143 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
144 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
145
146!endif
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147
148 #
149 # Main Block
150 #
151$(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
152gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
153FV = FVMAIN_COMPACT
154
155 #
156 # FV Recovery#2
157 #
158$(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
159gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
160FV = FVRECOVERY2
161
162 #
163 # FV Recovery
164 #
165$(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
166gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
167FV = FVRECOVERY
168
169################################################################################
170#
171# FV Section
172#
173# [FV] section is used to define what components or modules are placed within a flash
174# device file. This section also defines order the components and modules are positioned
175# within the image. The [FV] section consists of define statements, set statements and
176# module statements.
177#
178################################################################################
179[FV.MICROCODE_FV]
180BlockSize = $(FLASH_BLOCK_SIZE)
181FvAlignment = 16
182ERASE_POLARITY = 1
183MEMORY_MAPPED = TRUE
184STICKY_WRITE = TRUE
185LOCK_CAP = TRUE
186LOCK_STATUS = FALSE
187WRITE_DISABLED_CAP = TRUE
188WRITE_ENABLED_CAP = TRUE
189WRITE_STATUS = TRUE
190WRITE_LOCK_CAP = TRUE
191WRITE_LOCK_STATUS = TRUE
192READ_DISABLED_CAP = TRUE
193READ_ENABLED_CAP = TRUE
194READ_STATUS = TRUE
195READ_LOCK_CAP = TRUE
196READ_LOCK_STATUS = TRUE
197
198FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
199 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
200}
201
202################################################################################
203#
204# FV Section
205#
206# [FV] section is used to define what components or modules are placed within a flash
207# device file. This section also defines order the components and modules are positioned
208# within the image. The [FV] section consists of define statements, set statements and
209# module statements.
210#
211################################################################################
212[FV.FVRECOVERY2]
213BlockSize = $(FLASH_BLOCK_SIZE)
214FvAlignment = 16 #FV alignment and FV attributes setting.
215ERASE_POLARITY = 1
216MEMORY_MAPPED = TRUE
217STICKY_WRITE = TRUE
218LOCK_CAP = TRUE
219LOCK_STATUS = TRUE
220WRITE_DISABLED_CAP = TRUE
221WRITE_ENABLED_CAP = TRUE
222WRITE_STATUS = TRUE
223WRITE_LOCK_CAP = TRUE
224WRITE_LOCK_STATUS = TRUE
225READ_DISABLED_CAP = TRUE
226READ_ENABLED_CAP = TRUE
227READ_STATUS = TRUE
228READ_LOCK_CAP = TRUE
229READ_LOCK_STATUS = TRUE
230FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
231
232
233
234INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
235
236!if $(MINNOW2_FSP_BUILD) == FALSE
237INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
238INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
239INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
240INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
241INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
242INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
243INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
244INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
245INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
246!endif
247
248INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
249!if $(TPM_ENABLED) == TRUE
250INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf
251INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
252INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
253!endif
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254!if $(FTPM_ENABLE) == TRUE
255INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config
256!endif
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257INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
258
259!if $(ACPI50_ENABLE) == TRUE
260 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
261!endif
262!if $(PERFORMANCE_ENABLE) == TRUE
263INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
264!endif
265
266[FV.FVRECOVERY]
267BlockSize = $(FLASH_BLOCK_SIZE)
268FvAlignment = 16 #FV alignment and FV attributes setting.
269ERASE_POLARITY = 1
270MEMORY_MAPPED = TRUE
271STICKY_WRITE = TRUE
272LOCK_CAP = TRUE
273LOCK_STATUS = TRUE
274WRITE_DISABLED_CAP = TRUE
275WRITE_ENABLED_CAP = TRUE
276WRITE_STATUS = TRUE
277WRITE_LOCK_CAP = TRUE
278WRITE_LOCK_STATUS = TRUE
279READ_DISABLED_CAP = TRUE
280READ_ENABLED_CAP = TRUE
281READ_STATUS = TRUE
282READ_LOCK_CAP = TRUE
283READ_LOCK_STATUS = TRUE
284FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
285
286
287!if $(MINNOW2_FSP_BUILD) == TRUE
288INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
289!else
290INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
291!endif
292
293INF MdeModulePkg/Core/Pei/PeiMain.inf
294!if $(MINNOW2_FSP_BUILD) == TRUE
295INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
296INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
297!endif
298INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
299INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
3cbfba02 300INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
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301
302INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
303
304!if $(MINNOW2_FSP_BUILD) == FALSE
305INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
306!endif
307
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308!if $(FTPM_ENABLE) == TRUE
309INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
310!endif
311
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312!if $(SOURCE_DEBUG_ENABLE) == TRUE
313 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
314!endif
315
316
317!if $(CAPSULE_ENABLE) == TRUE
318INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
94dfaa23 319!if $(DXE_ARCHITECTURE) == "X64"
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320INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
321!endif
94dfaa23 322!endif
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323
324!if $(MINNOW2_FSP_BUILD) == FALSE
325!if $(PCIESC_ENABLE) == TRUE
326INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
327!endif
328INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
329!endif
330
331INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
332
333[FV.FVMAIN]
334BlockSize = $(FLASH_BLOCK_SIZE)
335FvAlignment = 16
336ERASE_POLARITY = 1
337MEMORY_MAPPED = TRUE
338STICKY_WRITE = TRUE
339LOCK_CAP = TRUE
340LOCK_STATUS = TRUE
341WRITE_DISABLED_CAP = TRUE
342WRITE_ENABLED_CAP = TRUE
343WRITE_STATUS = TRUE
344WRITE_LOCK_CAP = TRUE
345WRITE_LOCK_STATUS = TRUE
346READ_DISABLED_CAP = TRUE
347READ_ENABLED_CAP = TRUE
348READ_STATUS = TRUE
349READ_LOCK_CAP = TRUE
350READ_LOCK_STATUS = TRUE
351FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
352
353APRIORI DXE {
354 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
355 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
356 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
357 }
358
359FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
360 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
361 }
362
363 #
364 # EDK II Related Platform codes
365 #
366
367 !if $(MINNOW2_FSP_BUILD) == TRUE
368 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
369 !endif
370
371INF MdeModulePkg/Core/Dxe/DxeMain.inf
372INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
373!if $(ACPI50_ENABLE) == TRUE
374INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
375INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
376!endif
377
378
379INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
380INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
381INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
382INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
383INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
384INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
385INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
386INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
387INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
388INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
389INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
390INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
391INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
392
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393INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
394INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
395INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
396INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
397INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
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398!if $(SECURE_BOOT_ENABLE)
399INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
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400!endif
401
402INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
403
404INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
405INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
406INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
407INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
408
409
410INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
411
412!if $(DATAHUB_ENABLE) == TRUE
413INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
414!endif
415INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
416INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
417
418INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
419
420 #
421 # EDK II Related Silicon codes
422 #
423INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
424
425!if $(USE_HPET_TIMER) == TRUE
426INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
427!else
428INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
429!endif
430INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
431
432INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
433
434INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
435INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
436
437!if $(MINNOW2_FSP_BUILD) == FALSE
438INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
439!endif
440INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
441!if $(PCIESC_ENABLE) == TRUE
442INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
443!endif
444
445INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
446INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
447INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
448INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
449INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
450!if $(MINNOW2_FSP_BUILD) == FALSE
451INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
452!else
453INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
454INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
455!endif
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456!if $(MINNOW2_FSP_BUILD) == FALSE
457 !if $(SEC_ENABLE) == TRUE
458 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf
459 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf
460 !endif
461!endif
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462!if $(TPM_ENABLED) == TRUE
463INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
464INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
465INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
466!endif
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467!if $(FTPM_ENABLE) == TRUE
468INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf
469INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf
470INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
471INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf
472INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf
473!endif
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474
475#
476# EDK II Related Platform codes
477#
478INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
479INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
480INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
481INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
482INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
483INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
484INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
485INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
486INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
487!if $(GOP_DRIVER_ENABLE) == TRUE
488 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
489 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
490 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
491 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
492 SECTION UI = "IntelGopDriver"
493}
494!endif
495
496INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
497 #
498 # SMM
499 #
500INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
501INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
502INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCpuDxeSmm.inf
503
504INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
505INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
506INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCommunicationSmm.inf
507INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
508INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
509# INF Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/Dts/Smm/DigitalThermalSensor.inf
0ad3c505 510INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
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511 #
512 # ACPI
513 #
514INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
515INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
516INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
517INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
518
519INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
520
521INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
522
523 #
524 # PCI
525 #
526INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
527
528INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
529
530
531#
532# ISA
533#
534INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
535INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
536INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
537!if $(SOURCE_DEBUG_ENABLE) != TRUE
538INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
539!endif
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540#INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
541#INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
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542
543#
544# SDIO
545#
546INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
547INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
548#
549# IDE/SCSI/AHCI
550#
551INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
552
553INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
554
555INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
556!if $(SATA_ENABLE) == TRUE
557INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
558#
559
560#
561INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
562INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
563!if $(SCSI_ENABLE) == TRUE
564INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
565INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
566!endif
567#
568!endif
569# Console
570#
571INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
c7d161de 572INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
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573INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
574INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
575INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
576INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
577INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
578INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
579 #
580 # USB
581 #
582!if $(USB_ENABLE) == TRUE
583INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
584INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
585INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
586INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
587INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
588INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
589INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
590!endif
591
592 #
593 # ECP
594 #
595INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf
596INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf
597INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf
598INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf
599INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf
600INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf
601 #
602 # SMBIOS
603 #
604INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
605INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
606
607INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
608
609 #
610 # Legacy Modules
611 #
612INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
613
614#
615# FAT file system
616#
6b49f0e0
JJ
617INF FatPkg/EnhancedFatDxe/Fat.inf
618
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619#
620# UEFI Shell
621#
622FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
623# SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
624 SECTION PE32 = EdkShellBinPkg/MinimumShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
625 }
626
627
628
629!if $(GOP_DRIVER_ENABLE) == TRUE
630FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
631 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
632 SECTION UI = "IntelGopVbt"
633}
634!endif
635
636#
637# Network Modules
638#
639!if $(NETWORK_ENABLE) == TRUE
640 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
641 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
642 SECTION UI = "UNDI"
643 }
644 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
645 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
646 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
647 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
648 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
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DW
649 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
650 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
651 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
652 !if $(NETWORK_IP6_ENABLE) == TRUE
653 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
654 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
655 INF NetworkPkg/IpSecDxe/IpSecDxe.inf
656 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
657 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
658 !endif
659 !if $(NETWORK_IP6_ENABLE) == TRUE
660 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
661 INF NetworkPkg/TcpDxe/TcpDxe.inf
662 !else
663 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
664 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
665 !endif
666 !if $(NETWORK_VLAN_ENABLE) == TRUE
667 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
668 !endif
669 !if $(NETWORK_ISCSI_ENABLE) == TRUE
670 !if $(NETWORK_IP6_ENABLE) == TRUE
671 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
672 !else
673 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
674 !endif
675 !endif
676!endif
677
678[FV.FVMAIN_COMPACT]
679BlockSize = $(FLASH_BLOCK_SIZE)
680FvAlignment = 16
681ERASE_POLARITY = 1
682MEMORY_MAPPED = TRUE
683STICKY_WRITE = TRUE
684LOCK_CAP = TRUE
685LOCK_STATUS = TRUE
686WRITE_DISABLED_CAP = TRUE
687WRITE_ENABLED_CAP = TRUE
688WRITE_STATUS = TRUE
689WRITE_LOCK_CAP = TRUE
690WRITE_LOCK_STATUS = TRUE
691READ_DISABLED_CAP = TRUE
692READ_ENABLED_CAP = TRUE
693READ_STATUS = TRUE
694READ_LOCK_CAP = TRUE
695READ_LOCK_STATUS = TRUE
696
697
698
699FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
700!if $(LZMA_ENABLE) == TRUE
701# LZMA Compress
702 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
703 SECTION FV_IMAGE = FVMAIN
704 }
705!else
706!if $(DXE_COMPRESS_ENABLE) == TRUE
707# Tiano Compress
708 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
709 SECTION FV_IMAGE = FVMAIN
710 }
711!else
712# No Compress
713 SECTION COMPRESS PI_NONE {
714 SECTION FV_IMAGE = FVMAIN
715 }
716!endif
717!endif
718 }
719
720[FV.SETUP_DATA]
721BlockSize = $(FLASH_BLOCK_SIZE)
722#NumBlocks = 0x10
723FvAlignment = 16
724ERASE_POLARITY = 1
725MEMORY_MAPPED = TRUE
726STICKY_WRITE = TRUE
727LOCK_CAP = TRUE
728LOCK_STATUS = TRUE
729WRITE_DISABLED_CAP = TRUE
730WRITE_ENABLED_CAP = TRUE
731WRITE_STATUS = TRUE
732WRITE_LOCK_CAP = TRUE
733WRITE_LOCK_STATUS = TRUE
734READ_DISABLED_CAP = TRUE
735READ_ENABLED_CAP = TRUE
736READ_STATUS = TRUE
737READ_LOCK_CAP = TRUE
738READ_LOCK_STATUS = TRUE
739
740
741[FV.Update_Data]
742BlockSize = $(FLASH_BLOCK_SIZE)
743FvAlignment = 16
744ERASE_POLARITY = 1
745MEMORY_MAPPED = TRUE
746STICKY_WRITE = TRUE
747LOCK_CAP = TRUE
748LOCK_STATUS = TRUE
749WRITE_DISABLED_CAP = TRUE
750WRITE_ENABLED_CAP = TRUE
751WRITE_STATUS = TRUE
752WRITE_LOCK_CAP = TRUE
753WRITE_LOCK_STATUS = TRUE
754READ_DISABLED_CAP = TRUE
755READ_ENABLED_CAP = TRUE
756READ_STATUS = TRUE
757READ_LOCK_CAP = TRUE
758READ_LOCK_STATUS = TRUE
759
760FILE RAW = 88888888-8888-8888-8888-888888888888 {
761 FD = Vlv
762 }
763
764[FV.BiosUpdateCargo]
765BlockSize = $(FLASH_BLOCK_SIZE)
766FvAlignment = 16
767ERASE_POLARITY = 1
768MEMORY_MAPPED = TRUE
769STICKY_WRITE = TRUE
770LOCK_CAP = TRUE
771LOCK_STATUS = TRUE
772WRITE_DISABLED_CAP = TRUE
773WRITE_ENABLED_CAP = TRUE
774WRITE_STATUS = TRUE
775WRITE_LOCK_CAP = TRUE
776WRITE_LOCK_STATUS = TRUE
777READ_DISABLED_CAP = TRUE
778READ_ENABLED_CAP = TRUE
779READ_STATUS = TRUE
780READ_LOCK_CAP = TRUE
781READ_LOCK_STATUS = TRUE
782
783
784
785[FV.BiosUpdate]
786BlockSize = $(FLASH_BLOCK_SIZE)
787FvAlignment = 16
788ERASE_POLARITY = 1
789MEMORY_MAPPED = TRUE
790STICKY_WRITE = TRUE
791LOCK_CAP = TRUE
792LOCK_STATUS = TRUE
793WRITE_DISABLED_CAP = TRUE
794WRITE_ENABLED_CAP = TRUE
795WRITE_STATUS = TRUE
796WRITE_LOCK_CAP = TRUE
797WRITE_LOCK_STATUS = TRUE
798READ_DISABLED_CAP = TRUE
799READ_ENABLED_CAP = TRUE
800READ_STATUS = TRUE
801READ_LOCK_CAP = TRUE
802READ_LOCK_STATUS = TRUE
803
804[Capsule.Capsule_Boot]
805#
806# gEfiCapsuleGuid supported by platform
807# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
808#
809CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
810CAPSULE_FLAGS = PersistAcrossReset
811CAPSULE_HEADER_SIZE = 0x20
812
813FV = BiosUpdate
814
815[Capsule.Capsule_Reset]
816#
817# gEfiCapsuleGuid supported by platform
818# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
819#
820CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
821CAPSULE_FLAGS = PersistAcrossReset
822CAPSULE_HEADER_SIZE = 0x20
823
824FV = BiosUpdate
825
826################################################################################
827#
828# Rules are use with the [FV] section's module INF type to define
829# how an FFS file is created for a given INF file. The following Rule are the default
830# rules for the different module type. User can add the customized rules to define the
831# content of the FFS file.
832#
833################################################################################
834[Rule.Common.SEC]
835 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
836 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
837 RAW BIN Align = 16 |.com
838 }
839
840[Rule.Common.SEC.BINARY]
841 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
842 PE32 PE32 Align = 8 |.efi
843 RAW BIN Align = 16 |.com
844 }
845
846[Rule.Common.PEI_CORE]
847 FILE PEI_CORE = $(NAMED_GUID) {
848 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
849 UI STRING="$(MODULE_NAME)" Optional
850 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
851 }
852
853[Rule.Common.PEIM]
854 FILE PEIM = $(NAMED_GUID) {
855 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
856 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
857 UI STRING="$(MODULE_NAME)" Optional
858 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
859 }
860
861[Rule.Common.PEIM.BINARY]
862 FILE PEIM = $(NAMED_GUID) {
863 PEI_DEPEX PEI_DEPEX Optional |.depex
864 PE32 PE32 Align = Auto |.efi
865 UI STRING="$(MODULE_NAME)" Optional
866 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
867 }
868
869[Rule.Common.PEIM.BIOSID]
870 FILE PEIM = $(NAMED_GUID) {
871 RAW BIN BiosId.bin
872 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
873 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
874 UI STRING="$(MODULE_NAME)" Optional
875 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
876 }
877
878[Rule.Common.USER_DEFINED.APINIT]
879 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
880 RAW SEC_BIN |.com
881 }
882#cjia 2011-07-21
883[Rule.Common.USER_DEFINED.LEGACY16]
884 FILE FREEFORM = $(NAMED_GUID) {
885 UI STRING="$(MODULE_NAME)" Optional
886 RAW BIN |.bin
887 }
888#cjia
889
890[Rule.Common.USER_DEFINED.ASM16]
891 FILE FREEFORM = $(NAMED_GUID) {
892 UI STRING="$(MODULE_NAME)" Optional
893 RAW BIN |.com
894 }
895
896[Rule.Common.DXE_CORE]
897 FILE DXE_CORE = $(NAMED_GUID) {
898 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
899 UI STRING="$(MODULE_NAME)" Optional
900 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
901 }
902
903[Rule.Common.UEFI_DRIVER]
904 FILE DRIVER = $(NAMED_GUID) {
905 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
906 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
907 UI STRING="$(MODULE_NAME)" Optional
908 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
909 }
910
911[Rule.Common.UEFI_DRIVER.BINARY]
912 FILE DRIVER = $(NAMED_GUID) {
913 DXE_DEPEX DXE_DEPEX Optional |.depex
914 PE32 PE32 |.efi
915 UI STRING="$(MODULE_NAME)" Optional
916 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
917 }
918
919[Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
920 FILE DRIVER = $(NAMED_GUID) {
921 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
922 PE32 PE32 |.efi
923 UI STRING="$(MODULE_NAME)" Optional
924 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
925 }
926
927[Rule.Common.DXE_DRIVER]
928 FILE DRIVER = $(NAMED_GUID) {
929 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
930 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
931 UI STRING="$(MODULE_NAME)" Optional
932 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
933 }
934
935[Rule.Common.DXE_DRIVER.BINARY]
936 FILE DRIVER = $(NAMED_GUID) {
937 DXE_DEPEX DXE_DEPEX Optional |.depex
938 PE32 PE32 |.efi
939 UI STRING="$(MODULE_NAME)" Optional
940 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
941 }
942
943[Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
944 FILE DRIVER = $(NAMED_GUID) {
945 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
946 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
947 UI STRING="$(MODULE_NAME)" Optional
948 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
949 RAW ACPI Optional |.acpi
950 RAW ASL Optional |.aml
951 }
952
953[Rule.Common.DXE_RUNTIME_DRIVER]
954 FILE DRIVER = $(NAMED_GUID) {
955 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
956 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
957 UI STRING="$(MODULE_NAME)" Optional
958 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
959 }
960
961[Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
962 FILE DRIVER = $(NAMED_GUID) {
963 DXE_DEPEX DXE_DEPEX Optional |.depex
964 PE32 PE32 |.efi
965 UI STRING="$(MODULE_NAME)" Optional
966 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
967 }
968
969[Rule.Common.DXE_SMM_DRIVER]
970 FILE SMM = $(NAMED_GUID) {
971 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
972 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
973 UI STRING="$(MODULE_NAME)" Optional
974 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
975 }
976
977[Rule.Common.DXE_SMM_DRIVER.BINARY]
978 FILE SMM = $(NAMED_GUID) {
979 SMM_DEPEX SMM_DEPEX |.depex
980 PE32 PE32 |.efi
f4e7aa05 981 RAW BIN Optional |.aml
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982 UI STRING="$(MODULE_NAME)" Optional
983 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
984 }
985
986[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
987 FILE SMM = $(NAMED_GUID) {
988 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
989 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
990 UI STRING="$(MODULE_NAME)" Optional
991 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
992 RAW ACPI Optional |.acpi
993 RAW ASL Optional |.aml
994 }
995
996[Rule.Common.SMM_CORE]
997 FILE SMM_CORE = $(NAMED_GUID) {
998 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
999 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1000 UI STRING="$(MODULE_NAME)" Optional
1001 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1002 }
1003
1004[Rule.Common.SMM_CORE.BINARY]
1005 FILE SMM_CORE = $(NAMED_GUID) {
1006 DXE_DEPEX DXE_DEPEX Optional |.depex
1007 PE32 PE32 |.efi
1008 UI STRING="$(MODULE_NAME)" Optional
1009 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1010 }
1011
1012[Rule.Common.UEFI_APPLICATION]
1013 FILE APPLICATION = $(NAMED_GUID) {
1014 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1015 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1016 UI STRING="$(MODULE_NAME)" Optional
1017 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1018 }
1019
1020[Rule.Common.UEFI_APPLICATION.UI]
1021 FILE APPLICATION = $(NAMED_GUID) {
1022 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1023 UI STRING="Enter Setup"
1024 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1025 }
1026
1027[Rule.Common.USER_DEFINED]
1028 FILE FREEFORM = $(NAMED_GUID) {
1029 UI STRING="$(MODULE_NAME)" Optional
1030 RAW BIN |.bin
1031 }
1032
1033[Rule.Common.USER_DEFINED.ACPITABLE]
1034 FILE FREEFORM = $(NAMED_GUID) {
1035 RAW ACPI Optional |.acpi
1036 RAW ASL Optional |.aml
1037 }
1038
1039[Rule.Common.USER_DEFINED.ACPITABLE2]
1040 FILE FREEFORM = $(NAMED_GUID) {
1041 RAW ASL Optional |.aml
1042 }
1043
1044[Rule.Common.ACPITABLE]
1045 FILE FREEFORM = $(NAMED_GUID) {
1046 RAW ACPI Optional |.acpi
1047 RAW ASL Optional |.aml
1048 }
1049