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Fixed SOURCE_DEBUG_ENABLE build error.
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkgGcc.fdf
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3cbfba02
DW		 1#/** @file
2# FDF file of Platform.
3#
4# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
5#
6# This program and the accompanying materials are licensed and made available under
7# the terms and conditions of the BSD License that accompanies this distribution.
8# The full text of the license may be found at
9# http://opensource.org/licenses/bsd-license.php.
10#
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13#
14#
15#**/
16
17[Defines]
18DEFINE FLASH_BASE = 0xFFD00000 #The base address of the 3Mb FLASH Device.
19DEFINE FLASH_SIZE = 0x00300000 #The flash size in bytes of the 3Mb FLASH Device.
20DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 3Mb FLASH Device.
21DEFINE FLASH_NUM_BLOCKS = 0x300 #The number of blocks in 3Mb FLASH Device.
22DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
23DEFINE FLASH_AREA_SIZE = 0x00800000
24
b9459211
MG		 25DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
26DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00030000
27DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFD00000
3cbfba02 28
b9459211 29DEFINE FLASH_REGION_VPD_OFFSET = 0x00030000
3cbfba02
DW		 30DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
31
b9459211 32DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0006E000
3cbfba02
DW		 33DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
34
35
b9459211 36DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00070000
3cbfba02
DW		 37DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
38
39!if $(MINNOW2_FSP_BUILD) == TRUE
b9459211 40DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000B0000
3cbfba02 41DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
b9459211 42DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000
3cbfba02 43
b9459211 44DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x000F8000
3cbfba02 45DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
b9459211 46DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000
3cbfba02
DW		 47
48!endif
49
a4d42c22
TH		 50DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00100000
51DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00196000
3cbfba02
DW		 52
53
a4d42c22 54DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00296000
d58cb22f 55DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002C000
3cbfba02 56
d58cb22f
SL		 57DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x002C2000
58DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x0003E000
3cbfba02
DW		 59
60################################################################################
61#
62# FD Section
63# The [FD] Section is made up of the definition statements and a
64# description of what goes into the Flash Device Image. Each FD section
65# defines one flash "device" image. A flash device image may be one of
66# the following: Removable media bootable image (like a boot floppy
67# image,) an Option ROM image (that would be "flashed" into an add-in
68# card,) a System "Flash" image (that would be burned into a system's
69# flash) or an Update ("Capsule") image that will be used to update and
70# existing system flash.
71#
72################################################################################
73[FD.Vlv]
74BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
75Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
76ErasePolarity = 1
77BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
78NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
79
80#
81#Flash location override based on actual flash map
82#
83SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
84SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
85
86!if $(MINNOW2_FSP_BUILD) == TRUE
87# put below PCD value setting into dsc file
88#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
89#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
90#SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
91#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
92#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
93#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
94#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
95
96!endif
97################################################################################
98#
99# Following are lists of FD Region layout which correspond to the locations of different
100# images within the flash device.
101#
102# Regions must be defined in ascending order and may not overlap.
103#
104# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
105# the pipe "|" character, followed by the size of the region, also in hex with the leading
106# "0x" characters. Like:
107# Offset|Size
108# PcdOffsetCName|PcdSizeCName
109# RegionType <FV, DATA, or FILE>
110# Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
111#
112################################################################################
113# Since the Fce tool don't have gcc version, we can't handle default variable in Linux,
114# so we hardcode the default value of variable here.
115# Please note that we MUST update the binary once the default value is changed.
b9459211
MG		 116
117#
118 # CPU Microcodes
119 #
120
121$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
122gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
123FV = MICROCODE_FV
124
3cbfba02
DW		 125$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
126gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
127FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin
128
129$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
130gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
131FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin
132
133$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
134gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
135FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin
136
137!if $(MINNOW2_FSP_BUILD) == TRUE
138
139 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
140 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
141 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin
142
143
144 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
145 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
146
147!endif
3cbfba02
DW		 148
149 #
150 # Main Block
151 #
152$(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
153gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
154FV = FVMAIN_COMPACT
155
156 #
157 # FV Recovery#2
158 #
159$(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
160gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
161FV = FVRECOVERY2
162
163 #
164 # FV Recovery
165 #
166$(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
167gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
168FV = FVRECOVERY
169
170################################################################################
171#
172# FV Section
173#
174# [FV] section is used to define what components or modules are placed within a flash
175# device file. This section also defines order the components and modules are positioned
176# within the image. The [FV] section consists of define statements, set statements and
177# module statements.
178#
179################################################################################
180[FV.MICROCODE_FV]
181BlockSize = $(FLASH_BLOCK_SIZE)
182FvAlignment = 16
183ERASE_POLARITY = 1
184MEMORY_MAPPED = TRUE
185STICKY_WRITE = TRUE
186LOCK_CAP = TRUE
187LOCK_STATUS = FALSE
188WRITE_DISABLED_CAP = TRUE
189WRITE_ENABLED_CAP = TRUE
190WRITE_STATUS = TRUE
191WRITE_LOCK_CAP = TRUE
192WRITE_LOCK_STATUS = TRUE
193READ_DISABLED_CAP = TRUE
194READ_ENABLED_CAP = TRUE
195READ_STATUS = TRUE
196READ_LOCK_CAP = TRUE
197READ_LOCK_STATUS = TRUE
198
199FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
200 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
201}
202
203################################################################################
204#
205# FV Section
206#
207# [FV] section is used to define what components or modules are placed within a flash
208# device file. This section also defines order the components and modules are positioned
209# within the image. The [FV] section consists of define statements, set statements and
210# module statements.
211#
212################################################################################
213[FV.FVRECOVERY2]
214BlockSize = $(FLASH_BLOCK_SIZE)
215FvAlignment = 16 #FV alignment and FV attributes setting.
216ERASE_POLARITY = 1
217MEMORY_MAPPED = TRUE
218STICKY_WRITE = TRUE
219LOCK_CAP = TRUE
220LOCK_STATUS = TRUE
221WRITE_DISABLED_CAP = TRUE
222WRITE_ENABLED_CAP = TRUE
223WRITE_STATUS = TRUE
224WRITE_LOCK_CAP = TRUE
225WRITE_LOCK_STATUS = TRUE
226READ_DISABLED_CAP = TRUE
227READ_ENABLED_CAP = TRUE
228READ_STATUS = TRUE
229READ_LOCK_CAP = TRUE
230READ_LOCK_STATUS = TRUE
231FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
232
233
234
235INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
236
237!if $(MINNOW2_FSP_BUILD) == FALSE
238INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
239INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
240INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
241INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
242INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
243INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
244INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
245INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
246INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
247!endif
248
249INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
250!if $(TPM_ENABLED) == TRUE
251INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf
252INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
253INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
254!endif
255INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
256
257!if $(ACPI50_ENABLE) == TRUE
258 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
259!endif
260!if $(PERFORMANCE_ENABLE) == TRUE
261INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
262!endif
263
264[FV.FVRECOVERY]
265BlockSize = $(FLASH_BLOCK_SIZE)
266FvAlignment = 16 #FV alignment and FV attributes setting.
267ERASE_POLARITY = 1
268MEMORY_MAPPED = TRUE
269STICKY_WRITE = TRUE
270LOCK_CAP = TRUE
271LOCK_STATUS = TRUE
272WRITE_DISABLED_CAP = TRUE
273WRITE_ENABLED_CAP = TRUE
274WRITE_STATUS = TRUE
275WRITE_LOCK_CAP = TRUE
276WRITE_LOCK_STATUS = TRUE
277READ_DISABLED_CAP = TRUE
278READ_ENABLED_CAP = TRUE
279READ_STATUS = TRUE
280READ_LOCK_CAP = TRUE
281READ_LOCK_STATUS = TRUE
282FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
283
284
285!if $(MINNOW2_FSP_BUILD) == TRUE
286INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
287!else
288INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
289!endif
290
291INF MdeModulePkg/Core/Pei/PeiMain.inf
292!if $(MINNOW2_FSP_BUILD) == TRUE
293INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
294INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
295!endif
296INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
297INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
298!if $(SECURE_BOOT_ENABLE) == TRUE
299INF SecurityPkg/VariableAuthenticated/Pei/VariablePei.inf
300!else
301INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
302!endif
303
304INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
305
306!if $(MINNOW2_FSP_BUILD) == FALSE
307INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
308!endif
309
310!if $(SOURCE_DEBUG_ENABLE) == TRUE
311 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
312!endif
313
314
315!if $(CAPSULE_ENABLE) == TRUE
316INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
317INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
318!endif
319
320!if $(MINNOW2_FSP_BUILD) == FALSE
321!if $(PCIESC_ENABLE) == TRUE
322INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
323!endif
324INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
325!endif
326
327INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
328
329[FV.FVMAIN]
330BlockSize = $(FLASH_BLOCK_SIZE)
331FvAlignment = 16
332ERASE_POLARITY = 1
333MEMORY_MAPPED = TRUE
334STICKY_WRITE = TRUE
335LOCK_CAP = TRUE
336LOCK_STATUS = TRUE
337WRITE_DISABLED_CAP = TRUE
338WRITE_ENABLED_CAP = TRUE
339WRITE_STATUS = TRUE
340WRITE_LOCK_CAP = TRUE
341WRITE_LOCK_STATUS = TRUE
342READ_DISABLED_CAP = TRUE
343READ_ENABLED_CAP = TRUE
344READ_STATUS = TRUE
345READ_LOCK_CAP = TRUE
346READ_LOCK_STATUS = TRUE
347FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
348
349APRIORI DXE {
350 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
351 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
352 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
353 }
354
355FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
356 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
357 }
358
359 #
360 # EDK II Related Platform codes
361 #
362
363 !if $(MINNOW2_FSP_BUILD) == TRUE
364 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
365 !endif
366
367INF MdeModulePkg/Core/Dxe/DxeMain.inf
368INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
369!if $(ACPI50_ENABLE) == TRUE
370INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
371INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
372!endif
373
374
375INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
376INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
377INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
378INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
379INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
380INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
381INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
382INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
383INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
384INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
385INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
386INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
387INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
388
389!if $(SECURE_BOOT_ENABLE)
390INF SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableSmmRuntimeDxe.inf
391INF SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableSmm.inf
392INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
393INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
394INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
395INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
396!else
397INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
398INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
399INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
400INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
401INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
402!endif
403
404INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
405
406INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
407INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
408INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
409INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
410
411
412INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
413
414!if $(DATAHUB_ENABLE) == TRUE
415INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
416!endif
417INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
418INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
419
420INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
421
422 #
423 # EDK II Related Silicon codes
424 #
425INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
426
427!if $(USE_HPET_TIMER) == TRUE
428INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
429!else
430INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
431!endif
432INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
433
434INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
435
436INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
437INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
438
439!if $(MINNOW2_FSP_BUILD) == FALSE
440INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
441!endif
442INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
443!if $(PCIESC_ENABLE) == TRUE
444INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
445!endif
446
447INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
448INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
449INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
450INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
451INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
452!if $(MINNOW2_FSP_BUILD) == FALSE
453INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
454!else
455INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
456INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
457!endif
458!if $(TPM_ENABLED) == TRUE
459INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
460INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
461INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
462!endif
463
464#
465# EDK II Related Platform codes
466#
467INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
468INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
469INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
470INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
471INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
472INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
473INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
474INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
475INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
476!if $(GOP_DRIVER_ENABLE) == TRUE
477 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
478 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
479 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
480 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
481 SECTION UI = "IntelGopDriver"
482}
483!endif
484
485INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
486 #
487 # SMM
488 #
489INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
490INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
491INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCpuDxeSmm.inf
492
493INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
494INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
495INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCommunicationSmm.inf
496INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
497INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
498# INF Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/Dts/Smm/DigitalThermalSensor.inf
499 #
500 # ACPI
501 #
502INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
503INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
504INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
505INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
506
507INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
508
509INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
510
511 #
512 # PCI
513 #
514INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
515
516INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
517
518
519#
520# ISA
521#
522INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
523INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
524INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
525!if $(SOURCE_DEBUG_ENABLE) != TRUE
526INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
527!endif
1b354b08
TH		 528#INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
529#INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
3cbfba02
DW		 530
531#
532# SDIO
533#
534INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
535INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
536#
537# IDE/SCSI/AHCI
538#
539INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
540
541INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
542
543INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
544!if $(SATA_ENABLE) == TRUE
545INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
546#
547
548#
549INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
550INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
551!if $(SCSI_ENABLE) == TRUE
552INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
553INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
554!endif
555#
556!endif
557# Console
558#
559INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
c7d161de 560INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
3cbfba02
DW		 561INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
562INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
563INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
564INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
565INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
566INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
567 #
568 # USB
569 #
570!if $(USB_ENABLE) == TRUE
571INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
572INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
573INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
574INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
575INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
576INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
577INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
578!endif
579
580 #
581 # ECP
582 #
583INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf
584INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf
585INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf
586INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf
587INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf
588INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf
589 #
590 # SMBIOS
591 #
592INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
593INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
594
595INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
596
597 #
598 # Legacy Modules
599 #
600INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
601
602#
603# FAT file system
604#
605FILE DRIVER = 961578FE-B6B7-44c3-AF35-6BC705CD2B1F {
606 SECTION PE32 = FatBinPkg/EnhancedFatDxe/$(EDK_DXE_ARCHITECTURE)/Fat.efi
607 }
608#
609# UEFI Shell
610#
611FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
612# SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
613 SECTION PE32 = EdkShellBinPkg/MinimumShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
614 }
615
616
617
618!if $(GOP_DRIVER_ENABLE) == TRUE
619FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
620 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
621 SECTION UI = "IntelGopVbt"
622}
623!endif
624
625#
626# Network Modules
627#
628!if $(NETWORK_ENABLE) == TRUE
629 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
630 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
631 SECTION UI = "UNDI"
632 }
633 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
634 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
635 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
636 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
637 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
638 INF MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf
639 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
640 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
641 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
642 !if $(NETWORK_IP6_ENABLE) == TRUE
643 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
644 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
645 INF NetworkPkg/IpSecDxe/IpSecDxe.inf
646 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
647 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
648 !endif
649 !if $(NETWORK_IP6_ENABLE) == TRUE
650 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
651 INF NetworkPkg/TcpDxe/TcpDxe.inf
652 !else
653 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
654 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
655 !endif
656 !if $(NETWORK_VLAN_ENABLE) == TRUE
657 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
658 !endif
659 !if $(NETWORK_ISCSI_ENABLE) == TRUE
660 !if $(NETWORK_IP6_ENABLE) == TRUE
661 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
662 !else
663 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
664 !endif
665 !endif
666!endif
667
668[FV.FVMAIN_COMPACT]
669BlockSize = $(FLASH_BLOCK_SIZE)
670FvAlignment = 16
671ERASE_POLARITY = 1
672MEMORY_MAPPED = TRUE
673STICKY_WRITE = TRUE
674LOCK_CAP = TRUE
675LOCK_STATUS = TRUE
676WRITE_DISABLED_CAP = TRUE
677WRITE_ENABLED_CAP = TRUE
678WRITE_STATUS = TRUE
679WRITE_LOCK_CAP = TRUE
680WRITE_LOCK_STATUS = TRUE
681READ_DISABLED_CAP = TRUE
682READ_ENABLED_CAP = TRUE
683READ_STATUS = TRUE
684READ_LOCK_CAP = TRUE
685READ_LOCK_STATUS = TRUE
686
687
688
689FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
690!if $(LZMA_ENABLE) == TRUE
691# LZMA Compress
692 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
693 SECTION FV_IMAGE = FVMAIN
694 }
695!else
696!if $(DXE_COMPRESS_ENABLE) == TRUE
697# Tiano Compress
698 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
699 SECTION FV_IMAGE = FVMAIN
700 }
701!else
702# No Compress
703 SECTION COMPRESS PI_NONE {
704 SECTION FV_IMAGE = FVMAIN
705 }
706!endif
707!endif
708 }
709
710[FV.SETUP_DATA]
711BlockSize = $(FLASH_BLOCK_SIZE)
712#NumBlocks = 0x10
713FvAlignment = 16
714ERASE_POLARITY = 1
715MEMORY_MAPPED = TRUE
716STICKY_WRITE = TRUE
717LOCK_CAP = TRUE
718LOCK_STATUS = TRUE
719WRITE_DISABLED_CAP = TRUE
720WRITE_ENABLED_CAP = TRUE
721WRITE_STATUS = TRUE
722WRITE_LOCK_CAP = TRUE
723WRITE_LOCK_STATUS = TRUE
724READ_DISABLED_CAP = TRUE
725READ_ENABLED_CAP = TRUE
726READ_STATUS = TRUE
727READ_LOCK_CAP = TRUE
728READ_LOCK_STATUS = TRUE
729
730
731[FV.Update_Data]
732BlockSize = $(FLASH_BLOCK_SIZE)
733FvAlignment = 16
734ERASE_POLARITY = 1
735MEMORY_MAPPED = TRUE
736STICKY_WRITE = TRUE
737LOCK_CAP = TRUE
738LOCK_STATUS = TRUE
739WRITE_DISABLED_CAP = TRUE
740WRITE_ENABLED_CAP = TRUE
741WRITE_STATUS = TRUE
742WRITE_LOCK_CAP = TRUE
743WRITE_LOCK_STATUS = TRUE
744READ_DISABLED_CAP = TRUE
745READ_ENABLED_CAP = TRUE
746READ_STATUS = TRUE
747READ_LOCK_CAP = TRUE
748READ_LOCK_STATUS = TRUE
749
750FILE RAW = 88888888-8888-8888-8888-888888888888 {
751 FD = Vlv
752 }
753
754[FV.BiosUpdateCargo]
755BlockSize = $(FLASH_BLOCK_SIZE)
756FvAlignment = 16
757ERASE_POLARITY = 1
758MEMORY_MAPPED = TRUE
759STICKY_WRITE = TRUE
760LOCK_CAP = TRUE
761LOCK_STATUS = TRUE
762WRITE_DISABLED_CAP = TRUE
763WRITE_ENABLED_CAP = TRUE
764WRITE_STATUS = TRUE
765WRITE_LOCK_CAP = TRUE
766WRITE_LOCK_STATUS = TRUE
767READ_DISABLED_CAP = TRUE
768READ_ENABLED_CAP = TRUE
769READ_STATUS = TRUE
770READ_LOCK_CAP = TRUE
771READ_LOCK_STATUS = TRUE
772
773
774
775[FV.BiosUpdate]
776BlockSize = $(FLASH_BLOCK_SIZE)
777FvAlignment = 16
778ERASE_POLARITY = 1
779MEMORY_MAPPED = TRUE
780STICKY_WRITE = TRUE
781LOCK_CAP = TRUE
782LOCK_STATUS = TRUE
783WRITE_DISABLED_CAP = TRUE
784WRITE_ENABLED_CAP = TRUE
785WRITE_STATUS = TRUE
786WRITE_LOCK_CAP = TRUE
787WRITE_LOCK_STATUS = TRUE
788READ_DISABLED_CAP = TRUE
789READ_ENABLED_CAP = TRUE
790READ_STATUS = TRUE
791READ_LOCK_CAP = TRUE
792READ_LOCK_STATUS = TRUE
793
794[Capsule.Capsule_Boot]
795#
796# gEfiCapsuleGuid supported by platform
797# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
798#
799CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
800CAPSULE_FLAGS = PersistAcrossReset
801CAPSULE_HEADER_SIZE = 0x20
802
803FV = BiosUpdate
804
805[Capsule.Capsule_Reset]
806#
807# gEfiCapsuleGuid supported by platform
808# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
809#
810CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
811CAPSULE_FLAGS = PersistAcrossReset
812CAPSULE_HEADER_SIZE = 0x20
813
814FV = BiosUpdate
815
816################################################################################
817#
818# Rules are use with the [FV] section's module INF type to define
819# how an FFS file is created for a given INF file. The following Rule are the default
820# rules for the different module type. User can add the customized rules to define the
821# content of the FFS file.
822#
823################################################################################
824[Rule.Common.SEC]
825 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
826 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
827 RAW BIN Align = 16 |.com
828 }
829
830[Rule.Common.SEC.BINARY]
831 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
832 PE32 PE32 Align = 8 |.efi
833 RAW BIN Align = 16 |.com
834 }
835
836[Rule.Common.PEI_CORE]
837 FILE PEI_CORE = $(NAMED_GUID) {
838 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
839 UI STRING="$(MODULE_NAME)" Optional
840 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
841 }
842
843[Rule.Common.PEIM]
844 FILE PEIM = $(NAMED_GUID) {
845 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
846 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
847 UI STRING="$(MODULE_NAME)" Optional
848 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
849 }
850
851[Rule.Common.PEIM.BINARY]
852 FILE PEIM = $(NAMED_GUID) {
853 PEI_DEPEX PEI_DEPEX Optional |.depex
854 PE32 PE32 Align = Auto |.efi
855 UI STRING="$(MODULE_NAME)" Optional
856 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
857 }
858
859[Rule.Common.PEIM.BIOSID]
860 FILE PEIM = $(NAMED_GUID) {
861 RAW BIN BiosId.bin
862 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
863 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
864 UI STRING="$(MODULE_NAME)" Optional
865 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
866 }
867
868[Rule.Common.USER_DEFINED.APINIT]
869 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
870 RAW SEC_BIN |.com
871 }
872#cjia 2011-07-21
873[Rule.Common.USER_DEFINED.LEGACY16]
874 FILE FREEFORM = $(NAMED_GUID) {
875 UI STRING="$(MODULE_NAME)" Optional
876 RAW BIN |.bin
877 }
878#cjia
879
880[Rule.Common.USER_DEFINED.ASM16]
881 FILE FREEFORM = $(NAMED_GUID) {
882 UI STRING="$(MODULE_NAME)" Optional
883 RAW BIN |.com
884 }
885
886[Rule.Common.DXE_CORE]
887 FILE DXE_CORE = $(NAMED_GUID) {
888 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
889 UI STRING="$(MODULE_NAME)" Optional
890 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
891 }
892
893[Rule.Common.UEFI_DRIVER]
894 FILE DRIVER = $(NAMED_GUID) {
895 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
896 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
897 UI STRING="$(MODULE_NAME)" Optional
898 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
899 }
900
901[Rule.Common.UEFI_DRIVER.BINARY]
902 FILE DRIVER = $(NAMED_GUID) {
903 DXE_DEPEX DXE_DEPEX Optional |.depex
904 PE32 PE32 |.efi
905 UI STRING="$(MODULE_NAME)" Optional
906 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
907 }
908
909[Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
910 FILE DRIVER = $(NAMED_GUID) {
911 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
912 PE32 PE32 |.efi
913 UI STRING="$(MODULE_NAME)" Optional
914 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
915 }
916
917[Rule.Common.DXE_DRIVER]
918 FILE DRIVER = $(NAMED_GUID) {
919 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
920 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
921 UI STRING="$(MODULE_NAME)" Optional
922 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
923 }
924
925[Rule.Common.DXE_DRIVER.BINARY]
926 FILE DRIVER = $(NAMED_GUID) {
927 DXE_DEPEX DXE_DEPEX Optional |.depex
928 PE32 PE32 |.efi
929 UI STRING="$(MODULE_NAME)" Optional
930 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
931 }
932
933[Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
934 FILE DRIVER = $(NAMED_GUID) {
935 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
936 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
937 UI STRING="$(MODULE_NAME)" Optional
938 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
939 RAW ACPI Optional |.acpi
940 RAW ASL Optional |.aml
941 }
942
943[Rule.Common.DXE_RUNTIME_DRIVER]
944 FILE DRIVER = $(NAMED_GUID) {
945 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
946 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
947 UI STRING="$(MODULE_NAME)" Optional
948 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
949 }
950
951[Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
952 FILE DRIVER = $(NAMED_GUID) {
953 DXE_DEPEX DXE_DEPEX Optional |.depex
954 PE32 PE32 |.efi
955 UI STRING="$(MODULE_NAME)" Optional
956 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
957 }
958
959[Rule.Common.DXE_SMM_DRIVER]
960 FILE SMM = $(NAMED_GUID) {
961 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
962 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
963 UI STRING="$(MODULE_NAME)" Optional
964 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
965 }
966
967[Rule.Common.DXE_SMM_DRIVER.BINARY]
968 FILE SMM = $(NAMED_GUID) {
969 SMM_DEPEX SMM_DEPEX |.depex
970 PE32 PE32 |.efi
971 UI STRING="$(MODULE_NAME)" Optional
972 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
973 }
974
975[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
976 FILE SMM = $(NAMED_GUID) {
977 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
978 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
979 UI STRING="$(MODULE_NAME)" Optional
980 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
981 RAW ACPI Optional |.acpi
982 RAW ASL Optional |.aml
983 }
984
985[Rule.Common.SMM_CORE]
986 FILE SMM_CORE = $(NAMED_GUID) {
987 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
988 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
989 UI STRING="$(MODULE_NAME)" Optional
990 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
991 }
992
993[Rule.Common.SMM_CORE.BINARY]
994 FILE SMM_CORE = $(NAMED_GUID) {
995 DXE_DEPEX DXE_DEPEX Optional |.depex
996 PE32 PE32 |.efi
997 UI STRING="$(MODULE_NAME)" Optional
998 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
999 }
1000
1001[Rule.Common.UEFI_APPLICATION]
1002 FILE APPLICATION = $(NAMED_GUID) {
1003 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1004 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1005 UI STRING="$(MODULE_NAME)" Optional
1006 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1007 }
1008
1009[Rule.Common.UEFI_APPLICATION.UI]
1010 FILE APPLICATION = $(NAMED_GUID) {
1011 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1012 UI STRING="Enter Setup"
1013 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1014 }
1015
1016[Rule.Common.USER_DEFINED]
1017 FILE FREEFORM = $(NAMED_GUID) {
1018 UI STRING="$(MODULE_NAME)" Optional
1019 RAW BIN |.bin
1020 }
1021
1022[Rule.Common.USER_DEFINED.ACPITABLE]
1023 FILE FREEFORM = $(NAMED_GUID) {
1024 RAW ACPI Optional |.acpi
1025 RAW ASL Optional |.aml
1026 }
1027
1028[Rule.Common.USER_DEFINED.ACPITABLE2]
1029 FILE FREEFORM = $(NAMED_GUID) {
1030 RAW ASL Optional |.aml
1031 }
1032
1033[Rule.Common.ACPITABLE]
1034 FILE FREEFORM = $(NAMED_GUID) {
1035 RAW ACPI Optional |.acpi
1036 RAW ASL Optional |.aml
1037 }
1038
EFI Development Kit II mirror for PVE