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1 | /** @file\r | |
2 | Internal include file of DXE CPU IO Library.\r | |
3 | \r | |
4 | Copyright (c) 2006, Intel Corporation\r | |
5 | All rights reserved. This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | Module Name: DxeCpuIoLibInternal.h\r | |
14 | \r | |
15 | **/\r | |
16 | \r | |
17 | #ifndef _DXE_CPUIO_LIB_INTERNAL_H_\r | |
18 | #define _DXE_CPUIO_LIB_INTERNAL_H_\r | |
19 | \r | |
20 | #include <FrameworkDxe.h>\r | |
21 | #include <Library/IoLib.h>\r | |
22 | #include <Library/UefiBootServicesTableLib.h>\r | |
23 | #include <Library/DebugLib.h>\r | |
24 | #include <Library/BaseLib.h>\r | |
25 | \r | |
26 | #include <Protocol/PciRootBridgeIo.h>\r | |
27 | #include <Protocol/CpuIo.h>\r | |
28 | \r | |
29 | /**\r | |
30 | Reads registers in the EFI CPU I/O space.\r | |
31 | \r | |
32 | Reads the I/O port specified by Port with registers width specified by Width.\r | |
33 | The read value is returned. If such operations are not supported, then ASSERT().\r | |
34 | This function must guarantee that all I/O read and write operations are serialized.\r | |
35 | \r | |
36 | @param Port The base address of the I/O operation.\r | |
37 | The caller is responsible for aligning the Address if required.\r | |
38 | @param Width The width of the I/O operation.\r | |
39 | \r | |
40 | @return Data read from registers in the EFI CPU I/O space.\r | |
41 | \r | |
42 | **/\r | |
43 | UINT64\r | |
44 | EFIAPI\r | |
45 | IoReadWorker (\r | |
46 | IN UINTN Port,\r | |
47 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
48 | );\r | |
49 | \r | |
50 | /**\r | |
51 | Writes registers in the EFI CPU I/O space.\r | |
52 | \r | |
53 | Writes the I/O port specified by Port with registers width and value specified by Width\r | |
54 | and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r | |
55 | This function must guarantee that all I/O read and write operations are serialized.\r | |
56 | \r | |
57 | @param Port The base address of the I/O operation.\r | |
58 | The caller is responsible for aligning the Address if required.\r | |
59 | @param Width The width of the I/O operation.\r | |
60 | @param Data The value to write to the I/O port.\r | |
61 | \r | |
62 | @return The paramter of Data.\r | |
63 | \r | |
64 | **/\r | |
65 | UINT64\r | |
66 | EFIAPI\r | |
67 | IoWriteWorker (\r | |
68 | IN UINTN Port,\r | |
69 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
70 | IN UINT64 Data\r | |
71 | );\r | |
72 | \r | |
73 | /**\r | |
74 | Reads memory-mapped registers in the EFI system memory space.\r | |
75 | \r | |
76 | Reads the MMIO registers specified by Address with registers width specified by Width.\r | |
77 | The read value is returned. If such operations are not supported, then ASSERT().\r | |
78 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
79 | \r | |
80 | @param Address The MMIO register to read.\r | |
81 | The caller is responsible for aligning the Address if required.\r | |
82 | @param Width The width of the I/O operation.\r | |
83 | \r | |
84 | @return Data read from registers in the EFI system memory space.\r | |
85 | \r | |
86 | **/\r | |
87 | UINT64\r | |
88 | EFIAPI\r | |
89 | MmioReadWorker (\r | |
90 | IN UINTN Address,\r | |
91 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
92 | );\r | |
93 | \r | |
94 | /**\r | |
95 | Writes memory-mapped registers in the EFI system memory space.\r | |
96 | \r | |
97 | Writes the MMIO registers specified by Address with registers width and value specified by Width\r | |
98 | and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r | |
99 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
100 | \r | |
101 | @param Address The MMIO register to read.\r | |
102 | The caller is responsible for aligning the Address if required.\r | |
103 | @param Width The width of the I/O operation.\r | |
104 | \r | |
105 | @return Data read from registers in the EFI system memory space.\r | |
106 | \r | |
107 | **/\r | |
108 | UINT64\r | |
109 | EFIAPI\r | |
110 | MmioWriteWorker (\r | |
111 | IN UINTN Address,\r | |
112 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
113 | IN UINT64 Data\r | |
114 | );\r | |
115 | \r | |
116 | #endif\r |