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[mirror_edk2.git] / MdeModulePkg / Core / DxeIplPeim / X64 / DxeLoadFunc.c
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1/** @file\r
2 x64-specifc functionality for DxeLoad.\r
3\r
4Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
5SPDX-License-Identifier: BSD-2-Clause-Patent\r
6\r
7**/\r
8\r
9#include "DxeIpl.h"\r
10#include "X64/VirtualMemory.h"\r
11\r
12\r
13\r
14/**\r
15 Transfers control to DxeCore.\r
16\r
17 This function performs a CPU architecture specific operations to execute\r
18 the entry point of DxeCore with the parameters of HobList.\r
19 It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.\r
20\r
21 @param DxeCoreEntryPoint The entry point of DxeCore.\r
22 @param HobList The start of HobList passed to DxeCore.\r
23\r
24**/\r
25VOID\r
26HandOffToDxeCore (\r
27 IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r
28 IN EFI_PEI_HOB_POINTERS HobList\r
29 )\r
30{\r
31 VOID *BaseOfStack;\r
32 VOID *TopOfStack;\r
33 EFI_STATUS Status;\r
34 UINTN PageTables;\r
35 UINT32 Index;\r
36 EFI_VECTOR_HANDOFF_INFO *VectorInfo;\r
37 EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi;\r
38\r
39 //\r
40 // Clear page 0 and mark it as allocated if NULL pointer detection is enabled.\r
41 //\r
42 if (IsNullDetectionEnabled ()) {\r
43 ClearFirst4KPage (HobList.Raw);\r
44 BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData);\r
45 }\r
46\r
47 //\r
48 // Get Vector Hand-off Info PPI and build Guided HOB\r
49 //\r
50 Status = PeiServicesLocatePpi (\r
51 &gEfiVectorHandoffInfoPpiGuid,\r
52 0,\r
53 NULL,\r
54 (VOID **)&VectorHandoffInfoPpi\r
55 );\r
56 if (Status == EFI_SUCCESS) {\r
57 DEBUG ((EFI_D_INFO, "Vector Hand-off Info PPI is gotten, GUIDed HOB is created!\n"));\r
58 VectorInfo = VectorHandoffInfoPpi->Info;\r
59 Index = 1;\r
60 while (VectorInfo->Attribute != EFI_VECTOR_HANDOFF_LAST_ENTRY) {\r
61 VectorInfo ++;\r
62 Index ++;\r
63 }\r
64 BuildGuidDataHob (\r
65 &gEfiVectorHandoffInfoPpiGuid,\r
66 VectorHandoffInfoPpi->Info,\r
67 sizeof (EFI_VECTOR_HANDOFF_INFO) * Index\r
68 );\r
69 }\r
70\r
71 //\r
72 // Allocate 128KB for the Stack\r
73 //\r
74 BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));\r
75 ASSERT (BaseOfStack != NULL);\r
76\r
77 //\r
78 // Compute the top of the stack we were allocated. Pre-allocate a UINTN\r
79 // for safety.\r
80 //\r
81 TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);\r
82 TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r
83\r
84 PageTables = 0;\r
85 if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {\r
86 //\r
87 // Create page table and save PageMapLevel4 to CR3\r
88 //\r
89 PageTables = CreateIdentityMappingPageTables ((EFI_PHYSICAL_ADDRESS) (UINTN) BaseOfStack, STACK_SIZE);\r
90 } else {\r
91 //\r
92 // Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE\r
93 // for the DxeIpl and the DxeCore are both X64.\r
94 //\r
95 ASSERT (PcdGetBool (PcdSetNxForStack) == FALSE);\r
96 ASSERT (PcdGetBool (PcdCpuStackGuard) == FALSE);\r
97 }\r
98\r
99 //\r
100 // End of PEI phase signal\r
101 //\r
102 Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);\r
103 ASSERT_EFI_ERROR (Status);\r
104\r
105 if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {\r
106 AsmWriteCr3 (PageTables);\r
107 }\r
108\r
109 //\r
110 // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
111 //\r
112 UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE);\r
113\r
114 //\r
115 // Transfer the control to the entry point of DxeCore.\r
116 //\r
117 SwitchStack (\r
118 (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,\r
119 HobList.Raw,\r
120 NULL,\r
121 TopOfStack\r
122 );\r
123}\r