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MdePkg Acpi51.h:Correct the declaration of EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_ST...
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1/** @file \r
2 ACPI 5.1 definitions from the ACPI Specification Revision 5.1 July, 2014.\r
3\r
4 Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
5 This program and the accompanying materials \r
6 are licensed and made available under the terms and conditions of the BSD License \r
7 which accompanies this distribution. The full text of the license may be found at \r
8 http://opensource.org/licenses/bsd-license.php \r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
12**/\r
13\r
14#ifndef _ACPI_5_1_H_\r
15#define _ACPI_5_1_H_\r
16\r
17#include <IndustryStandard/Acpi50.h>\r
18\r
19//\r
20// Ensure proper structure formats\r
21//\r
22#pragma pack(1)\r
23\r
24///\r
25/// ACPI 5.1 Generic Address Space definition\r
26///\r
27typedef struct {\r
28 UINT8 AddressSpaceId;\r
29 UINT8 RegisterBitWidth;\r
30 UINT8 RegisterBitOffset;\r
31 UINT8 AccessSize;\r
32 UINT64 Address;\r
33} EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE;\r
34\r
35//\r
36// Generic Address Space Address IDs\r
37//\r
38#define EFI_ACPI_5_1_SYSTEM_MEMORY 0\r
39#define EFI_ACPI_5_1_SYSTEM_IO 1\r
40#define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2\r
41#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3\r
42#define EFI_ACPI_5_1_SMBUS 4\r
43#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
44#define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
45\r
46//\r
47// Generic Address Space Access Sizes\r
48//\r
49#define EFI_ACPI_5_1_UNDEFINED 0\r
50#define EFI_ACPI_5_1_BYTE 1\r
51#define EFI_ACPI_5_1_WORD 2\r
52#define EFI_ACPI_5_1_DWORD 3\r
53#define EFI_ACPI_5_1_QWORD 4\r
54\r
55//\r
56// ACPI 5.1 table structures\r
57//\r
58\r
59///\r
60/// Root System Description Pointer Structure\r
61///\r
62typedef struct {\r
63 UINT64 Signature;\r
64 UINT8 Checksum;\r
65 UINT8 OemId[6];\r
66 UINT8 Revision;\r
67 UINT32 RsdtAddress;\r
68 UINT32 Length;\r
69 UINT64 XsdtAddress;\r
70 UINT8 ExtendedChecksum;\r
71 UINT8 Reserved[3];\r
72} EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
73\r
74///\r
75/// RSD_PTR Revision (as defined in ACPI 5.1 spec.)\r
76///\r
77#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2\r
78\r
79///\r
80/// Common table header, this prefaces all ACPI tables, including FACS, but\r
81/// excluding the RSD PTR structure\r
82///\r
83typedef struct {\r
84 UINT32 Signature;\r
85 UINT32 Length;\r
86} EFI_ACPI_5_1_COMMON_HEADER;\r
87\r
88//\r
89// Root System Description Table\r
90// No definition needed as it is a common description table header, the same with \r
91// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
92//\r
93\r
94///\r
95/// RSDT Revision (as defined in ACPI 5.1 spec.)\r
96///\r
97#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
98\r
99//\r
100// Extended System Description Table\r
101// No definition needed as it is a common description table header, the same with \r
102// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
103//\r
104\r
105///\r
106/// XSDT Revision (as defined in ACPI 5.1 spec.)\r
107///\r
108#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
109\r
110///\r
111/// Fixed ACPI Description Table Structure (FADT)\r
112///\r
113typedef struct {\r
114 EFI_ACPI_DESCRIPTION_HEADER Header;\r
115 UINT32 FirmwareCtrl;\r
116 UINT32 Dsdt;\r
117 UINT8 Reserved0;\r
118 UINT8 PreferredPmProfile;\r
119 UINT16 SciInt;\r
120 UINT32 SmiCmd;\r
121 UINT8 AcpiEnable;\r
122 UINT8 AcpiDisable;\r
123 UINT8 S4BiosReq;\r
124 UINT8 PstateCnt;\r
125 UINT32 Pm1aEvtBlk;\r
126 UINT32 Pm1bEvtBlk;\r
127 UINT32 Pm1aCntBlk;\r
128 UINT32 Pm1bCntBlk;\r
129 UINT32 Pm2CntBlk;\r
130 UINT32 PmTmrBlk;\r
131 UINT32 Gpe0Blk;\r
132 UINT32 Gpe1Blk;\r
133 UINT8 Pm1EvtLen;\r
134 UINT8 Pm1CntLen;\r
135 UINT8 Pm2CntLen;\r
136 UINT8 PmTmrLen;\r
137 UINT8 Gpe0BlkLen;\r
138 UINT8 Gpe1BlkLen;\r
139 UINT8 Gpe1Base;\r
140 UINT8 CstCnt;\r
141 UINT16 PLvl2Lat;\r
142 UINT16 PLvl3Lat;\r
143 UINT16 FlushSize;\r
144 UINT16 FlushStride;\r
145 UINT8 DutyOffset;\r
146 UINT8 DutyWidth;\r
147 UINT8 DayAlrm;\r
148 UINT8 MonAlrm;\r
149 UINT8 Century;\r
150 UINT16 IaPcBootArch;\r
151 UINT8 Reserved1;\r
152 UINT32 Flags;\r
153 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
154 UINT8 ResetValue;\r
155 UINT16 ArmBootArch;\r
156 UINT8 MinorVersion;\r
157 UINT64 XFirmwareCtrl;\r
158 UINT64 XDsdt;\r
159 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
160 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
161 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
162 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
163 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
164 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
165 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
166 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
167 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
168 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
169} EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE;\r
170\r
171///\r
172/// FADT Version (as defined in ACPI 5.1 spec.)\r
173///\r
174#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05\r
175#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01\r
176\r
177//\r
178// Fixed ACPI Description Table Preferred Power Management Profile\r
179//\r
180#define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED 0\r
181#define EFI_ACPI_5_1_PM_PROFILE_DESKTOP 1\r
182#define EFI_ACPI_5_1_PM_PROFILE_MOBILE 2\r
183#define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION 3\r
184#define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER 4\r
185#define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER 5\r
186#define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC 6\r
187#define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER 7\r
188#define EFI_ACPI_5_1_PM_PROFILE_TABLET 8\r
189\r
190//\r
191// Fixed ACPI Description Table Boot Architecture Flags\r
192// All other bits are reserved and must be set to 0.\r
193//\r
194#define EFI_ACPI_5_1_LEGACY_DEVICES BIT0\r
195#define EFI_ACPI_5_1_8042 BIT1\r
196#define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2\r
197#define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3\r
198#define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4\r
199#define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5\r
200\r
201//\r
202// Fixed ACPI Description Table Arm Boot Architecture Flags\r
203// All other bits are reserved and must be set to 0.\r
204//\r
205#define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0\r
206#define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1\r
207\r
208//\r
209// Fixed ACPI Description Table Fixed Feature Flags\r
210// All other bits are reserved and must be set to 0.\r
211//\r
212#define EFI_ACPI_5_1_WBINVD BIT0\r
213#define EFI_ACPI_5_1_WBINVD_FLUSH BIT1\r
214#define EFI_ACPI_5_1_PROC_C1 BIT2\r
215#define EFI_ACPI_5_1_P_LVL2_UP BIT3\r
216#define EFI_ACPI_5_1_PWR_BUTTON BIT4\r
217#define EFI_ACPI_5_1_SLP_BUTTON BIT5\r
218#define EFI_ACPI_5_1_FIX_RTC BIT6\r
219#define EFI_ACPI_5_1_RTC_S4 BIT7\r
220#define EFI_ACPI_5_1_TMR_VAL_EXT BIT8\r
221#define EFI_ACPI_5_1_DCK_CAP BIT9\r
222#define EFI_ACPI_5_1_RESET_REG_SUP BIT10\r
223#define EFI_ACPI_5_1_SEALED_CASE BIT11\r
224#define EFI_ACPI_5_1_HEADLESS BIT12\r
225#define EFI_ACPI_5_1_CPU_SW_SLP BIT13\r
226#define EFI_ACPI_5_1_PCI_EXP_WAK BIT14\r
227#define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15\r
228#define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16\r
229#define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17\r
230#define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18\r
231#define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
232#define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20\r
233#define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
234\r
235///\r
236/// Firmware ACPI Control Structure\r
237///\r
238typedef struct {\r
239 UINT32 Signature;\r
240 UINT32 Length;\r
241 UINT32 HardwareSignature;\r
242 UINT32 FirmwareWakingVector;\r
243 UINT32 GlobalLock;\r
244 UINT32 Flags;\r
245 UINT64 XFirmwareWakingVector;\r
246 UINT8 Version;\r
247 UINT8 Reserved0[3];\r
248 UINT32 OspmFlags;\r
249 UINT8 Reserved1[24];\r
250} EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
251\r
252///\r
253/// FACS Version (as defined in ACPI 5.1 spec.)\r
254///\r
255#define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
256\r
257///\r
258/// Firmware Control Structure Feature Flags\r
259/// All other bits are reserved and must be set to 0.\r
260///\r
261#define EFI_ACPI_5_1_S4BIOS_F BIT0\r
262#define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1\r
263\r
264///\r
265/// OSPM Enabled Firmware Control Structure Flags\r
266/// All other bits are reserved and must be set to 0.\r
267///\r
268#define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0\r
269\r
270//\r
271// Differentiated System Description Table,\r
272// Secondary System Description Table\r
273// and Persistent System Description Table,\r
274// no definition needed as they are common description table header, the same with\r
275// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
276//\r
277#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
278#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
279\r
280///\r
281/// Multiple APIC Description Table header definition. The rest of the table\r
282/// must be defined in a platform specific manner.\r
283///\r
284typedef struct {\r
285 EFI_ACPI_DESCRIPTION_HEADER Header;\r
286 UINT32 LocalApicAddress;\r
287 UINT32 Flags;\r
288} EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
289\r
290///\r
291/// MADT Revision (as defined in ACPI 5.1 spec.)\r
292///\r
293#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03\r
294\r
295///\r
296/// Multiple APIC Flags\r
297/// All other bits are reserved and must be set to 0.\r
298///\r
299#define EFI_ACPI_5_1_PCAT_COMPAT BIT0\r
300\r
301//\r
302// Multiple APIC Description Table APIC structure types\r
303// All other values between 0x0D and 0x7F are reserved and\r
304// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
305//\r
306#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC 0x00\r
307#define EFI_ACPI_5_1_IO_APIC 0x01\r
308#define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE 0x02\r
309#define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
310#define EFI_ACPI_5_1_LOCAL_APIC_NMI 0x04\r
311#define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
312#define EFI_ACPI_5_1_IO_SAPIC 0x06\r
313#define EFI_ACPI_5_1_LOCAL_SAPIC 0x07\r
314#define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES 0x08\r
315#define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC 0x09\r
316#define EFI_ACPI_5_1_LOCAL_X2APIC_NMI 0x0A\r
317#define EFI_ACPI_5_1_GIC 0x0B\r
318#define EFI_ACPI_5_1_GICD 0x0C\r
319#define EFI_ACPI_5_1_GIC_MSI_FRAME 0x0D\r
320#define EFI_ACPI_5_1_GICR 0x0E\r
321\r
322//\r
323// APIC Structure Definitions\r
324//\r
325\r
326///\r
327/// Processor Local APIC Structure Definition\r
328///\r
329typedef struct {\r
330 UINT8 Type;\r
331 UINT8 Length;\r
332 UINT8 AcpiProcessorId;\r
333 UINT8 ApicId;\r
334 UINT32 Flags;\r
335} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
336\r
337///\r
338/// Local APIC Flags. All other bits are reserved and must be 0.\r
339///\r
340#define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0\r
341\r
342///\r
343/// IO APIC Structure\r
344///\r
345typedef struct {\r
346 UINT8 Type;\r
347 UINT8 Length;\r
348 UINT8 IoApicId;\r
349 UINT8 Reserved;\r
350 UINT32 IoApicAddress;\r
351 UINT32 GlobalSystemInterruptBase;\r
352} EFI_ACPI_5_1_IO_APIC_STRUCTURE;\r
353\r
354///\r
355/// Interrupt Source Override Structure\r
356///\r
357typedef struct {\r
358 UINT8 Type;\r
359 UINT8 Length;\r
360 UINT8 Bus;\r
361 UINT8 Source;\r
362 UINT32 GlobalSystemInterrupt;\r
363 UINT16 Flags;\r
364} EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
365\r
366///\r
367/// Platform Interrupt Sources Structure Definition\r
368///\r
369typedef struct {\r
370 UINT8 Type;\r
371 UINT8 Length;\r
372 UINT16 Flags;\r
373 UINT8 InterruptType;\r
374 UINT8 ProcessorId;\r
375 UINT8 ProcessorEid;\r
376 UINT8 IoSapicVector;\r
377 UINT32 GlobalSystemInterrupt;\r
378 UINT32 PlatformInterruptSourceFlags;\r
379 UINT8 CpeiProcessorOverride;\r
380 UINT8 Reserved[31];\r
381} EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
382\r
383//\r
384// MPS INTI flags.\r
385// All other bits are reserved and must be set to 0.\r
386//\r
387#define EFI_ACPI_5_1_POLARITY (3 << 0)\r
388#define EFI_ACPI_5_1_TRIGGER_MODE (3 << 2)\r
389\r
390///\r
391/// Non-Maskable Interrupt Source Structure\r
392///\r
393typedef struct {\r
394 UINT8 Type;\r
395 UINT8 Length;\r
396 UINT16 Flags;\r
397 UINT32 GlobalSystemInterrupt;\r
398} EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
399\r
400///\r
401/// Local APIC NMI Structure\r
402///\r
403typedef struct {\r
404 UINT8 Type;\r
405 UINT8 Length;\r
406 UINT8 AcpiProcessorId;\r
407 UINT16 Flags;\r
408 UINT8 LocalApicLint;\r
409} EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE;\r
410\r
411///\r
412/// Local APIC Address Override Structure\r
413///\r
414typedef struct {\r
415 UINT8 Type;\r
416 UINT8 Length;\r
417 UINT16 Reserved;\r
418 UINT64 LocalApicAddress;\r
419} EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
420\r
421///\r
422/// IO SAPIC Structure\r
423///\r
424typedef struct {\r
425 UINT8 Type;\r
426 UINT8 Length;\r
427 UINT8 IoApicId;\r
428 UINT8 Reserved;\r
429 UINT32 GlobalSystemInterruptBase;\r
430 UINT64 IoSapicAddress;\r
431} EFI_ACPI_5_1_IO_SAPIC_STRUCTURE;\r
432\r
433///\r
434/// Local SAPIC Structure\r
435/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
436///\r
437typedef struct {\r
438 UINT8 Type;\r
439 UINT8 Length;\r
440 UINT8 AcpiProcessorId;\r
441 UINT8 LocalSapicId;\r
442 UINT8 LocalSapicEid;\r
443 UINT8 Reserved[3];\r
444 UINT32 Flags;\r
445 UINT32 ACPIProcessorUIDValue;\r
446} EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
447\r
448///\r
449/// Platform Interrupt Sources Structure\r
450///\r
451typedef struct {\r
452 UINT8 Type;\r
453 UINT8 Length;\r
454 UINT16 Flags;\r
455 UINT8 InterruptType;\r
456 UINT8 ProcessorId;\r
457 UINT8 ProcessorEid;\r
458 UINT8 IoSapicVector;\r
459 UINT32 GlobalSystemInterrupt;\r
460 UINT32 PlatformInterruptSourceFlags;\r
461} EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
462\r
463///\r
464/// Platform Interrupt Source Flags.\r
465/// All other bits are reserved and must be set to 0.\r
466///\r
467#define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0\r
468\r
469///\r
470/// Processor Local x2APIC Structure Definition\r
471///\r
472typedef struct {\r
473 UINT8 Type;\r
474 UINT8 Length;\r
475 UINT8 Reserved[2];\r
476 UINT32 X2ApicId;\r
477 UINT32 Flags;\r
478 UINT32 AcpiProcessorUid;\r
479} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
480\r
481///\r
482/// Local x2APIC NMI Structure\r
483///\r
484typedef struct {\r
485 UINT8 Type;\r
486 UINT8 Length;\r
487 UINT16 Flags;\r
488 UINT32 AcpiProcessorUid;\r
489 UINT8 LocalX2ApicLint;\r
490 UINT8 Reserved[3];\r
491} EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE;\r
492\r
493///\r
494/// GIC Structure\r
495///\r
496typedef struct {\r
497 UINT8 Type;\r
498 UINT8 Length;\r
499 UINT16 Reserved;\r
500 UINT32 CPUInterfaceNumber;\r
501 UINT32 AcpiProcessorUid;\r
502 UINT32 Flags;\r
503 UINT32 ParkingProtocolVersion;\r
504 UINT32 PerformanceInterruptGsiv;\r
505 UINT64 ParkedAddress;\r
506 UINT64 PhysicalBaseAddress;\r
507 UINT64 GICV;\r
508 UINT64 GICH;\r
509 UINT32 VGICMaintenanceInterrupt;\r
510 UINT64 GICRBaseAddress;\r
511 UINT64 MPIDR;\r
512} EFI_ACPI_5_1_GIC_STRUCTURE;\r
513\r
514///\r
515/// GIC Flags. All other bits are reserved and must be 0.\r
516///\r
517#define EFI_ACPI_5_1_GIC_ENABLED BIT0\r
518#define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1\r
519#define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2\r
520\r
521///\r
522/// GIC Distributor Structure\r
523///\r
524typedef struct {\r
525 UINT8 Type;\r
526 UINT8 Length;\r
527 UINT16 Reserved1;\r
528 UINT32 GicId;\r
529 UINT64 PhysicalBaseAddress;\r
530 UINT32 SystemVectorBase;\r
531 UINT32 Reserved2;\r
532} EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE;\r
533\r
534///\r
535/// GIC MSI Frame Structure\r
536///\r
537typedef struct {\r
538 UINT8 Type;\r
539 UINT8 Length;\r
540 UINT16 Reserved1;\r
541 UINT32 GicMsiFrameId;\r
542 UINT64 PhysicalBaseAddress;\r
543 UINT32 Flags;\r
544 UINT16 SPICount;\r
545 UINT16 SPIBase;\r
546} EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE;\r
547\r
548///\r
549/// GIC MSI Frame Flags. All other bits are reserved and must be 0.\r
550///\r
551#define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0\r
552\r
553///\r
554/// GICR Structure\r
555///\r
556typedef struct {\r
557 UINT8 Type;\r
558 UINT8 Length;\r
559 UINT16 Reserved;\r
560 UINT64 DiscoveryRangeBaseAddress;\r
561 UINT32 DiscoveryRangeLength;\r
562} EFI_ACPI_5_1_GICR_STRUCTURE;\r
563\r
564///\r
565/// Smart Battery Description Table (SBST)\r
566///\r
567typedef struct {\r
568 EFI_ACPI_DESCRIPTION_HEADER Header;\r
569 UINT32 WarningEnergyLevel;\r
570 UINT32 LowEnergyLevel;\r
571 UINT32 CriticalEnergyLevel;\r
572} EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE;\r
573\r
574///\r
575/// SBST Version (as defined in ACPI 5.1 spec.)\r
576///\r
577#define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
578\r
579///\r
580/// Embedded Controller Boot Resources Table (ECDT)\r
581/// The table is followed by a null terminated ASCII string that contains\r
582/// a fully qualified reference to the name space object.\r
583///\r
584typedef struct {\r
585 EFI_ACPI_DESCRIPTION_HEADER Header;\r
586 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl;\r
587 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData;\r
588 UINT32 Uid;\r
589 UINT8 GpeBit;\r
590} EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
591\r
592///\r
593/// ECDT Version (as defined in ACPI 5.1 spec.)\r
594///\r
595#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
596\r
597///\r
598/// System Resource Affinity Table (SRAT). The rest of the table\r
599/// must be defined in a platform specific manner.\r
600///\r
601typedef struct {\r
602 EFI_ACPI_DESCRIPTION_HEADER Header;\r
603 UINT32 Reserved1; ///< Must be set to 1\r
604 UINT64 Reserved2;\r
605} EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
606\r
607///\r
608/// SRAT Version (as defined in ACPI 5.1 spec.)\r
609///\r
610#define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
611\r
612//\r
613// SRAT structure types.\r
614// All other values between 0x04 an 0xFF are reserved and\r
615// will be ignored by OSPM.\r
616//\r
617#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
618#define EFI_ACPI_5_1_MEMORY_AFFINITY 0x01\r
619#define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
620#define EFI_ACPI_5_1_GICC_AFFINITY 0x03\r
621\r
622///\r
623/// Processor Local APIC/SAPIC Affinity Structure Definition\r
624///\r
625typedef struct {\r
626 UINT8 Type;\r
627 UINT8 Length;\r
628 UINT8 ProximityDomain7To0;\r
629 UINT8 ApicId;\r
630 UINT32 Flags;\r
631 UINT8 LocalSapicEid;\r
632 UINT8 ProximityDomain31To8[3];\r
633 UINT32 ClockDomain;\r
634} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
635\r
636///\r
637/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
638///\r
639#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
640\r
641///\r
642/// Memory Affinity Structure Definition\r
643///\r
644typedef struct {\r
645 UINT8 Type;\r
646 UINT8 Length;\r
647 UINT32 ProximityDomain;\r
648 UINT16 Reserved1;\r
649 UINT32 AddressBaseLow;\r
650 UINT32 AddressBaseHigh;\r
651 UINT32 LengthLow;\r
652 UINT32 LengthHigh;\r
653 UINT32 Reserved2;\r
654 UINT32 Flags;\r
655 UINT64 Reserved3;\r
656} EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE;\r
657\r
658//\r
659// Memory Flags. All other bits are reserved and must be 0.\r
660//\r
661#define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0)\r
662#define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)\r
663#define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2)\r
664\r
665///\r
666/// Processor Local x2APIC Affinity Structure Definition\r
667///\r
668typedef struct {\r
669 UINT8 Type;\r
670 UINT8 Length;\r
671 UINT8 Reserved1[2];\r
672 UINT32 ProximityDomain;\r
673 UINT32 X2ApicId;\r
674 UINT32 Flags;\r
675 UINT32 ClockDomain;\r
676 UINT8 Reserved2[4];\r
677} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
678\r
679///\r
680/// GICC Affinity Structure Definition\r
681///\r
682typedef struct {\r
683 UINT8 Type;\r
684 UINT8 Length;\r
685 UINT32 ProximityDomain;\r
686 UINT32 AcpiProcessorUid;\r
687 UINT32 Flags;\r
688 UINT32 ClockDomain;\r
689} EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE;\r
690\r
691///\r
692/// GICC Flags. All other bits are reserved and must be 0.\r
693///\r
694#define EFI_ACPI_5_1_GICC_ENABLED (1 << 0)\r
695\r
696///\r
697/// System Locality Distance Information Table (SLIT).\r
698/// The rest of the table is a matrix.\r
699///\r
700typedef struct {\r
701 EFI_ACPI_DESCRIPTION_HEADER Header;\r
702 UINT64 NumberOfSystemLocalities;\r
703} EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
704\r
705///\r
706/// SLIT Version (as defined in ACPI 5.1 spec.)\r
707///\r
708#define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
709\r
710///\r
711/// Corrected Platform Error Polling Table (CPEP)\r
712///\r
713typedef struct {\r
714 EFI_ACPI_DESCRIPTION_HEADER Header;\r
715 UINT8 Reserved[8];\r
716} EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
717\r
718///\r
719/// CPEP Version (as defined in ACPI 5.1 spec.)\r
720///\r
721#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
722\r
723//\r
724// CPEP processor structure types.\r
725//\r
726#define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
727\r
728///\r
729/// Corrected Platform Error Polling Processor Structure Definition\r
730///\r
731typedef struct {\r
732 UINT8 Type;\r
733 UINT8 Length;\r
734 UINT8 ProcessorId;\r
735 UINT8 ProcessorEid;\r
736 UINT32 PollingInterval;\r
737} EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
738\r
739///\r
740/// Maximum System Characteristics Table (MSCT)\r
741///\r
742typedef struct {\r
743 EFI_ACPI_DESCRIPTION_HEADER Header;\r
744 UINT32 OffsetProxDomInfo;\r
745 UINT32 MaximumNumberOfProximityDomains;\r
746 UINT32 MaximumNumberOfClockDomains;\r
747 UINT64 MaximumPhysicalAddress;\r
748} EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
749\r
750///\r
751/// MSCT Version (as defined in ACPI 5.1 spec.)\r
752///\r
753#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
754\r
755///\r
756/// Maximum Proximity Domain Information Structure Definition\r
757///\r
758typedef struct {\r
759 UINT8 Revision;\r
760 UINT8 Length;\r
761 UINT32 ProximityDomainRangeLow;\r
762 UINT32 ProximityDomainRangeHigh;\r
763 UINT32 MaximumProcessorCapacity;\r
764 UINT64 MaximumMemoryCapacity;\r
765} EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
766\r
767///\r
768/// ACPI RAS Feature Table definition.\r
769///\r
770typedef struct {\r
771 EFI_ACPI_DESCRIPTION_HEADER Header;\r
772 UINT8 PlatformCommunicationChannelIdentifier[12];\r
773} EFI_ACPI_5_1_RAS_FEATURE_TABLE;\r
774\r
775///\r
776/// RASF Version (as defined in ACPI 5.1 spec.)\r
777///\r
778#define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01\r
779\r
780///\r
781/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
782///\r
783typedef struct {\r
784 UINT32 Signature;\r
785 UINT16 Command;\r
786 UINT16 Status;\r
787 UINT16 Version;\r
788 UINT8 RASCapabilities[16];\r
789 UINT8 SetRASCapabilities[16];\r
790 UINT16 NumberOfRASFParameterBlocks;\r
791 UINT32 SetRASCapabilitiesStatus;\r
792} EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
793\r
794///\r
795/// ACPI RASF PCC command code\r
796///\r
797#define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
798\r
799///\r
800/// ACPI RASF Platform RAS Capabilities\r
801///\r
802#define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01\r
803#define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02\r
804\r
805///\r
806/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
807///\r
808typedef struct {\r
809 UINT16 Type;\r
810 UINT16 Version;\r
811 UINT16 Length;\r
812 UINT16 PatrolScrubCommand;\r
813 UINT64 RequestedAddressRange[2];\r
814 UINT64 ActualAddressRange[2];\r
815 UINT16 Flags;\r
816 UINT8 RequestedSpeed;\r
817} EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
818\r
819///\r
820/// ACPI RASF Patrol Scrub command\r
821///\r
822#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
823#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
824#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
825\r
826///\r
827/// Memory Power State Table definition.\r
828///\r
829typedef struct {\r
830 EFI_ACPI_DESCRIPTION_HEADER Header;\r
831 UINT8 PlatformCommunicationChannelIdentifier;\r
832 UINT8 Reserved[3];\r
833// Memory Power Node Structure\r
834// Memory Power State Characteristics\r
835} EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE;\r
836\r
837///\r
838/// MPST Version (as defined in ACPI 5.1 spec.)\r
839///\r
840#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
841\r
842///\r
843/// MPST Platform Communication Channel Shared Memory Region definition.\r
844///\r
845typedef struct {\r
846 UINT32 Signature;\r
847 UINT16 Command;\r
848 UINT16 Status;\r
849 UINT32 MemoryPowerCommandRegister;\r
850 UINT32 MemoryPowerStatusRegister;\r
851 UINT32 PowerStateId;\r
852 UINT32 MemoryPowerNodeId;\r
853 UINT64 MemoryEnergyConsumed;\r
854 UINT64 ExpectedAveragePowerComsuned;\r
855} EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
856\r
857///\r
858/// ACPI MPST PCC command code\r
859///\r
860#define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
861\r
862///\r
863/// ACPI MPST Memory Power command\r
864///\r
865#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
866#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
867#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
868#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
869\r
870///\r
871/// MPST Memory Power Node Table\r
872///\r
873typedef struct {\r
874 UINT8 PowerStateValue;\r
875 UINT8 PowerStateInformationIndex;\r
876} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE;\r
877\r
878typedef struct {\r
879 UINT8 Flag;\r
880 UINT8 Reserved;\r
881 UINT16 MemoryPowerNodeId;\r
882 UINT32 Length;\r
883 UINT64 AddressBase;\r
884 UINT64 AddressLength;\r
885 UINT32 NumberOfPowerStates;\r
886 UINT32 NumberOfPhysicalComponents;\r
887//EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
888//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
889} EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE;\r
890\r
891#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
892#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
893#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
894\r
895typedef struct {\r
896 UINT16 MemoryPowerNodeCount;\r
897 UINT8 Reserved[2];\r
898} EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE;\r
899\r
900///\r
901/// MPST Memory Power State Characteristics Table\r
902///\r
903typedef struct {\r
904 UINT8 PowerStateStructureID;\r
905 UINT8 Flag;\r
906 UINT16 Reserved;\r
907 UINT32 AveragePowerConsumedInMPS0;\r
908 UINT32 RelativePowerSavingToMPS0;\r
909 UINT64 ExitLatencyToMPS0;\r
910} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
911\r
912#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
913#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
914#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
915\r
916typedef struct {\r
917 UINT16 MemoryPowerStateCharacteristicsCount;\r
918 UINT8 Reserved[2];\r
919} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
920\r
921///\r
922/// Memory Topology Table definition.\r
923///\r
924typedef struct {\r
925 EFI_ACPI_DESCRIPTION_HEADER Header;\r
926 UINT32 Reserved;\r
927} EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE;\r
928\r
929///\r
930/// PMTT Version (as defined in ACPI 5.1 spec.)\r
931///\r
932#define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01\r
933\r
934///\r
935/// Common Memory Aggregator Device Structure.\r
936///\r
937typedef struct {\r
938 UINT8 Type;\r
939 UINT8 Reserved;\r
940 UINT16 Length;\r
941 UINT16 Flags;\r
942 UINT16 Reserved1;\r
943} EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
944\r
945///\r
946/// Memory Aggregator Device Type\r
947///\r
948#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1\r
949#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2\r
950#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3\r
951\r
952///\r
953/// Socket Memory Aggregator Device Structure.\r
954///\r
955typedef struct {\r
956 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
957 UINT16 SocketIdentifier;\r
958 UINT16 Reserved;\r
959//EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];\r
960} EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
961\r
962///\r
963/// MemoryController Memory Aggregator Device Structure.\r
964///\r
965typedef struct {\r
966 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
967 UINT32 ReadLatency;\r
968 UINT32 WriteLatency;\r
969 UINT32 ReadBandwidth;\r
970 UINT32 WriteBandwidth;\r
971 UINT16 OptimalAccessUnit;\r
972 UINT16 OptimalAccessAlignment;\r
973 UINT16 Reserved;\r
974 UINT16 NumberOfProximityDomains;\r
975//UINT32 ProximityDomain[NumberOfProximityDomains];\r
976//EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];\r
977} EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
978\r
979///\r
980/// DIMM Memory Aggregator Device Structure.\r
981///\r
982typedef struct {\r
983 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
984 UINT16 PhysicalComponentIdentifier;\r
985 UINT16 Reserved;\r
986 UINT32 SizeOfDimm;\r
987 UINT32 SmbiosHandle;\r
988} EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
989\r
990///\r
991/// Boot Graphics Resource Table definition.\r
992///\r
993typedef struct {\r
994 EFI_ACPI_DESCRIPTION_HEADER Header;\r
995 ///\r
996 /// 2-bytes (16 bit) version ID. This value must be 1.\r
997 ///\r
998 UINT16 Version;\r
999 ///\r
1000 /// 1-byte status field indicating current status about the table.\r
1001 /// Bits[7:1] = Reserved (must be zero)\r
1002 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.\r
1003 ///\r
1004 UINT8 Status;\r
1005 ///\r
1006 /// 1-byte enumerated type field indicating format of the image.\r
1007 /// 0 = Bitmap\r
1008 /// 1 - 255 Reserved (for future use)\r
1009 ///\r
1010 UINT8 ImageType;\r
1011 ///\r
1012 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1013 /// of the image bitmap.\r
1014 ///\r
1015 UINT64 ImageAddress;\r
1016 ///\r
1017 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1018 /// (X, Y) display offset of the top left corner of the boot image.\r
1019 /// The top left corner of the display is at offset (0, 0).\r
1020 ///\r
1021 UINT32 ImageOffsetX;\r
1022 ///\r
1023 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1024 /// (X, Y) display offset of the top left corner of the boot image.\r
1025 /// The top left corner of the display is at offset (0, 0).\r
1026 ///\r
1027 UINT32 ImageOffsetY;\r
1028} EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1029\r
1030///\r
1031/// BGRT Revision\r
1032///\r
1033#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1034\r
1035///\r
1036/// BGRT Version\r
1037///\r
1038#define EFI_ACPI_5_1_BGRT_VERSION 0x01\r
1039\r
1040///\r
1041/// BGRT Status\r
1042///\r
1043#define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1044#define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01\r
1045\r
1046///\r
1047/// BGRT Image Type\r
1048///\r
1049#define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP 0x00\r
1050\r
1051///\r
1052/// FPDT Version (as defined in ACPI 5.1 spec.)\r
1053///\r
1054#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1055\r
1056///\r
1057/// FPDT Performance Record Types\r
1058///\r
1059#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1060#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1061\r
1062///\r
1063/// FPDT Performance Record Revision\r
1064///\r
1065#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1066#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1067\r
1068///\r
1069/// FPDT Runtime Performance Record Types\r
1070///\r
1071#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1072#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1073#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1074\r
1075///\r
1076/// FPDT Runtime Performance Record Revision\r
1077///\r
1078#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1079#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1080#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1081\r
1082///\r
1083/// FPDT Performance Record header\r
1084///\r
1085typedef struct {\r
1086 UINT16 Type;\r
1087 UINT8 Length;\r
1088 UINT8 Revision;\r
1089} EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER;\r
1090\r
1091///\r
1092/// FPDT Performance Table header\r
1093///\r
1094typedef struct {\r
1095 UINT32 Signature;\r
1096 UINT32 Length;\r
1097} EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER;\r
1098\r
1099///\r
1100/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1101///\r
1102typedef struct {\r
1103 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1104 UINT32 Reserved;\r
1105 ///\r
1106 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1107 ///\r
1108 UINT64 BootPerformanceTablePointer;\r
1109} EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1110\r
1111///\r
1112/// FPDT S3 Performance Table Pointer Record Structure\r
1113///\r
1114typedef struct {\r
1115 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1116 UINT32 Reserved;\r
1117 ///\r
1118 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1119 ///\r
1120 UINT64 S3PerformanceTablePointer;\r
1121} EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1122\r
1123///\r
1124/// FPDT Firmware Basic Boot Performance Record Structure\r
1125///\r
1126typedef struct {\r
1127 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1128 UINT32 Reserved;\r
1129 ///\r
1130 /// Timer value logged at the beginning of firmware image execution.\r
1131 /// This may not always be zero or near zero.\r
1132 ///\r
1133 UINT64 ResetEnd;\r
1134 ///\r
1135 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1136 /// For non-UEFI compatible boots, this field must be zero.\r
1137 ///\r
1138 UINT64 OsLoaderLoadImageStart;\r
1139 ///\r
1140 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1141 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1142 /// to the INT 19h handler invocation.\r
1143 ///\r
1144 UINT64 OsLoaderStartImageStart;\r
1145 ///\r
1146 /// Timer value logged at the point when the OS loader calls the\r
1147 /// ExitBootServices function for UEFI compatible firmware.\r
1148 /// For non-UEFI compatible boots, this field must be zero.\r
1149 ///\r
1150 UINT64 ExitBootServicesEntry;\r
1151 ///\r
1152 /// Timer value logged at the point just prior towhen the OS loader gaining\r
1153 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1154 /// For non-UEFI compatible boots, this field must be zero.\r
1155 ///\r
1156 UINT64 ExitBootServicesExit;\r
1157} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1158\r
1159///\r
1160/// FPDT Firmware Basic Boot Performance Table signature\r
1161///\r
1162#define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1163\r
1164//\r
1165// FPDT Firmware Basic Boot Performance Table\r
1166//\r
1167typedef struct {\r
1168 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1169 //\r
1170 // one or more Performance Records.\r
1171 //\r
1172} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1173\r
1174///\r
1175/// FPDT "S3PT" S3 Performance Table\r
1176///\r
1177#define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1178\r
1179//\r
1180// FPDT Firmware S3 Boot Performance Table\r
1181//\r
1182typedef struct {\r
1183 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1184 //\r
1185 // one or more Performance Records.\r
1186 //\r
1187} EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1188\r
1189///\r
1190/// FPDT Basic S3 Resume Performance Record\r
1191///\r
1192typedef struct {\r
1193 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1194 ///\r
1195 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1196 ///\r
1197 UINT32 ResumeCount;\r
1198 ///\r
1199 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1200 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1201 ///\r
1202 UINT64 FullResume;\r
1203 ///\r
1204 /// Average timer value of all resume cycles logged since the last full boot\r
1205 /// sequence, including the most recent resume. Note that the entire log of\r
1206 /// timer values does not need to be retained in order to calculate this average.\r
1207 ///\r
1208 UINT64 AverageResume;\r
1209} EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD;\r
1210\r
1211///\r
1212/// FPDT Basic S3 Suspend Performance Record\r
1213///\r
1214typedef struct {\r
1215 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1216 ///\r
1217 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1218 /// Only the most recent suspend cycle's timer value is retained.\r
1219 ///\r
1220 UINT64 SuspendStart;\r
1221 ///\r
1222 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1223 /// mechanism) used to trigger hardware entry to S3.\r
1224 /// Only the most recent suspend cycle's timer value is retained.\r
1225 ///\r
1226 UINT64 SuspendEnd;\r
1227} EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD;\r
1228\r
1229///\r
1230/// Firmware Performance Record Table definition.\r
1231///\r
1232typedef struct {\r
1233 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1234} EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1235\r
1236///\r
1237/// Generic Timer Description Table definition.\r
1238///\r
1239typedef struct {\r
1240 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1241 UINT64 CntControlBasePhysicalAddress;\r
1242 UINT32 Reserved;\r
1243 UINT32 SecurePL1TimerGSIV;\r
1244 UINT32 SecurePL1TimerFlags;\r
1245 UINT32 NonSecurePL1TimerGSIV;\r
1246 UINT32 NonSecurePL1TimerFlags;\r
1247 UINT32 VirtualTimerGSIV;\r
1248 UINT32 VirtualTimerFlags;\r
1249 UINT32 NonSecurePL2TimerGSIV;\r
1250 UINT32 NonSecurePL2TimerFlags;\r
1251 UINT64 CntReadBasePhysicalAddress;\r
1252 UINT32 PlatformTimerCount;\r
1253 UINT32 PlatformTimerOffset;\r
1254} EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1255\r
1256///\r
1257/// GTDT Version (as defined in ACPI 5.1 spec.)\r
1258///\r
1259#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01\r
1260\r
1261///\r
1262/// Timer Flags. All other bits are reserved and must be 0.\r
1263///\r
1264#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1265#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1266#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2\r
1267\r
1268///\r
1269/// Platform Timer Type\r
1270///\r
1271#define EFI_ACPI_5_1_GTDT_GT_BLOCK 0\r
1272#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1\r
1273\r
1274///\r
1275/// GT Block Structure\r
1276///\r
1277typedef struct {\r
1278 UINT8 Type;\r
1279 UINT16 Length;\r
1280 UINT8 Reserved;\r
1281 UINT64 CntCtlBase;\r
1282 UINT32 GTBlockTimerCount;\r
1283 UINT32 GTBlockTimerOffset;\r
1284} EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE;\r
1285\r
1286///\r
1287/// GT Block Timer Structure\r
1288///\r
1289typedef struct {\r
1290 UINT8 GTFrameNumber;\r
1291 UINT8 Reserved[3];\r
1292 UINT64 CntBaseX;\r
1293 UINT64 CntEL0BaseX;\r
1294 UINT32 GTxPhysicalTimerGSIV;\r
1295 UINT32 GTxPhysicalTimerFlags;\r
1296 UINT32 GTxVirtualTimerGSIV;\r
1297 UINT32 GTxVirtualTimerFlags;\r
1298 UINT32 GTxCommonFlags;\r
1299} EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE;\r
1300\r
1301///\r
1302/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.\r
1303///\r
1304#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1305#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1306\r
1307///\r
1308/// Common Flags Flags. All other bits are reserved and must be 0.\r
1309///\r
1310#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0\r
1311#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r
1312\r
1313///\r
1314/// SBSA Generic Watchdog Structure\r
1315///\r
1316typedef struct {\r
1317 UINT8 Type;\r
1318 UINT16 Length;\r
1319 UINT8 Reserved;\r
1320 UINT64 RefreshFramePhysicalAddress;\r
1321 UINT64 WatchdogControlFramePhysicalAddress;\r
1322 UINT32 WatchdogTimerGSIV;\r
1323 UINT32 WatchdogTimerFlags;\r
1324} EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;\r
1325\r
1326///\r
1327/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
1328///\r
1329#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1330#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1331#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
1332\r
1333///\r
1334/// Boot Error Record Table (BERT)\r
1335///\r
1336typedef struct {\r
1337 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1338 UINT32 BootErrorRegionLength;\r
1339 UINT64 BootErrorRegion;\r
1340} EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1341\r
1342///\r
1343/// BERT Version (as defined in ACPI 5.1 spec.)\r
1344///\r
1345#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1346\r
1347///\r
1348/// Boot Error Region Block Status Definition\r
1349///\r
1350typedef struct {\r
1351 UINT32 UncorrectableErrorValid:1;\r
1352 UINT32 CorrectableErrorValid:1;\r
1353 UINT32 MultipleUncorrectableErrors:1;\r
1354 UINT32 MultipleCorrectableErrors:1;\r
1355 UINT32 ErrorDataEntryCount:10;\r
1356 UINT32 Reserved:18;\r
1357} EFI_ACPI_5_1_ERROR_BLOCK_STATUS;\r
1358\r
1359///\r
1360/// Boot Error Region Definition\r
1361///\r
1362typedef struct {\r
1363 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;\r
1364 UINT32 RawDataOffset;\r
1365 UINT32 RawDataLength;\r
1366 UINT32 DataLength;\r
1367 UINT32 ErrorSeverity;\r
1368} EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE;\r
1369\r
1370//\r
1371// Boot Error Severity types\r
1372//\r
1373#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00\r
1374#define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01\r
1375#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02\r
1376#define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03\r
1377\r
1378///\r
1379/// Generic Error Data Entry Definition\r
1380///\r
1381typedef struct {\r
1382 UINT8 SectionType[16];\r
1383 UINT32 ErrorSeverity;\r
1384 UINT16 Revision;\r
1385 UINT8 ValidationBits;\r
1386 UINT8 Flags;\r
1387 UINT32 ErrorDataLength;\r
1388 UINT8 FruId[16];\r
1389 UINT8 FruText[20];\r
1390} EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1391\r
1392///\r
1393/// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.)\r
1394///\r
1395#define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201\r
1396\r
1397///\r
1398/// HEST - Hardware Error Source Table\r
1399///\r
1400typedef struct {\r
1401 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1402 UINT32 ErrorSourceCount;\r
1403} EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1404\r
1405///\r
1406/// HEST Version (as defined in ACPI 5.1 spec.)\r
1407///\r
1408#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1409\r
1410//\r
1411// Error Source structure types.\r
1412//\r
1413#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1414#define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1415#define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1416#define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1417#define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER 0x07\r
1418#define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER 0x08\r
1419#define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR 0x09\r
1420\r
1421//\r
1422// Error Source structure flags.\r
1423//\r
1424#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1425#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1426\r
1427///\r
1428/// IA-32 Architecture Machine Check Exception Structure Definition\r
1429///\r
1430typedef struct {\r
1431 UINT16 Type;\r
1432 UINT16 SourceId;\r
1433 UINT8 Reserved0[2];\r
1434 UINT8 Flags;\r
1435 UINT8 Enabled;\r
1436 UINT32 NumberOfRecordsToPreAllocate;\r
1437 UINT32 MaxSectionsPerRecord;\r
1438 UINT64 GlobalCapabilityInitData;\r
1439 UINT64 GlobalControlInitData;\r
1440 UINT8 NumberOfHardwareBanks;\r
1441 UINT8 Reserved1[7];\r
1442} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1443\r
1444///\r
1445/// IA-32 Architecture Machine Check Bank Structure Definition\r
1446///\r
1447typedef struct {\r
1448 UINT8 BankNumber;\r
1449 UINT8 ClearStatusOnInitialization;\r
1450 UINT8 StatusDataFormat;\r
1451 UINT8 Reserved0;\r
1452 UINT32 ControlRegisterMsrAddress;\r
1453 UINT64 ControlInitData;\r
1454 UINT32 StatusRegisterMsrAddress;\r
1455 UINT32 AddressRegisterMsrAddress;\r
1456 UINT32 MiscRegisterMsrAddress;\r
1457} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1458\r
1459///\r
1460/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1461///\r
1462#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1463#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1464#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1465\r
1466//\r
1467// Hardware Error Notification types. All other values are reserved\r
1468//\r
1469#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1470#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1471#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1472#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1473#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1474\r
1475///\r
1476/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1477///\r
1478typedef struct {\r
1479 UINT16 Type:1;\r
1480 UINT16 PollInterval:1;\r
1481 UINT16 SwitchToPollingThresholdValue:1;\r
1482 UINT16 SwitchToPollingThresholdWindow:1;\r
1483 UINT16 ErrorThresholdValue:1;\r
1484 UINT16 ErrorThresholdWindow:1;\r
1485 UINT16 Reserved:10;\r
1486} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1487\r
1488///\r
1489/// Hardware Error Notification Structure Definition\r
1490///\r
1491typedef struct {\r
1492 UINT8 Type;\r
1493 UINT8 Length;\r
1494 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1495 UINT32 PollInterval;\r
1496 UINT32 Vector;\r
1497 UINT32 SwitchToPollingThresholdValue;\r
1498 UINT32 SwitchToPollingThresholdWindow;\r
1499 UINT32 ErrorThresholdValue;\r
1500 UINT32 ErrorThresholdWindow;\r
1501} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1502\r
1503///\r
1504/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1505///\r
1506typedef struct {\r
1507 UINT16 Type;\r
1508 UINT16 SourceId;\r
1509 UINT8 Reserved0[2];\r
1510 UINT8 Flags;\r
1511 UINT8 Enabled;\r
1512 UINT32 NumberOfRecordsToPreAllocate;\r
1513 UINT32 MaxSectionsPerRecord;\r
1514 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1515 UINT8 NumberOfHardwareBanks;\r
1516 UINT8 Reserved1[3];\r
1517} EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1518\r
1519///\r
1520/// IA-32 Architecture NMI Error Structure Definition\r
1521///\r
1522typedef struct {\r
1523 UINT16 Type;\r
1524 UINT16 SourceId;\r
1525 UINT8 Reserved0[2];\r
1526 UINT32 NumberOfRecordsToPreAllocate;\r
1527 UINT32 MaxSectionsPerRecord;\r
1528 UINT32 MaxRawDataLength;\r
1529} EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1530\r
1531///\r
1532/// PCI Express Root Port AER Structure Definition\r
1533///\r
1534typedef struct {\r
1535 UINT16 Type;\r
1536 UINT16 SourceId;\r
1537 UINT8 Reserved0[2];\r
1538 UINT8 Flags;\r
1539 UINT8 Enabled;\r
1540 UINT32 NumberOfRecordsToPreAllocate;\r
1541 UINT32 MaxSectionsPerRecord;\r
1542 UINT32 Bus;\r
1543 UINT16 Device;\r
1544 UINT16 Function;\r
1545 UINT16 DeviceControl;\r
1546 UINT8 Reserved1[2];\r
1547 UINT32 UncorrectableErrorMask;\r
1548 UINT32 UncorrectableErrorSeverity;\r
1549 UINT32 CorrectableErrorMask;\r
1550 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1551 UINT32 RootErrorCommand;\r
1552} EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1553\r
1554///\r
1555/// PCI Express Device AER Structure Definition\r
1556///\r
1557typedef struct {\r
1558 UINT16 Type;\r
1559 UINT16 SourceId;\r
1560 UINT8 Reserved0[2];\r
1561 UINT8 Flags;\r
1562 UINT8 Enabled;\r
1563 UINT32 NumberOfRecordsToPreAllocate;\r
1564 UINT32 MaxSectionsPerRecord;\r
1565 UINT32 Bus;\r
1566 UINT16 Device;\r
1567 UINT16 Function;\r
1568 UINT16 DeviceControl;\r
1569 UINT8 Reserved1[2];\r
1570 UINT32 UncorrectableErrorMask;\r
1571 UINT32 UncorrectableErrorSeverity;\r
1572 UINT32 CorrectableErrorMask;\r
1573 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1574} EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1575\r
1576///\r
1577/// PCI Express Bridge AER Structure Definition\r
1578///\r
1579typedef struct {\r
1580 UINT16 Type;\r
1581 UINT16 SourceId;\r
1582 UINT8 Reserved0[2];\r
1583 UINT8 Flags;\r
1584 UINT8 Enabled;\r
1585 UINT32 NumberOfRecordsToPreAllocate;\r
1586 UINT32 MaxSectionsPerRecord;\r
1587 UINT32 Bus;\r
1588 UINT16 Device;\r
1589 UINT16 Function;\r
1590 UINT16 DeviceControl;\r
1591 UINT8 Reserved1[2];\r
1592 UINT32 UncorrectableErrorMask;\r
1593 UINT32 UncorrectableErrorSeverity;\r
1594 UINT32 CorrectableErrorMask;\r
1595 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1596 UINT32 SecondaryUncorrectableErrorMask;\r
1597 UINT32 SecondaryUncorrectableErrorSeverity;\r
1598 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
1599} EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
1600\r
1601///\r
1602/// Generic Hardware Error Source Structure Definition\r
1603///\r
1604typedef struct {\r
1605 UINT16 Type;\r
1606 UINT16 SourceId;\r
1607 UINT16 RelatedSourceId;\r
1608 UINT8 Flags;\r
1609 UINT8 Enabled;\r
1610 UINT32 NumberOfRecordsToPreAllocate;\r
1611 UINT32 MaxSectionsPerRecord;\r
1612 UINT32 MaxRawDataLength;\r
1613 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1614 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1615 UINT32 ErrorStatusBlockLength;\r
1616} EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
1617\r
1618///\r
1619/// Generic Error Status Definition\r
1620///\r
1621typedef struct {\r
1622 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;\r
1623 UINT32 RawDataOffset;\r
1624 UINT32 RawDataLength;\r
1625 UINT32 DataLength;\r
1626 UINT32 ErrorSeverity;\r
1627} EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE;\r
1628\r
1629///\r
1630/// ERST - Error Record Serialization Table\r
1631///\r
1632typedef struct {\r
1633 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1634 UINT32 SerializationHeaderSize;\r
1635 UINT8 Reserved0[4];\r
1636 UINT32 InstructionEntryCount;\r
1637} EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
1638\r
1639///\r
1640/// ERST Version (as defined in ACPI 5.1 spec.)\r
1641///\r
1642#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
1643\r
1644///\r
1645/// ERST Serialization Actions\r
1646///\r
1647#define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00\r
1648#define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01\r
1649#define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02\r
1650#define EFI_ACPI_5_1_ERST_END_OPERATION 0x03\r
1651#define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04\r
1652#define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05\r
1653#define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06\r
1654#define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07\r
1655#define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08\r
1656#define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09\r
1657#define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A\r
1658#define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
1659#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
1660#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
1661#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
1662\r
1663///\r
1664/// ERST Action Command Status\r
1665///\r
1666#define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00\r
1667#define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
1668#define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
1669#define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03\r
1670#define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
1671#define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
1672\r
1673///\r
1674/// ERST Serialization Instructions\r
1675///\r
1676#define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00\r
1677#define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01\r
1678#define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02\r
1679#define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03\r
1680#define EFI_ACPI_5_1_ERST_NOOP 0x04\r
1681#define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05\r
1682#define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06\r
1683#define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07\r
1684#define EFI_ACPI_5_1_ERST_ADD 0x08\r
1685#define EFI_ACPI_5_1_ERST_SUBTRACT 0x09\r
1686#define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A\r
1687#define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B\r
1688#define EFI_ACPI_5_1_ERST_STALL 0x0C\r
1689#define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D\r
1690#define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
1691#define EFI_ACPI_5_1_ERST_GOTO 0x0F\r
1692#define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10\r
1693#define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11\r
1694#define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12\r
1695\r
1696///\r
1697/// ERST Instruction Flags\r
1698///\r
1699#define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01\r
1700\r
1701///\r
1702/// ERST Serialization Instruction Entry\r
1703///\r
1704typedef struct {\r
1705 UINT8 SerializationAction;\r
1706 UINT8 Instruction;\r
1707 UINT8 Flags;\r
1708 UINT8 Reserved0;\r
1709 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1710 UINT64 Value;\r
1711 UINT64 Mask;\r
1712} EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
1713\r
1714///\r
1715/// EINJ - Error Injection Table\r
1716///\r
1717typedef struct {\r
1718 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1719 UINT32 InjectionHeaderSize;\r
1720 UINT8 InjectionFlags;\r
1721 UINT8 Reserved0[3];\r
1722 UINT32 InjectionEntryCount;\r
1723} EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER;\r
1724\r
1725///\r
1726/// EINJ Version (as defined in ACPI 5.1 spec.)\r
1727///\r
1728#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01\r
1729\r
1730///\r
1731/// EINJ Error Injection Actions\r
1732///\r
1733#define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
1734#define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
1735#define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02\r
1736#define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03\r
1737#define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04\r
1738#define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05\r
1739#define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06\r
1740#define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07\r
1741#define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF\r
1742\r
1743///\r
1744/// EINJ Action Command Status\r
1745///\r
1746#define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00\r
1747#define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
1748#define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02\r
1749\r
1750///\r
1751/// EINJ Error Type Definition\r
1752///\r
1753#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
1754#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
1755#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
1756#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
1757#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
1758#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
1759#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
1760#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
1761#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
1762#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
1763#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
1764#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
1765\r
1766///\r
1767/// EINJ Injection Instructions\r
1768///\r
1769#define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00\r
1770#define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01\r
1771#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02\r
1772#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03\r
1773#define EFI_ACPI_5_1_EINJ_NOOP 0x04\r
1774\r
1775///\r
1776/// EINJ Instruction Flags\r
1777///\r
1778#define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01\r
1779\r
1780///\r
1781/// EINJ Injection Instruction Entry\r
1782///\r
1783typedef struct {\r
1784 UINT8 InjectionAction;\r
1785 UINT8 Instruction;\r
1786 UINT8 Flags;\r
1787 UINT8 Reserved0;\r
1788 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1789 UINT64 Value;\r
1790 UINT64 Mask;\r
1791} EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
1792\r
1793///\r
1794/// EINJ Trigger Action Table\r
1795///\r
1796typedef struct {\r
1797 UINT32 HeaderSize;\r
1798 UINT32 Revision;\r
1799 UINT32 TableSize;\r
1800 UINT32 EntryCount;\r
1801} EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE;\r
1802\r
1803///\r
1804/// Platform Communications Channel Table (PCCT)\r
1805///\r
1806typedef struct {\r
1807 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1808 UINT32 Flags;\r
1809 UINT64 Reserved;\r
1810} EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
1811\r
1812///\r
1813/// PCCT Version (as defined in ACPI 5.1 spec.)\r
1814///\r
1815#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01\r
1816\r
1817///\r
1818/// PCCT Global Flags\r
1819///\r
1820#define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0\r
1821\r
1822//\r
1823// PCCT Subspace type\r
1824//\r
1825#define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
1826\r
1827///\r
1828/// PCC Subspace Structure Header\r
1829///\r
1830typedef struct {\r
1831 UINT8 Type;\r
1832 UINT8 Length;\r
1833} EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER;\r
1834\r
1835///\r
1836/// Generic Communications Subspace Structure\r
1837///\r
1838typedef struct {\r
1839 UINT8 Type;\r
1840 UINT8 Length;\r
1841 UINT8 Reserved[6];\r
1842 UINT64 BaseAddress;\r
1843 UINT64 AddressLength;\r
1844 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
1845 UINT64 DoorbellPreserve;\r
1846 UINT64 DoorbellWrite;\r
1847 UINT32 NominalLatency;\r
1848 UINT32 MaximumPeriodicAccessRate;\r
1849 UINT16 MinimumRequestTurnaroundTime;\r
1850} EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC;\r
1851\r
1852///\r
1853/// Generic Communications Channel Shared Memory Region\r
1854///\r
1855\r
1856typedef struct {\r
1857 UINT8 Command;\r
1858 UINT8 Reserved:7;\r
1859 UINT8 GenerateSci:1;\r
1860} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
1861\r
1862typedef struct {\r
1863 UINT8 CommandComplete:1;\r
1864 UINT8 SciDoorbell:1;\r
1865 UINT8 Error:1;\r
1866 UINT8 Reserved:5;\r
1867 UINT8 Reserved1;\r
1868} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
1869\r
1870typedef struct {\r
1871 UINT32 Signature;\r
1872 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
1873 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
1874} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
1875\r
1876//\r
1877// Known table signatures\r
1878//\r
1879\r
1880///\r
1881/// "RSD PTR " Root System Description Pointer\r
1882///\r
1883#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') \r
1884\r
1885///\r
1886/// "APIC" Multiple APIC Description Table\r
1887///\r
1888#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
1889\r
1890///\r
1891/// "BERT" Boot Error Record Table\r
1892///\r
1893#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
1894\r
1895///\r
1896/// "BGRT" Boot Graphics Resource Table\r
1897///\r
1898#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
1899\r
1900///\r
1901/// "CPEP" Corrected Platform Error Polling Table\r
1902///\r
1903#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
1904\r
1905///\r
1906/// "DSDT" Differentiated System Description Table\r
1907///\r
1908#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
1909\r
1910///\r
1911/// "ECDT" Embedded Controller Boot Resources Table\r
1912///\r
1913#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
1914\r
1915///\r
1916/// "EINJ" Error Injection Table\r
1917///\r
1918#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
1919\r
1920///\r
1921/// "ERST" Error Record Serialization Table\r
1922///\r
1923#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
1924\r
1925///\r
1926/// "FACP" Fixed ACPI Description Table\r
1927///\r
1928#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
1929\r
1930///\r
1931/// "FACS" Firmware ACPI Control Structure\r
1932///\r
1933#define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
1934\r
1935///\r
1936/// "FPDT" Firmware Performance Data Table\r
1937///\r
1938#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
1939\r
1940///\r
1941/// "GTDT" Generic Timer Description Table\r
1942///\r
1943#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
1944\r
1945///\r
1946/// "HEST" Hardware Error Source Table\r
1947///\r
1948#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
1949\r
1950///\r
1951/// "MPST" Memory Power State Table\r
1952///\r
1953#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
1954\r
1955///\r
1956/// "MSCT" Maximum System Characteristics Table\r
1957///\r
1958#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
1959\r
1960///\r
1961/// "PMTT" Platform Memory Topology Table\r
1962///\r
1963#define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
1964\r
1965///\r
1966/// "PSDT" Persistent System Description Table\r
1967///\r
1968#define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
1969\r
1970///\r
1971/// "RASF" ACPI RAS Feature Table\r
1972///\r
1973#define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
1974\r
1975///\r
1976/// "RSDT" Root System Description Table\r
1977///\r
1978#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
1979\r
1980///\r
1981/// "SBST" Smart Battery Specification Table\r
1982///\r
1983#define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
1984\r
1985///\r
1986/// "SLIT" System Locality Information Table\r
1987///\r
1988#define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
1989\r
1990///\r
1991/// "SRAT" System Resource Affinity Table\r
1992///\r
1993#define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
1994\r
1995///\r
1996/// "SSDT" Secondary System Description Table\r
1997///\r
1998#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
1999\r
2000///\r
2001/// "XSDT" Extended System Description Table\r
2002///\r
2003#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
2004\r
2005///\r
2006/// "BOOT" MS Simple Boot Spec\r
2007///\r
2008#define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
2009\r
2010///\r
2011/// "CSRT" MS Core System Resource Table\r
2012///\r
2013#define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2014\r
2015///\r
2016/// "DBG2" MS Debug Port 2 Spec\r
2017///\r
2018#define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
2019\r
2020///\r
2021/// "DBGP" MS Debug Port Spec\r
2022///\r
2023#define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
2024\r
2025///\r
2026/// "DMAR" DMA Remapping Table\r
2027///\r
2028#define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
2029\r
2030///\r
2031/// "DRTM" Dynamic Root of Trust for Measurement Table\r
2032///\r
2033#define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
2034\r
2035///\r
2036/// "ETDT" Event Timer Description Table\r
2037///\r
2038#define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
2039\r
2040///\r
2041/// "HPET" IA-PC High Precision Event Timer Table\r
2042///\r
2043#define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
2044\r
2045///\r
2046/// "iBFT" iSCSI Boot Firmware Table\r
2047///\r
2048#define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
2049\r
2050///\r
2051/// "IVRS" I/O Virtualization Reporting Structure\r
2052///\r
2053#define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
2054\r
2055///\r
2056/// "LPIT" Low Power Idle Table\r
2057///\r
2058#define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')\r
2059\r
2060///\r
2061/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
2062///\r
2063#define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
2064\r
2065///\r
2066/// "MCHI" Management Controller Host Interface Table\r
2067///\r
2068#define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
2069\r
2070///\r
2071/// "MSDM" MS Data Management Table\r
2072///\r
2073#define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
2074\r
2075///\r
2076/// "SLIC" MS Software Licensing Table Specification\r
2077///\r
2078#define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
2079\r
2080///\r
2081/// "SPCR" Serial Port Concole Redirection Table\r
2082///\r
2083#define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
2084\r
2085///\r
2086/// "SPMI" Server Platform Management Interface Table\r
2087///\r
2088#define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
2089\r
2090///\r
2091/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
2092///\r
2093#define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
2094\r
2095///\r
2096/// "TPM2" Trusted Computing Platform 1 Table\r
2097///\r
2098#define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
2099\r
2100///\r
2101/// "UEFI" UEFI ACPI Data Table\r
2102///\r
2103#define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
2104\r
2105///\r
2106/// "WAET" Windows ACPI Emulated Devices Table\r
2107///\r
2108#define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
2109\r
2110///\r
2111/// "WDAT" Watchdog Action Table\r
2112///\r
2113#define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
2114\r
2115///\r
2116/// "WDRT" Watchdog Resource Table\r
2117///\r
2118#define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
2119\r
2120///\r
2121/// "WPBT" MS Platform Binary Table\r
2122///\r
2123#define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
2124\r
2125#pragma pack()\r
2126\r
2127#endif\r
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