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MdePkg: Add definitions for ACPI 6.2
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1/** @file\r
2 ACPI 6.2 definitions from the ACPI Specification Revision 6.2 May, 2017.\r
3\r
4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12**/\r
13\r
14#ifndef _ACPI_6_2_H_\r
15#define _ACPI_6_2_H_\r
16\r
17#include <IndustryStandard/Acpi61.h>\r
18\r
19//\r
20// Large Item Descriptor Name\r
21//\r
22#define ACPI_LARGE_PIN_FUNCTION_DESCRIPTOR_NAME 0x0D\r
23#define ACPI_LARGE_PIN_CONFIGURATION_DESCRIPTOR_NAME 0x0F\r
24#define ACPI_LARGE_PIN_GROUP_DESCRIPTOR_NAME 0x10\r
25#define ACPI_LARGE_PIN_GROUP_FUNCTION_DESCRIPTOR_NAME 0x11\r
26#define ACPI_LARGE_PIN_GROUP_CONFIGURATION_DESCRIPTOR_NAME 0x12\r
27\r
28//\r
29// Large Item Descriptor Value\r
30//\r
31#define ACPI_PIN_FUNCTION_DESCRIPTOR 0x8D\r
32#define ACPI_PIN_CONFIGURATION_DESCRIPTOR 0x8F\r
33#define ACPI_PIN_GROUP_DESCRIPTOR 0x90\r
34#define ACPI_PIN_GROUP_FUNCTION_DESCRIPTOR 0x91\r
35#define ACPI_PIN_GROUP_CONFIGURATION_DESCRIPTOR 0x92\r
36\r
37#pragma pack(1)\r
38\r
39///\r
40/// Pin Function Descriptor\r
41///\r
42typedef PACKED struct {\r
43 ACPI_LARGE_RESOURCE_HEADER Header;\r
44 UINT8 RevisionId;\r
45 UINT16 Flags;\r
46 UINT8 PinPullConfiguration;\r
47 UINT16 FunctionNumber;\r
48 UINT16 PinTableOffset;\r
49 UINT8 ResourceSourceIndex;\r
50 UINT16 ResourceSourceNameOffset;\r
51 UINT16 VendorDataOffset;\r
52 UINT16 VendorDataLength;\r
53} EFI_ACPI_PIN_FUNCTION_DESCRIPTOR;\r
54\r
55///\r
56/// Pin Configuration Descriptor\r
57///\r
58typedef PACKED struct {\r
59 ACPI_LARGE_RESOURCE_HEADER Header;\r
60 UINT8 RevisionId;\r
61 UINT16 Flags;\r
62 UINT8 PinConfigurationType;\r
63 UINT32 PinConfigurationValue;\r
64 UINT16 PinTableOffset;\r
65 UINT8 ResourceSourceIndex;\r
66 UINT16 ResourceSourceNameOffset;\r
67 UINT16 VendorDataOffset;\r
68 UINT16 VendorDataLength;\r
69} EFI_ACPI_PIN_CONFIGURATION_DESCRIPTOR;\r
70\r
71///\r
72/// Pin Group Descriptor\r
73///\r
74typedef PACKED struct {\r
75 ACPI_LARGE_RESOURCE_HEADER Header;\r
76 UINT8 RevisionId;\r
77 UINT16 Flags;\r
78 UINT16 PinTableOffset;\r
79 UINT16 ResourceLabelOffset;\r
80 UINT16 VendorDataOffset;\r
81 UINT16 VendorDataLength;\r
82} EFI_ACPI_PIN_GROUP_DESCRIPTOR;\r
83\r
84///\r
85/// Pin Group Function Descriptor\r
86///\r
87typedef PACKED struct {\r
88 ACPI_LARGE_RESOURCE_HEADER Header;\r
89 UINT8 RevisionId;\r
90 UINT16 Flags;\r
91 UINT16 FunctionNumber;\r
92 UINT8 ResourceSourceIndex;\r
93 UINT16 ResourceSourceNameOffset;\r
94 UINT16 ResourceSourceLabelOffset;\r
95 UINT16 VendorDataOffset;\r
96 UINT16 VendorDataLength;\r
97} EFI_ACPI_PIN_GROUP_FUNCTION_DESCRIPTOR;\r
98\r
99///\r
100/// Pin Group Configuration Descriptor\r
101///\r
102typedef PACKED struct {\r
103 ACPI_LARGE_RESOURCE_HEADER Header;\r
104 UINT8 RevisionId;\r
105 UINT16 Flags;\r
106 UINT8 PinConfigurationType;\r
107 UINT32 PinConfigurationValue;\r
108 UINT8 ResourceSourceIndex;\r
109 UINT16 ResourceSourceNameOffset;\r
110 UINT16 ResourceSourceLabelOffset;\r
111 UINT16 VendorDataOffset;\r
112 UINT16 VendorDataLength;\r
113} EFI_ACPI_PIN_GROUP_CONFIGURATION_DESCRIPTOR;\r
114\r
115#pragma pack()\r
116\r
117//\r
118// Ensure proper structure formats\r
119//\r
120#pragma pack(1)\r
121\r
122///\r
123/// ACPI 6.2 Generic Address Space definition\r
124///\r
125typedef struct {\r
126 UINT8 AddressSpaceId;\r
127 UINT8 RegisterBitWidth;\r
128 UINT8 RegisterBitOffset;\r
129 UINT8 AccessSize;\r
130 UINT64 Address;\r
131} EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE;\r
132\r
133//\r
134// Generic Address Space Address IDs\r
135//\r
136#define EFI_ACPI_6_2_SYSTEM_MEMORY 0\r
137#define EFI_ACPI_6_2_SYSTEM_IO 1\r
138#define EFI_ACPI_6_2_PCI_CONFIGURATION_SPACE 2\r
139#define EFI_ACPI_6_2_EMBEDDED_CONTROLLER 3\r
140#define EFI_ACPI_6_2_SMBUS 4\r
141#define EFI_ACPI_6_2_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
142#define EFI_ACPI_6_2_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
143\r
144//\r
145// Generic Address Space Access Sizes\r
146//\r
147#define EFI_ACPI_6_2_UNDEFINED 0\r
148#define EFI_ACPI_6_2_BYTE 1\r
149#define EFI_ACPI_6_2_WORD 2\r
150#define EFI_ACPI_6_2_DWORD 3\r
151#define EFI_ACPI_6_2_QWORD 4\r
152\r
153//\r
154// ACPI 6.2 table structures\r
155//\r
156\r
157///\r
158/// Root System Description Pointer Structure\r
159///\r
160typedef struct {\r
161 UINT64 Signature;\r
162 UINT8 Checksum;\r
163 UINT8 OemId[6];\r
164 UINT8 Revision;\r
165 UINT32 RsdtAddress;\r
166 UINT32 Length;\r
167 UINT64 XsdtAddress;\r
168 UINT8 ExtendedChecksum;\r
169 UINT8 Reserved[3];\r
170} EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
171\r
172///\r
173/// RSD_PTR Revision (as defined in ACPI 6.2 spec.)\r
174///\r
175#define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.2) says current value is 2\r
176\r
177///\r
178/// Common table header, this prefaces all ACPI tables, including FACS, but\r
179/// excluding the RSD PTR structure\r
180///\r
181typedef struct {\r
182 UINT32 Signature;\r
183 UINT32 Length;\r
184} EFI_ACPI_6_2_COMMON_HEADER;\r
185\r
186//\r
187// Root System Description Table\r
188// No definition needed as it is a common description table header, the same with\r
189// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
190//\r
191\r
192///\r
193/// RSDT Revision (as defined in ACPI 6.2 spec.)\r
194///\r
195#define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
196\r
197//\r
198// Extended System Description Table\r
199// No definition needed as it is a common description table header, the same with\r
200// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
201//\r
202\r
203///\r
204/// XSDT Revision (as defined in ACPI 6.2 spec.)\r
205///\r
206#define EFI_ACPI_6_2_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
207\r
208///\r
209/// Fixed ACPI Description Table Structure (FADT)\r
210///\r
211typedef struct {\r
212 EFI_ACPI_DESCRIPTION_HEADER Header;\r
213 UINT32 FirmwareCtrl;\r
214 UINT32 Dsdt;\r
215 UINT8 Reserved0;\r
216 UINT8 PreferredPmProfile;\r
217 UINT16 SciInt;\r
218 UINT32 SmiCmd;\r
219 UINT8 AcpiEnable;\r
220 UINT8 AcpiDisable;\r
221 UINT8 S4BiosReq;\r
222 UINT8 PstateCnt;\r
223 UINT32 Pm1aEvtBlk;\r
224 UINT32 Pm1bEvtBlk;\r
225 UINT32 Pm1aCntBlk;\r
226 UINT32 Pm1bCntBlk;\r
227 UINT32 Pm2CntBlk;\r
228 UINT32 PmTmrBlk;\r
229 UINT32 Gpe0Blk;\r
230 UINT32 Gpe1Blk;\r
231 UINT8 Pm1EvtLen;\r
232 UINT8 Pm1CntLen;\r
233 UINT8 Pm2CntLen;\r
234 UINT8 PmTmrLen;\r
235 UINT8 Gpe0BlkLen;\r
236 UINT8 Gpe1BlkLen;\r
237 UINT8 Gpe1Base;\r
238 UINT8 CstCnt;\r
239 UINT16 PLvl2Lat;\r
240 UINT16 PLvl3Lat;\r
241 UINT16 FlushSize;\r
242 UINT16 FlushStride;\r
243 UINT8 DutyOffset;\r
244 UINT8 DutyWidth;\r
245 UINT8 DayAlrm;\r
246 UINT8 MonAlrm;\r
247 UINT8 Century;\r
248 UINT16 IaPcBootArch;\r
249 UINT8 Reserved1;\r
250 UINT32 Flags;\r
251 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
252 UINT8 ResetValue;\r
253 UINT16 ArmBootArch;\r
254 UINT8 MinorVersion;\r
255 UINT64 XFirmwareCtrl;\r
256 UINT64 XDsdt;\r
257 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
258 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
259 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
260 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
261 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
262 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
263 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
264 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
265 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
266 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
267 UINT64 HypervisorVendorIdentity;\r
268} EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE;\r
269\r
270///\r
271/// FADT Version (as defined in ACPI 6.2 spec.)\r
272///\r
273#define EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06\r
274#define EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x02\r
275\r
276//\r
277// Fixed ACPI Description Table Preferred Power Management Profile\r
278//\r
279#define EFI_ACPI_6_2_PM_PROFILE_UNSPECIFIED 0\r
280#define EFI_ACPI_6_2_PM_PROFILE_DESKTOP 1\r
281#define EFI_ACPI_6_2_PM_PROFILE_MOBILE 2\r
282#define EFI_ACPI_6_2_PM_PROFILE_WORKSTATION 3\r
283#define EFI_ACPI_6_2_PM_PROFILE_ENTERPRISE_SERVER 4\r
284#define EFI_ACPI_6_2_PM_PROFILE_SOHO_SERVER 5\r
285#define EFI_ACPI_6_2_PM_PROFILE_APPLIANCE_PC 6\r
286#define EFI_ACPI_6_2_PM_PROFILE_PERFORMANCE_SERVER 7\r
287#define EFI_ACPI_6_2_PM_PROFILE_TABLET 8\r
288\r
289//\r
290// Fixed ACPI Description Table Boot Architecture Flags\r
291// All other bits are reserved and must be set to 0.\r
292//\r
293#define EFI_ACPI_6_2_LEGACY_DEVICES BIT0\r
294#define EFI_ACPI_6_2_8042 BIT1\r
295#define EFI_ACPI_6_2_VGA_NOT_PRESENT BIT2\r
296#define EFI_ACPI_6_2_MSI_NOT_SUPPORTED BIT3\r
297#define EFI_ACPI_6_2_PCIE_ASPM_CONTROLS BIT4\r
298#define EFI_ACPI_6_2_CMOS_RTC_NOT_PRESENT BIT5\r
299\r
300//\r
301// Fixed ACPI Description Table Arm Boot Architecture Flags\r
302// All other bits are reserved and must be set to 0.\r
303//\r
304#define EFI_ACPI_6_2_ARM_PSCI_COMPLIANT BIT0\r
305#define EFI_ACPI_6_2_ARM_PSCI_USE_HVC BIT1\r
306\r
307//\r
308// Fixed ACPI Description Table Fixed Feature Flags\r
309// All other bits are reserved and must be set to 0.\r
310//\r
311#define EFI_ACPI_6_2_WBINVD BIT0\r
312#define EFI_ACPI_6_2_WBINVD_FLUSH BIT1\r
313#define EFI_ACPI_6_2_PROC_C1 BIT2\r
314#define EFI_ACPI_6_2_P_LVL2_UP BIT3\r
315#define EFI_ACPI_6_2_PWR_BUTTON BIT4\r
316#define EFI_ACPI_6_2_SLP_BUTTON BIT5\r
317#define EFI_ACPI_6_2_FIX_RTC BIT6\r
318#define EFI_ACPI_6_2_RTC_S4 BIT7\r
319#define EFI_ACPI_6_2_TMR_VAL_EXT BIT8\r
320#define EFI_ACPI_6_2_DCK_CAP BIT9\r
321#define EFI_ACPI_6_2_RESET_REG_SUP BIT10\r
322#define EFI_ACPI_6_2_SEALED_CASE BIT11\r
323#define EFI_ACPI_6_2_HEADLESS BIT12\r
324#define EFI_ACPI_6_2_CPU_SW_SLP BIT13\r
325#define EFI_ACPI_6_2_PCI_EXP_WAK BIT14\r
326#define EFI_ACPI_6_2_USE_PLATFORM_CLOCK BIT15\r
327#define EFI_ACPI_6_2_S4_RTC_STS_VALID BIT16\r
328#define EFI_ACPI_6_2_REMOTE_POWER_ON_CAPABLE BIT17\r
329#define EFI_ACPI_6_2_FORCE_APIC_CLUSTER_MODEL BIT18\r
330#define EFI_ACPI_6_2_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
331#define EFI_ACPI_6_2_HW_REDUCED_ACPI BIT20\r
332#define EFI_ACPI_6_2_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
333\r
334///\r
335/// Firmware ACPI Control Structure\r
336///\r
337typedef struct {\r
338 UINT32 Signature;\r
339 UINT32 Length;\r
340 UINT32 HardwareSignature;\r
341 UINT32 FirmwareWakingVector;\r
342 UINT32 GlobalLock;\r
343 UINT32 Flags;\r
344 UINT64 XFirmwareWakingVector;\r
345 UINT8 Version;\r
346 UINT8 Reserved0[3];\r
347 UINT32 OspmFlags;\r
348 UINT8 Reserved1[24];\r
349} EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
350\r
351///\r
352/// FACS Version (as defined in ACPI 6.2 spec.)\r
353///\r
354#define EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
355\r
356///\r
357/// Firmware Control Structure Feature Flags\r
358/// All other bits are reserved and must be set to 0.\r
359///\r
360#define EFI_ACPI_6_2_S4BIOS_F BIT0\r
361#define EFI_ACPI_6_2_64BIT_WAKE_SUPPORTED_F BIT1\r
362\r
363///\r
364/// OSPM Enabled Firmware Control Structure Flags\r
365/// All other bits are reserved and must be set to 0.\r
366///\r
367#define EFI_ACPI_6_2_OSPM_64BIT_WAKE_F BIT0\r
368\r
369//\r
370// Differentiated System Description Table,\r
371// Secondary System Description Table\r
372// and Persistent System Description Table,\r
373// no definition needed as they are common description table header, the same with\r
374// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
375//\r
376#define EFI_ACPI_6_2_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
377#define EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
378\r
379///\r
380/// Multiple APIC Description Table header definition. The rest of the table\r
381/// must be defined in a platform specific manner.\r
382///\r
383typedef struct {\r
384 EFI_ACPI_DESCRIPTION_HEADER Header;\r
385 UINT32 LocalApicAddress;\r
386 UINT32 Flags;\r
387} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
388\r
389///\r
390/// MADT Revision (as defined in ACPI 6.2 spec.)\r
391///\r
392#define EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x04\r
393\r
394///\r
395/// Multiple APIC Flags\r
396/// All other bits are reserved and must be set to 0.\r
397///\r
398#define EFI_ACPI_6_2_PCAT_COMPAT BIT0\r
399\r
400//\r
401// Multiple APIC Description Table APIC structure types\r
402// All other values between 0x0D and 0x7F are reserved and\r
403// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
404//\r
405#define EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC 0x00\r
406#define EFI_ACPI_6_2_IO_APIC 0x01\r
407#define EFI_ACPI_6_2_INTERRUPT_SOURCE_OVERRIDE 0x02\r
408#define EFI_ACPI_6_2_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
409#define EFI_ACPI_6_2_LOCAL_APIC_NMI 0x04\r
410#define EFI_ACPI_6_2_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
411#define EFI_ACPI_6_2_IO_SAPIC 0x06\r
412#define EFI_ACPI_6_2_LOCAL_SAPIC 0x07\r
413#define EFI_ACPI_6_2_PLATFORM_INTERRUPT_SOURCES 0x08\r
414#define EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC 0x09\r
415#define EFI_ACPI_6_2_LOCAL_X2APIC_NMI 0x0A\r
416#define EFI_ACPI_6_2_GIC 0x0B\r
417#define EFI_ACPI_6_2_GICD 0x0C\r
418#define EFI_ACPI_6_2_GIC_MSI_FRAME 0x0D\r
419#define EFI_ACPI_6_2_GICR 0x0E\r
420#define EFI_ACPI_6_2_GIC_ITS 0x0F\r
421\r
422//\r
423// APIC Structure Definitions\r
424//\r
425\r
426///\r
427/// Processor Local APIC Structure Definition\r
428///\r
429typedef struct {\r
430 UINT8 Type;\r
431 UINT8 Length;\r
432 UINT8 AcpiProcessorUid;\r
433 UINT8 ApicId;\r
434 UINT32 Flags;\r
435} EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
436\r
437///\r
438/// Local APIC Flags. All other bits are reserved and must be 0.\r
439///\r
440#define EFI_ACPI_6_2_LOCAL_APIC_ENABLED BIT0\r
441\r
442///\r
443/// IO APIC Structure\r
444///\r
445typedef struct {\r
446 UINT8 Type;\r
447 UINT8 Length;\r
448 UINT8 IoApicId;\r
449 UINT8 Reserved;\r
450 UINT32 IoApicAddress;\r
451 UINT32 GlobalSystemInterruptBase;\r
452} EFI_ACPI_6_2_IO_APIC_STRUCTURE;\r
453\r
454///\r
455/// Interrupt Source Override Structure\r
456///\r
457typedef struct {\r
458 UINT8 Type;\r
459 UINT8 Length;\r
460 UINT8 Bus;\r
461 UINT8 Source;\r
462 UINT32 GlobalSystemInterrupt;\r
463 UINT16 Flags;\r
464} EFI_ACPI_6_2_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
465\r
466///\r
467/// Platform Interrupt Sources Structure Definition\r
468///\r
469typedef struct {\r
470 UINT8 Type;\r
471 UINT8 Length;\r
472 UINT16 Flags;\r
473 UINT8 InterruptType;\r
474 UINT8 ProcessorId;\r
475 UINT8 ProcessorEid;\r
476 UINT8 IoSapicVector;\r
477 UINT32 GlobalSystemInterrupt;\r
478 UINT32 PlatformInterruptSourceFlags;\r
479 UINT8 CpeiProcessorOverride;\r
480 UINT8 Reserved[31];\r
481} EFI_ACPI_6_2_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
482\r
483//\r
484// MPS INTI flags.\r
485// All other bits are reserved and must be set to 0.\r
486//\r
487#define EFI_ACPI_6_2_POLARITY (3 << 0)\r
488#define EFI_ACPI_6_2_TRIGGER_MODE (3 << 2)\r
489\r
490///\r
491/// Non-Maskable Interrupt Source Structure\r
492///\r
493typedef struct {\r
494 UINT8 Type;\r
495 UINT8 Length;\r
496 UINT16 Flags;\r
497 UINT32 GlobalSystemInterrupt;\r
498} EFI_ACPI_6_2_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
499\r
500///\r
501/// Local APIC NMI Structure\r
502///\r
503typedef struct {\r
504 UINT8 Type;\r
505 UINT8 Length;\r
506 UINT8 AcpiProcessorUid;\r
507 UINT16 Flags;\r
508 UINT8 LocalApicLint;\r
509} EFI_ACPI_6_2_LOCAL_APIC_NMI_STRUCTURE;\r
510\r
511///\r
512/// Local APIC Address Override Structure\r
513///\r
514typedef struct {\r
515 UINT8 Type;\r
516 UINT8 Length;\r
517 UINT16 Reserved;\r
518 UINT64 LocalApicAddress;\r
519} EFI_ACPI_6_2_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
520\r
521///\r
522/// IO SAPIC Structure\r
523///\r
524typedef struct {\r
525 UINT8 Type;\r
526 UINT8 Length;\r
527 UINT8 IoApicId;\r
528 UINT8 Reserved;\r
529 UINT32 GlobalSystemInterruptBase;\r
530 UINT64 IoSapicAddress;\r
531} EFI_ACPI_6_2_IO_SAPIC_STRUCTURE;\r
532\r
533///\r
534/// Local SAPIC Structure\r
535/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
536///\r
537typedef struct {\r
538 UINT8 Type;\r
539 UINT8 Length;\r
540 UINT8 AcpiProcessorId;\r
541 UINT8 LocalSapicId;\r
542 UINT8 LocalSapicEid;\r
543 UINT8 Reserved[3];\r
544 UINT32 Flags;\r
545 UINT32 ACPIProcessorUIDValue;\r
546} EFI_ACPI_6_2_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
547\r
548///\r
549/// Platform Interrupt Sources Structure\r
550///\r
551typedef struct {\r
552 UINT8 Type;\r
553 UINT8 Length;\r
554 UINT16 Flags;\r
555 UINT8 InterruptType;\r
556 UINT8 ProcessorId;\r
557 UINT8 ProcessorEid;\r
558 UINT8 IoSapicVector;\r
559 UINT32 GlobalSystemInterrupt;\r
560 UINT32 PlatformInterruptSourceFlags;\r
561} EFI_ACPI_6_2_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
562\r
563///\r
564/// Platform Interrupt Source Flags.\r
565/// All other bits are reserved and must be set to 0.\r
566///\r
567#define EFI_ACPI_6_2_CPEI_PROCESSOR_OVERRIDE BIT0\r
568\r
569///\r
570/// Processor Local x2APIC Structure Definition\r
571///\r
572typedef struct {\r
573 UINT8 Type;\r
574 UINT8 Length;\r
575 UINT8 Reserved[2];\r
576 UINT32 X2ApicId;\r
577 UINT32 Flags;\r
578 UINT32 AcpiProcessorUid;\r
579} EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
580\r
581///\r
582/// Local x2APIC NMI Structure\r
583///\r
584typedef struct {\r
585 UINT8 Type;\r
586 UINT8 Length;\r
587 UINT16 Flags;\r
588 UINT32 AcpiProcessorUid;\r
589 UINT8 LocalX2ApicLint;\r
590 UINT8 Reserved[3];\r
591} EFI_ACPI_6_2_LOCAL_X2APIC_NMI_STRUCTURE;\r
592\r
593///\r
594/// GIC Structure\r
595///\r
596typedef struct {\r
597 UINT8 Type;\r
598 UINT8 Length;\r
599 UINT16 Reserved;\r
600 UINT32 CPUInterfaceNumber;\r
601 UINT32 AcpiProcessorUid;\r
602 UINT32 Flags;\r
603 UINT32 ParkingProtocolVersion;\r
604 UINT32 PerformanceInterruptGsiv;\r
605 UINT64 ParkedAddress;\r
606 UINT64 PhysicalBaseAddress;\r
607 UINT64 GICV;\r
608 UINT64 GICH;\r
609 UINT32 VGICMaintenanceInterrupt;\r
610 UINT64 GICRBaseAddress;\r
611 UINT64 MPIDR;\r
612 UINT8 ProcessorPowerEfficiencyClass;\r
613 UINT8 Reserved2[3];\r
614} EFI_ACPI_6_2_GIC_STRUCTURE;\r
615\r
616///\r
617/// GIC Flags. All other bits are reserved and must be 0.\r
618///\r
619#define EFI_ACPI_6_2_GIC_ENABLED BIT0\r
620#define EFI_ACPI_6_2_PERFORMANCE_INTERRUPT_MODEL BIT1\r
621#define EFI_ACPI_6_2_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2\r
622\r
623///\r
624/// GIC Distributor Structure\r
625///\r
626typedef struct {\r
627 UINT8 Type;\r
628 UINT8 Length;\r
629 UINT16 Reserved1;\r
630 UINT32 GicId;\r
631 UINT64 PhysicalBaseAddress;\r
632 UINT32 SystemVectorBase;\r
633 UINT8 GicVersion;\r
634 UINT8 Reserved2[3];\r
635} EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE;\r
636\r
637///\r
638/// GIC Version\r
639///\r
640#define EFI_ACPI_6_2_GIC_V1 0x01\r
641#define EFI_ACPI_6_2_GIC_V2 0x02\r
642#define EFI_ACPI_6_2_GIC_V3 0x03\r
643#define EFI_ACPI_6_2_GIC_V4 0x04\r
644\r
645///\r
646/// GIC MSI Frame Structure\r
647///\r
648typedef struct {\r
649 UINT8 Type;\r
650 UINT8 Length;\r
651 UINT16 Reserved1;\r
652 UINT32 GicMsiFrameId;\r
653 UINT64 PhysicalBaseAddress;\r
654 UINT32 Flags;\r
655 UINT16 SPICount;\r
656 UINT16 SPIBase;\r
657} EFI_ACPI_6_2_GIC_MSI_FRAME_STRUCTURE;\r
658\r
659///\r
660/// GIC MSI Frame Flags. All other bits are reserved and must be 0.\r
661///\r
662#define EFI_ACPI_6_2_SPI_COUNT_BASE_SELECT BIT0\r
663\r
664///\r
665/// GICR Structure\r
666///\r
667typedef struct {\r
668 UINT8 Type;\r
669 UINT8 Length;\r
670 UINT16 Reserved;\r
671 UINT64 DiscoveryRangeBaseAddress;\r
672 UINT32 DiscoveryRangeLength;\r
673} EFI_ACPI_6_2_GICR_STRUCTURE;\r
674\r
675///\r
676/// GIC Interrupt Translation Service Structure\r
677///\r
678typedef struct {\r
679 UINT8 Type;\r
680 UINT8 Length;\r
681 UINT16 Reserved;\r
682 UINT32 GicItsId;\r
683 UINT64 PhysicalBaseAddress;\r
684 UINT32 Reserved2;\r
685} EFI_ACPI_6_2_GIC_ITS_STRUCTURE;\r
686\r
687///\r
688/// Smart Battery Description Table (SBST)\r
689///\r
690typedef struct {\r
691 EFI_ACPI_DESCRIPTION_HEADER Header;\r
692 UINT32 WarningEnergyLevel;\r
693 UINT32 LowEnergyLevel;\r
694 UINT32 CriticalEnergyLevel;\r
695} EFI_ACPI_6_2_SMART_BATTERY_DESCRIPTION_TABLE;\r
696\r
697///\r
698/// SBST Version (as defined in ACPI 6.2 spec.)\r
699///\r
700#define EFI_ACPI_6_2_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
701\r
702///\r
703/// Embedded Controller Boot Resources Table (ECDT)\r
704/// The table is followed by a null terminated ASCII string that contains\r
705/// a fully qualified reference to the name space object.\r
706///\r
707typedef struct {\r
708 EFI_ACPI_DESCRIPTION_HEADER Header;\r
709 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE EcControl;\r
710 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE EcData;\r
711 UINT32 Uid;\r
712 UINT8 GpeBit;\r
713} EFI_ACPI_6_2_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
714\r
715///\r
716/// ECDT Version (as defined in ACPI 6.2 spec.)\r
717///\r
718#define EFI_ACPI_6_2_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
719\r
720///\r
721/// System Resource Affinity Table (SRAT). The rest of the table\r
722/// must be defined in a platform specific manner.\r
723///\r
724typedef struct {\r
725 EFI_ACPI_DESCRIPTION_HEADER Header;\r
726 UINT32 Reserved1; ///< Must be set to 1\r
727 UINT64 Reserved2;\r
728} EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
729\r
730///\r
731/// SRAT Version (as defined in ACPI 6.2 spec.)\r
732///\r
733#define EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
734\r
735//\r
736// SRAT structure types.\r
737// All other values between 0x05 an 0xFF are reserved and\r
738// will be ignored by OSPM.\r
739//\r
740#define EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
741#define EFI_ACPI_6_2_MEMORY_AFFINITY 0x01\r
742#define EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
743#define EFI_ACPI_6_2_GICC_AFFINITY 0x03\r
744#define EFI_ACPI_6_2_GIC_ITS_AFFINITY 0x04\r
745\r
746///\r
747/// Processor Local APIC/SAPIC Affinity Structure Definition\r
748///\r
749typedef struct {\r
750 UINT8 Type;\r
751 UINT8 Length;\r
752 UINT8 ProximityDomain7To0;\r
753 UINT8 ApicId;\r
754 UINT32 Flags;\r
755 UINT8 LocalSapicEid;\r
756 UINT8 ProximityDomain31To8[3];\r
757 UINT32 ClockDomain;\r
758} EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
759\r
760///\r
761/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
762///\r
763#define EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
764\r
765///\r
766/// Memory Affinity Structure Definition\r
767///\r
768typedef struct {\r
769 UINT8 Type;\r
770 UINT8 Length;\r
771 UINT32 ProximityDomain;\r
772 UINT16 Reserved1;\r
773 UINT32 AddressBaseLow;\r
774 UINT32 AddressBaseHigh;\r
775 UINT32 LengthLow;\r
776 UINT32 LengthHigh;\r
777 UINT32 Reserved2;\r
778 UINT32 Flags;\r
779 UINT64 Reserved3;\r
780} EFI_ACPI_6_2_MEMORY_AFFINITY_STRUCTURE;\r
781\r
782//\r
783// Memory Flags. All other bits are reserved and must be 0.\r
784//\r
785#define EFI_ACPI_6_2_MEMORY_ENABLED (1 << 0)\r
786#define EFI_ACPI_6_2_MEMORY_HOT_PLUGGABLE (1 << 1)\r
787#define EFI_ACPI_6_2_MEMORY_NONVOLATILE (1 << 2)\r
788\r
789///\r
790/// Processor Local x2APIC Affinity Structure Definition\r
791///\r
792typedef struct {\r
793 UINT8 Type;\r
794 UINT8 Length;\r
795 UINT8 Reserved1[2];\r
796 UINT32 ProximityDomain;\r
797 UINT32 X2ApicId;\r
798 UINT32 Flags;\r
799 UINT32 ClockDomain;\r
800 UINT8 Reserved2[4];\r
801} EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
802\r
803///\r
804/// GICC Affinity Structure Definition\r
805///\r
806typedef struct {\r
807 UINT8 Type;\r
808 UINT8 Length;\r
809 UINT32 ProximityDomain;\r
810 UINT32 AcpiProcessorUid;\r
811 UINT32 Flags;\r
812 UINT32 ClockDomain;\r
813} EFI_ACPI_6_2_GICC_AFFINITY_STRUCTURE;\r
814\r
815///\r
816/// GICC Flags. All other bits are reserved and must be 0.\r
817///\r
818#define EFI_ACPI_6_2_GICC_ENABLED (1 << 0)\r
819\r
820///\r
821/// GIC Interrupt Translation Service (ITS) Affinity Structure Definition\r
822///\r
823typedef struct {\r
824 UINT8 Type;\r
825 UINT8 Length;\r
826 UINT32 ProximityDomain;\r
827 UINT8 Reserved[2];\r
828 UINT32 ItsId;\r
829} EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE;\r
830\r
831///\r
832/// System Locality Distance Information Table (SLIT).\r
833/// The rest of the table is a matrix.\r
834///\r
835typedef struct {\r
836 EFI_ACPI_DESCRIPTION_HEADER Header;\r
837 UINT64 NumberOfSystemLocalities;\r
838} EFI_ACPI_6_2_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
839\r
840///\r
841/// SLIT Version (as defined in ACPI 6.2 spec.)\r
842///\r
843#define EFI_ACPI_6_2_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
844\r
845///\r
846/// Corrected Platform Error Polling Table (CPEP)\r
847///\r
848typedef struct {\r
849 EFI_ACPI_DESCRIPTION_HEADER Header;\r
850 UINT8 Reserved[8];\r
851} EFI_ACPI_6_2_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
852\r
853///\r
854/// CPEP Version (as defined in ACPI 6.2 spec.)\r
855///\r
856#define EFI_ACPI_6_2_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
857\r
858//\r
859// CPEP processor structure types.\r
860//\r
861#define EFI_ACPI_6_2_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
862\r
863///\r
864/// Corrected Platform Error Polling Processor Structure Definition\r
865///\r
866typedef struct {\r
867 UINT8 Type;\r
868 UINT8 Length;\r
869 UINT8 ProcessorId;\r
870 UINT8 ProcessorEid;\r
871 UINT32 PollingInterval;\r
872} EFI_ACPI_6_2_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
873\r
874///\r
875/// Maximum System Characteristics Table (MSCT)\r
876///\r
877typedef struct {\r
878 EFI_ACPI_DESCRIPTION_HEADER Header;\r
879 UINT32 OffsetProxDomInfo;\r
880 UINT32 MaximumNumberOfProximityDomains;\r
881 UINT32 MaximumNumberOfClockDomains;\r
882 UINT64 MaximumPhysicalAddress;\r
883} EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
884\r
885///\r
886/// MSCT Version (as defined in ACPI 6.2 spec.)\r
887///\r
888#define EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
889\r
890///\r
891/// Maximum Proximity Domain Information Structure Definition\r
892///\r
893typedef struct {\r
894 UINT8 Revision;\r
895 UINT8 Length;\r
896 UINT32 ProximityDomainRangeLow;\r
897 UINT32 ProximityDomainRangeHigh;\r
898 UINT32 MaximumProcessorCapacity;\r
899 UINT64 MaximumMemoryCapacity;\r
900} EFI_ACPI_6_2_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
901\r
902///\r
903/// ACPI RAS Feature Table definition.\r
904///\r
905typedef struct {\r
906 EFI_ACPI_DESCRIPTION_HEADER Header;\r
907 UINT8 PlatformCommunicationChannelIdentifier[12];\r
908} EFI_ACPI_6_2_RAS_FEATURE_TABLE;\r
909\r
910///\r
911/// RASF Version (as defined in ACPI 6.2 spec.)\r
912///\r
913#define EFI_ACPI_6_2_RAS_FEATURE_TABLE_REVISION 0x01\r
914\r
915///\r
916/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
917///\r
918typedef struct {\r
919 UINT32 Signature;\r
920 UINT16 Command;\r
921 UINT16 Status;\r
922 UINT16 Version;\r
923 UINT8 RASCapabilities[16];\r
924 UINT8 SetRASCapabilities[16];\r
925 UINT16 NumberOfRASFParameterBlocks;\r
926 UINT32 SetRASCapabilitiesStatus;\r
927} EFI_ACPI_6_2_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
928\r
929///\r
930/// ACPI RASF PCC command code\r
931///\r
932#define EFI_ACPI_6_2_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
933\r
934///\r
935/// ACPI RASF Platform RAS Capabilities\r
936///\r
937#define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0\r
938#define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1\r
939#define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2\r
940#define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3\r
941#define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4\r
942\r
943///\r
944/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
945///\r
946typedef struct {\r
947 UINT16 Type;\r
948 UINT16 Version;\r
949 UINT16 Length;\r
950 UINT16 PatrolScrubCommand;\r
951 UINT64 RequestedAddressRange[2];\r
952 UINT64 ActualAddressRange[2];\r
953 UINT16 Flags;\r
954 UINT8 RequestedSpeed;\r
955} EFI_ACPI_6_2_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
956\r
957///\r
958/// ACPI RASF Patrol Scrub command\r
959///\r
960#define EFI_ACPI_6_2_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
961#define EFI_ACPI_6_2_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
962#define EFI_ACPI_6_2_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
963\r
964///\r
965/// Memory Power State Table definition.\r
966///\r
967typedef struct {\r
968 EFI_ACPI_DESCRIPTION_HEADER Header;\r
969 UINT8 PlatformCommunicationChannelIdentifier;\r
970 UINT8 Reserved[3];\r
971// Memory Power Node Structure\r
972// Memory Power State Characteristics\r
973} EFI_ACPI_6_2_MEMORY_POWER_STATUS_TABLE;\r
974\r
975///\r
976/// MPST Version (as defined in ACPI 6.2 spec.)\r
977///\r
978#define EFI_ACPI_6_2_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
979\r
980///\r
981/// MPST Platform Communication Channel Shared Memory Region definition.\r
982///\r
983typedef struct {\r
984 UINT32 Signature;\r
985 UINT16 Command;\r
986 UINT16 Status;\r
987 UINT32 MemoryPowerCommandRegister;\r
988 UINT32 MemoryPowerStatusRegister;\r
989 UINT32 PowerStateId;\r
990 UINT32 MemoryPowerNodeId;\r
991 UINT64 MemoryEnergyConsumed;\r
992 UINT64 ExpectedAveragePowerComsuned;\r
993} EFI_ACPI_6_2_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
994\r
995///\r
996/// ACPI MPST PCC command code\r
997///\r
998#define EFI_ACPI_6_2_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
999\r
1000///\r
1001/// ACPI MPST Memory Power command\r
1002///\r
1003#define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
1004#define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
1005#define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
1006#define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
1007\r
1008///\r
1009/// MPST Memory Power Node Table\r
1010///\r
1011typedef struct {\r
1012 UINT8 PowerStateValue;\r
1013 UINT8 PowerStateInformationIndex;\r
1014} EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE;\r
1015\r
1016typedef struct {\r
1017 UINT8 Flag;\r
1018 UINT8 Reserved;\r
1019 UINT16 MemoryPowerNodeId;\r
1020 UINT32 Length;\r
1021 UINT64 AddressBase;\r
1022 UINT64 AddressLength;\r
1023 UINT32 NumberOfPowerStates;\r
1024 UINT32 NumberOfPhysicalComponents;\r
1025//EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
1026//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
1027} EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE;\r
1028\r
1029#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
1030#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
1031#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
1032\r
1033typedef struct {\r
1034 UINT16 MemoryPowerNodeCount;\r
1035 UINT8 Reserved[2];\r
1036} EFI_ACPI_6_2_MPST_MEMORY_POWER_NODE_TABLE;\r
1037\r
1038///\r
1039/// MPST Memory Power State Characteristics Table\r
1040///\r
1041typedef struct {\r
1042 UINT8 PowerStateStructureID;\r
1043 UINT8 Flag;\r
1044 UINT16 Reserved;\r
1045 UINT32 AveragePowerConsumedInMPS0;\r
1046 UINT32 RelativePowerSavingToMPS0;\r
1047 UINT64 ExitLatencyToMPS0;\r
1048} EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
1049\r
1050#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
1051#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
1052#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
1053\r
1054typedef struct {\r
1055 UINT16 MemoryPowerStateCharacteristicsCount;\r
1056 UINT8 Reserved[2];\r
1057} EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
1058\r
1059///\r
1060/// Memory Topology Table definition.\r
1061///\r
1062typedef struct {\r
1063 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1064 UINT32 Reserved;\r
1065} EFI_ACPI_6_2_MEMORY_TOPOLOGY_TABLE;\r
1066\r
1067///\r
1068/// PMTT Version (as defined in ACPI 6.2 spec.)\r
1069///\r
1070#define EFI_ACPI_6_2_MEMORY_TOPOLOGY_TABLE_REVISION 0x01\r
1071\r
1072///\r
1073/// Common Memory Aggregator Device Structure.\r
1074///\r
1075typedef struct {\r
1076 UINT8 Type;\r
1077 UINT8 Reserved;\r
1078 UINT16 Length;\r
1079 UINT16 Flags;\r
1080 UINT16 Reserved1;\r
1081} EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1082\r
1083///\r
1084/// Memory Aggregator Device Type\r
1085///\r
1086#define EFI_ACPI_6_2_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1\r
1087#define EFI_ACPI_6_2_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2\r
1088#define EFI_ACPI_6_2_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3\r
1089\r
1090///\r
1091/// Socket Memory Aggregator Device Structure.\r
1092///\r
1093typedef struct {\r
1094 EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1095 UINT16 SocketIdentifier;\r
1096 UINT16 Reserved;\r
1097//EFI_ACPI_6_2_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];\r
1098} EFI_ACPI_6_2_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1099\r
1100///\r
1101/// MemoryController Memory Aggregator Device Structure.\r
1102///\r
1103typedef struct {\r
1104 EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1105 UINT32 ReadLatency;\r
1106 UINT32 WriteLatency;\r
1107 UINT32 ReadBandwidth;\r
1108 UINT32 WriteBandwidth;\r
1109 UINT16 OptimalAccessUnit;\r
1110 UINT16 OptimalAccessAlignment;\r
1111 UINT16 Reserved;\r
1112 UINT16 NumberOfProximityDomains;\r
1113//UINT32 ProximityDomain[NumberOfProximityDomains];\r
1114//EFI_ACPI_6_2_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];\r
1115} EFI_ACPI_6_2_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1116\r
1117///\r
1118/// DIMM Memory Aggregator Device Structure.\r
1119///\r
1120typedef struct {\r
1121 EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1122 UINT16 PhysicalComponentIdentifier;\r
1123 UINT16 Reserved;\r
1124 UINT32 SizeOfDimm;\r
1125 UINT32 SmbiosHandle;\r
1126} EFI_ACPI_6_2_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1127\r
1128///\r
1129/// Boot Graphics Resource Table definition.\r
1130///\r
1131typedef struct {\r
1132 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1133 ///\r
1134 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1135 ///\r
1136 UINT16 Version;\r
1137 ///\r
1138 /// 1-byte status field indicating current status about the table.\r
1139 /// Bits[7:1] = Reserved (must be zero)\r
1140 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.\r
1141 ///\r
1142 UINT8 Status;\r
1143 ///\r
1144 /// 1-byte enumerated type field indicating format of the image.\r
1145 /// 0 = Bitmap\r
1146 /// 1 - 255 Reserved (for future use)\r
1147 ///\r
1148 UINT8 ImageType;\r
1149 ///\r
1150 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1151 /// of the image bitmap.\r
1152 ///\r
1153 UINT64 ImageAddress;\r
1154 ///\r
1155 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1156 /// (X, Y) display offset of the top left corner of the boot image.\r
1157 /// The top left corner of the display is at offset (0, 0).\r
1158 ///\r
1159 UINT32 ImageOffsetX;\r
1160 ///\r
1161 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1162 /// (X, Y) display offset of the top left corner of the boot image.\r
1163 /// The top left corner of the display is at offset (0, 0).\r
1164 ///\r
1165 UINT32 ImageOffsetY;\r
1166} EFI_ACPI_6_2_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1167\r
1168///\r
1169/// BGRT Revision\r
1170///\r
1171#define EFI_ACPI_6_2_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1172\r
1173///\r
1174/// BGRT Version\r
1175///\r
1176#define EFI_ACPI_6_2_BGRT_VERSION 0x01\r
1177\r
1178///\r
1179/// BGRT Status\r
1180///\r
1181#define EFI_ACPI_6_2_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1182#define EFI_ACPI_6_2_BGRT_STATUS_DISPLAYED 0x01\r
1183\r
1184///\r
1185/// BGRT Image Type\r
1186///\r
1187#define EFI_ACPI_6_2_BGRT_IMAGE_TYPE_BMP 0x00\r
1188\r
1189///\r
1190/// FPDT Version (as defined in ACPI 6.2 spec.)\r
1191///\r
1192#define EFI_ACPI_6_2_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1193\r
1194///\r
1195/// FPDT Performance Record Types\r
1196///\r
1197#define EFI_ACPI_6_2_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1198#define EFI_ACPI_6_2_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1199\r
1200///\r
1201/// FPDT Performance Record Revision\r
1202///\r
1203#define EFI_ACPI_6_2_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1204#define EFI_ACPI_6_2_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1205\r
1206///\r
1207/// FPDT Runtime Performance Record Types\r
1208///\r
1209#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1210#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1211#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1212\r
1213///\r
1214/// FPDT Runtime Performance Record Revision\r
1215///\r
1216#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1217#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1218#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1219\r
1220///\r
1221/// FPDT Performance Record header\r
1222///\r
1223typedef struct {\r
1224 UINT16 Type;\r
1225 UINT8 Length;\r
1226 UINT8 Revision;\r
1227} EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER;\r
1228\r
1229///\r
1230/// FPDT Performance Table header\r
1231///\r
1232typedef struct {\r
1233 UINT32 Signature;\r
1234 UINT32 Length;\r
1235} EFI_ACPI_6_2_FPDT_PERFORMANCE_TABLE_HEADER;\r
1236\r
1237///\r
1238/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1239///\r
1240typedef struct {\r
1241 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1242 UINT32 Reserved;\r
1243 ///\r
1244 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1245 ///\r
1246 UINT64 BootPerformanceTablePointer;\r
1247} EFI_ACPI_6_2_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1248\r
1249///\r
1250/// FPDT S3 Performance Table Pointer Record Structure\r
1251///\r
1252typedef struct {\r
1253 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1254 UINT32 Reserved;\r
1255 ///\r
1256 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1257 ///\r
1258 UINT64 S3PerformanceTablePointer;\r
1259} EFI_ACPI_6_2_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1260\r
1261///\r
1262/// FPDT Firmware Basic Boot Performance Record Structure\r
1263///\r
1264typedef struct {\r
1265 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1266 UINT32 Reserved;\r
1267 ///\r
1268 /// Timer value logged at the beginning of firmware image execution.\r
1269 /// This may not always be zero or near zero.\r
1270 ///\r
1271 UINT64 ResetEnd;\r
1272 ///\r
1273 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1274 /// For non-UEFI compatible boots, this field must be zero.\r
1275 ///\r
1276 UINT64 OsLoaderLoadImageStart;\r
1277 ///\r
1278 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1279 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1280 /// to the INT 19h handler invocation.\r
1281 ///\r
1282 UINT64 OsLoaderStartImageStart;\r
1283 ///\r
1284 /// Timer value logged at the point when the OS loader calls the\r
1285 /// ExitBootServices function for UEFI compatible firmware.\r
1286 /// For non-UEFI compatible boots, this field must be zero.\r
1287 ///\r
1288 UINT64 ExitBootServicesEntry;\r
1289 ///\r
1290 /// Timer value logged at the point just prior towhen the OS loader gaining\r
1291 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1292 /// For non-UEFI compatible boots, this field must be zero.\r
1293 ///\r
1294 UINT64 ExitBootServicesExit;\r
1295} EFI_ACPI_6_2_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1296\r
1297///\r
1298/// FPDT Firmware Basic Boot Performance Table signature\r
1299///\r
1300#define EFI_ACPI_6_2_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1301\r
1302//\r
1303// FPDT Firmware Basic Boot Performance Table\r
1304//\r
1305typedef struct {\r
1306 EFI_ACPI_6_2_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1307 //\r
1308 // one or more Performance Records.\r
1309 //\r
1310} EFI_ACPI_6_2_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1311\r
1312///\r
1313/// FPDT "S3PT" S3 Performance Table\r
1314///\r
1315#define EFI_ACPI_6_2_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1316\r
1317//\r
1318// FPDT Firmware S3 Boot Performance Table\r
1319//\r
1320typedef struct {\r
1321 EFI_ACPI_6_2_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1322 //\r
1323 // one or more Performance Records.\r
1324 //\r
1325} EFI_ACPI_6_2_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1326\r
1327///\r
1328/// FPDT Basic S3 Resume Performance Record\r
1329///\r
1330typedef struct {\r
1331 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1332 ///\r
1333 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1334 ///\r
1335 UINT32 ResumeCount;\r
1336 ///\r
1337 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1338 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1339 ///\r
1340 UINT64 FullResume;\r
1341 ///\r
1342 /// Average timer value of all resume cycles logged since the last full boot\r
1343 /// sequence, including the most recent resume. Note that the entire log of\r
1344 /// timer values does not need to be retained in order to calculate this average.\r
1345 ///\r
1346 UINT64 AverageResume;\r
1347} EFI_ACPI_6_2_FPDT_S3_RESUME_RECORD;\r
1348\r
1349///\r
1350/// FPDT Basic S3 Suspend Performance Record\r
1351///\r
1352typedef struct {\r
1353 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1354 ///\r
1355 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1356 /// Only the most recent suspend cycle's timer value is retained.\r
1357 ///\r
1358 UINT64 SuspendStart;\r
1359 ///\r
1360 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1361 /// mechanism) used to trigger hardware entry to S3.\r
1362 /// Only the most recent suspend cycle's timer value is retained.\r
1363 ///\r
1364 UINT64 SuspendEnd;\r
1365} EFI_ACPI_6_2_FPDT_S3_SUSPEND_RECORD;\r
1366\r
1367///\r
1368/// Firmware Performance Record Table definition.\r
1369///\r
1370typedef struct {\r
1371 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1372} EFI_ACPI_6_2_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1373\r
1374///\r
1375/// Generic Timer Description Table definition.\r
1376///\r
1377typedef struct {\r
1378 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1379 UINT64 CntControlBasePhysicalAddress;\r
1380 UINT32 Reserved;\r
1381 UINT32 SecurePL1TimerGSIV;\r
1382 UINT32 SecurePL1TimerFlags;\r
1383 UINT32 NonSecurePL1TimerGSIV;\r
1384 UINT32 NonSecurePL1TimerFlags;\r
1385 UINT32 VirtualTimerGSIV;\r
1386 UINT32 VirtualTimerFlags;\r
1387 UINT32 NonSecurePL2TimerGSIV;\r
1388 UINT32 NonSecurePL2TimerFlags;\r
1389 UINT64 CntReadBasePhysicalAddress;\r
1390 UINT32 PlatformTimerCount;\r
1391 UINT32 PlatformTimerOffset;\r
1392} EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1393\r
1394///\r
1395/// GTDT Version (as defined in ACPI 6.2 spec.)\r
1396///\r
1397#define EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02\r
1398\r
1399///\r
1400/// Timer Flags. All other bits are reserved and must be 0.\r
1401///\r
1402#define EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1403#define EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1404#define EFI_ACPI_6_2_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2\r
1405\r
1406///\r
1407/// Platform Timer Type\r
1408///\r
1409#define EFI_ACPI_6_2_GTDT_GT_BLOCK 0\r
1410#define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG 1\r
1411\r
1412///\r
1413/// GT Block Structure\r
1414///\r
1415typedef struct {\r
1416 UINT8 Type;\r
1417 UINT16 Length;\r
1418 UINT8 Reserved;\r
1419 UINT64 CntCtlBase;\r
1420 UINT32 GTBlockTimerCount;\r
1421 UINT32 GTBlockTimerOffset;\r
1422} EFI_ACPI_6_2_GTDT_GT_BLOCK_STRUCTURE;\r
1423\r
1424///\r
1425/// GT Block Timer Structure\r
1426///\r
1427typedef struct {\r
1428 UINT8 GTFrameNumber;\r
1429 UINT8 Reserved[3];\r
1430 UINT64 CntBaseX;\r
1431 UINT64 CntEL0BaseX;\r
1432 UINT32 GTxPhysicalTimerGSIV;\r
1433 UINT32 GTxPhysicalTimerFlags;\r
1434 UINT32 GTxVirtualTimerGSIV;\r
1435 UINT32 GTxVirtualTimerFlags;\r
1436 UINT32 GTxCommonFlags;\r
1437} EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_STRUCTURE;\r
1438\r
1439///\r
1440/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.\r
1441///\r
1442#define EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1443#define EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1444\r
1445///\r
1446/// Common Flags Flags. All other bits are reserved and must be 0.\r
1447///\r
1448#define EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0\r
1449#define EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r
1450\r
1451///\r
1452/// SBSA Generic Watchdog Structure\r
1453///\r
1454typedef struct {\r
1455 UINT8 Type;\r
1456 UINT16 Length;\r
1457 UINT8 Reserved;\r
1458 UINT64 RefreshFramePhysicalAddress;\r
1459 UINT64 WatchdogControlFramePhysicalAddress;\r
1460 UINT32 WatchdogTimerGSIV;\r
1461 UINT32 WatchdogTimerFlags;\r
1462} EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;\r
1463\r
1464///\r
1465/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
1466///\r
1467#define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1468#define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1469#define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
1470\r
1471//\r
1472// NVDIMM Firmware Interface Table definition.\r
1473//\r
1474typedef struct {\r
1475 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1476 UINT32 Reserved;\r
1477} EFI_ACPI_6_2_NVDIMM_FIRMWARE_INTERFACE_TABLE;\r
1478\r
1479//\r
1480// NFIT Version (as defined in ACPI 6.2 spec.)\r
1481//\r
1482#define EFI_ACPI_6_2_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1\r
1483\r
1484//\r
1485// Definition for NFIT Table Structure Types\r
1486//\r
1487#define EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0\r
1488#define EFI_ACPI_6_2_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1\r
1489#define EFI_ACPI_6_2_NFIT_INTERLEAVE_STRUCTURE_TYPE 2\r
1490#define EFI_ACPI_6_2_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3\r
1491#define EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4\r
1492#define EFI_ACPI_6_2_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5\r
1493#define EFI_ACPI_6_2_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6\r
1494\r
1495//\r
1496// Definition for NFIT Structure Header\r
1497//\r
1498typedef struct {\r
1499 UINT16 Type;\r
1500 UINT16 Length;\r
1501} EFI_ACPI_6_2_NFIT_STRUCTURE_HEADER;\r
1502\r
1503//\r
1504// Definition for System Physical Address Range Structure\r
1505//\r
1506#define EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0\r
1507#define EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1\r
1508#define EFI_ACPI_6_2_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}\r
1509#define EFI_ACPI_6_2_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}\r
1510#define EFI_ACPI_6_2_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}\r
1511#define EFI_ACPI_6_2_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}\r
1512#define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}\r
1513#define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}\r
1514#define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}\r
1515#define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D ]}\r
1516typedef struct {\r
1517 UINT16 Type;\r
1518 UINT16 Length;\r
1519 UINT16 SPARangeStructureIndex;\r
1520 UINT16 Flags;\r
1521 UINT32 Reserved_8;\r
1522 UINT32 ProximityDomain;\r
1523 GUID AddressRangeTypeGUID;\r
1524 UINT64 SystemPhysicalAddressRangeBase;\r
1525 UINT64 SystemPhysicalAddressRangeLength;\r
1526 UINT64 AddressRangeMemoryMappingAttribute;\r
1527} EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;\r
1528\r
1529//\r
1530// Definition for Memory Device to System Physical Address Range Mapping Structure\r
1531//\r
1532typedef struct {\r
1533 UINT32 DIMMNumber:4;\r
1534 UINT32 MemoryChannelNumber:4;\r
1535 UINT32 MemoryControllerID:4;\r
1536 UINT32 SocketID:4;\r
1537 UINT32 NodeControllerID:12;\r
1538 UINT32 Reserved_28:4;\r
1539} EFI_ACPI_6_2_NFIT_DEVICE_HANDLE;\r
1540\r
1541#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0\r
1542#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1\r
1543#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2\r
1544#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3\r
1545#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4\r
1546#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5\r
1547#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6\r
1548typedef struct {\r
1549 UINT16 Type;\r
1550 UINT16 Length;\r
1551 EFI_ACPI_6_2_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1552 UINT16 NVDIMMPhysicalID;\r
1553 UINT16 NVDIMMRegionID;\r
1554 UINT16 SPARangeStructureIndex ;\r
1555 UINT16 NVDIMMControlRegionStructureIndex;\r
1556 UINT64 NVDIMMRegionSize;\r
1557 UINT64 RegionOffset;\r
1558 UINT64 NVDIMMPhysicalAddressRegionBase;\r
1559 UINT16 InterleaveStructureIndex;\r
1560 UINT16 InterleaveWays;\r
1561 UINT16 NVDIMMStateFlags;\r
1562 UINT16 Reserved_46;\r
1563} EFI_ACPI_6_2_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE;\r
1564\r
1565//\r
1566// Definition for Interleave Structure\r
1567//\r
1568typedef struct {\r
1569 UINT16 Type;\r
1570 UINT16 Length;\r
1571 UINT16 InterleaveStructureIndex;\r
1572 UINT16 Reserved_6;\r
1573 UINT32 NumberOfLines;\r
1574 UINT32 LineSize;\r
1575//UINT32 LineOffset[NumberOfLines];\r
1576} EFI_ACPI_6_2_NFIT_INTERLEAVE_STRUCTURE;\r
1577\r
1578//\r
1579// Definition for SMBIOS Management Information Structure\r
1580//\r
1581typedef struct {\r
1582 UINT16 Type;\r
1583 UINT16 Length;\r
1584 UINT32 Reserved_4;\r
1585//UINT8 Data[];\r
1586} EFI_ACPI_6_2_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;\r
1587\r
1588//\r
1589// Definition for NVDIMM Control Region Structure\r
1590//\r
1591#define EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0\r
1592\r
1593#define EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0\r
1594typedef struct {\r
1595 UINT16 Type;\r
1596 UINT16 Length;\r
1597 UINT16 NVDIMMControlRegionStructureIndex;\r
1598 UINT16 VendorID;\r
1599 UINT16 DeviceID;\r
1600 UINT16 RevisionID;\r
1601 UINT16 SubsystemVendorID;\r
1602 UINT16 SubsystemDeviceID;\r
1603 UINT16 SubsystemRevisionID;\r
1604 UINT8 ValidFields;\r
1605 UINT8 ManufacturingLocation;\r
1606 UINT16 ManufacturingDate;\r
1607 UINT8 Reserved_22[2];\r
1608 UINT32 SerialNumber;\r
1609 UINT16 RegionFormatInterfaceCode;\r
1610 UINT16 NumberOfBlockControlWindows;\r
1611 UINT64 SizeOfBlockControlWindow;\r
1612 UINT64 CommandRegisterOffsetInBlockControlWindow;\r
1613 UINT64 SizeOfCommandRegisterInBlockControlWindows;\r
1614 UINT64 StatusRegisterOffsetInBlockControlWindow;\r
1615 UINT64 SizeOfStatusRegisterInBlockControlWindows;\r
1616 UINT16 NVDIMMControlRegionFlag;\r
1617 UINT8 Reserved_74[6];\r
1618} EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;\r
1619\r
1620//\r
1621// Definition for NVDIMM Block Data Window Region Structure\r
1622//\r
1623typedef struct {\r
1624 UINT16 Type;\r
1625 UINT16 Length;\r
1626 UINT16 NVDIMMControlRegionStructureIndex;\r
1627 UINT16 NumberOfBlockDataWindows;\r
1628 UINT64 BlockDataWindowStartOffset;\r
1629 UINT64 SizeOfBlockDataWindow;\r
1630 UINT64 BlockAccessibleMemoryCapacity;\r
1631 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;\r
1632} EFI_ACPI_6_2_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;\r
1633\r
1634//\r
1635// Definition for Flush Hint Address Structure\r
1636//\r
1637typedef struct {\r
1638 UINT16 Type;\r
1639 UINT16 Length;\r
1640 EFI_ACPI_6_2_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1641 UINT16 NumberOfFlushHintAddresses;\r
1642 UINT8 Reserved_10[6];\r
1643//UINT64 FlushHintAddress[NumberOfFlushHintAddresses];\r
1644} EFI_ACPI_6_2_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;\r
1645\r
1646///\r
1647/// Secure DEVices Table (SDEV)\r
1648///\r
1649typedef struct {\r
1650 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1651} EFI_ACPI_6_2_SECURE_DEVICES_TABLE_HEADER;\r
1652\r
1653///\r
1654/// SDEV Revision (as defined in ACPI 6.2 spec.)\r
1655///\r
1656#define EFI_ACPI_6_2_SECURE_DEVICES_TABLE_REVISION 0x01\r
1657\r
1658///\r
1659/// Secure Devcice types\r
1660///\r
1661#define EFI_ACPI_6_2_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01\r
1662#define EFI_ACPI_6_2_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00\r
1663\r
1664///\r
1665/// Secure Devcice flags\r
1666///\r
1667#define EFI_ACPI_6_2_SDEV_FLAG_ALLOW_HANDOFF BIT0\r
1668\r
1669///\r
1670/// SDEV Structure Header\r
1671///\r
1672typedef struct {\r
1673 UINT8 Type;\r
1674 UINT8 Flags;\r
1675 UINT16 Length;\r
1676} EFI_ACPI_6_2_SDEV_STRUCTURE_HEADER;\r
1677\r
1678///\r
1679/// PCIe Endpoint Device based Secure Device Structure\r
1680///\r
1681typedef struct {\r
1682 UINT8 Type;\r
1683 UINT8 Flags;\r
1684 UINT16 Length;\r
1685 UINT16 PciSegmentNumber;\r
1686 UINT16 StartBusNumber;\r
1687 UINT16 PciPathOffset;\r
1688 UINT16 PciPathLength;\r
1689 UINT16 VendorSpecificDataOffset;\r
1690 UINT16 VendorSpecificDataLength;\r
1691} EFI_ACPI_6_2_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;\r
1692\r
1693///\r
1694/// ACPI_NAMESPACE_DEVICE based Secure Device Structure\r
1695///\r
1696typedef struct {\r
1697 UINT8 Type;\r
1698 UINT8 Flags;\r
1699 UINT16 Length;\r
1700 UINT16 DeviceIdentifierOffset;\r
1701 UINT16 DeviceIdentifierLength;\r
1702 UINT16 VendorSpecificDataOffset;\r
1703 UINT16 VendorSpecificDataLength;\r
1704} EFI_ACPI_6_2_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;\r
1705\r
1706///\r
1707/// Boot Error Record Table (BERT)\r
1708///\r
1709typedef struct {\r
1710 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1711 UINT32 BootErrorRegionLength;\r
1712 UINT64 BootErrorRegion;\r
1713} EFI_ACPI_6_2_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1714\r
1715///\r
1716/// BERT Version (as defined in ACPI 6.2 spec.)\r
1717///\r
1718#define EFI_ACPI_6_2_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1719\r
1720///\r
1721/// Boot Error Region Block Status Definition\r
1722///\r
1723typedef struct {\r
1724 UINT32 UncorrectableErrorValid:1;\r
1725 UINT32 CorrectableErrorValid:1;\r
1726 UINT32 MultipleUncorrectableErrors:1;\r
1727 UINT32 MultipleCorrectableErrors:1;\r
1728 UINT32 ErrorDataEntryCount:10;\r
1729 UINT32 Reserved:18;\r
1730} EFI_ACPI_6_2_ERROR_BLOCK_STATUS;\r
1731\r
1732///\r
1733/// Boot Error Region Definition\r
1734///\r
1735typedef struct {\r
1736 EFI_ACPI_6_2_ERROR_BLOCK_STATUS BlockStatus;\r
1737 UINT32 RawDataOffset;\r
1738 UINT32 RawDataLength;\r
1739 UINT32 DataLength;\r
1740 UINT32 ErrorSeverity;\r
1741} EFI_ACPI_6_2_BOOT_ERROR_REGION_STRUCTURE;\r
1742\r
1743//\r
1744// Boot Error Severity types\r
1745//\r
1746#define EFI_ACPI_6_2_ERROR_SEVERITY_CORRECTABLE 0x00\r
1747#define EFI_ACPI_6_2_ERROR_SEVERITY_FATAL 0x01\r
1748#define EFI_ACPI_6_2_ERROR_SEVERITY_CORRECTED 0x02\r
1749#define EFI_ACPI_6_2_ERROR_SEVERITY_NONE 0x03\r
1750\r
1751///\r
1752/// Generic Error Data Entry Definition\r
1753///\r
1754typedef struct {\r
1755 UINT8 SectionType[16];\r
1756 UINT32 ErrorSeverity;\r
1757 UINT16 Revision;\r
1758 UINT8 ValidationBits;\r
1759 UINT8 Flags;\r
1760 UINT32 ErrorDataLength;\r
1761 UINT8 FruId[16];\r
1762 UINT8 FruText[20];\r
1763 UINT8 Timestamp[8];\r
1764} EFI_ACPI_6_2_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1765\r
1766///\r
1767/// Generic Error Data Entry Version (as defined in ACPI 6.2 spec.)\r
1768///\r
1769#define EFI_ACPI_6_2_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300\r
1770\r
1771///\r
1772/// HEST - Hardware Error Source Table\r
1773///\r
1774typedef struct {\r
1775 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1776 UINT32 ErrorSourceCount;\r
1777} EFI_ACPI_6_2_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1778\r
1779///\r
1780/// HEST Version (as defined in ACPI 6.2 spec.)\r
1781///\r
1782#define EFI_ACPI_6_2_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1783\r
1784//\r
1785// Error Source structure types.\r
1786//\r
1787#define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1788#define EFI_ACPI_6_2_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1789#define EFI_ACPI_6_2_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1790#define EFI_ACPI_6_2_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1791#define EFI_ACPI_6_2_PCI_EXPRESS_DEVICE_AER 0x07\r
1792#define EFI_ACPI_6_2_PCI_EXPRESS_BRIDGE_AER 0x08\r
1793#define EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR 0x09\r
1794#define EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A\r
1795#define EFI_ACPI_6_2_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B\r
1796\r
1797//\r
1798// Error Source structure flags.\r
1799//\r
1800#define EFI_ACPI_6_2_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1801#define EFI_ACPI_6_2_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1802#define EFI_ACPI_6_2_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2)\r
1803\r
1804///\r
1805/// IA-32 Architecture Machine Check Exception Structure Definition\r
1806///\r
1807typedef struct {\r
1808 UINT16 Type;\r
1809 UINT16 SourceId;\r
1810 UINT8 Reserved0[2];\r
1811 UINT8 Flags;\r
1812 UINT8 Enabled;\r
1813 UINT32 NumberOfRecordsToPreAllocate;\r
1814 UINT32 MaxSectionsPerRecord;\r
1815 UINT64 GlobalCapabilityInitData;\r
1816 UINT64 GlobalControlInitData;\r
1817 UINT8 NumberOfHardwareBanks;\r
1818 UINT8 Reserved1[7];\r
1819} EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1820\r
1821///\r
1822/// IA-32 Architecture Machine Check Bank Structure Definition\r
1823///\r
1824typedef struct {\r
1825 UINT8 BankNumber;\r
1826 UINT8 ClearStatusOnInitialization;\r
1827 UINT8 StatusDataFormat;\r
1828 UINT8 Reserved0;\r
1829 UINT32 ControlRegisterMsrAddress;\r
1830 UINT64 ControlInitData;\r
1831 UINT32 StatusRegisterMsrAddress;\r
1832 UINT32 AddressRegisterMsrAddress;\r
1833 UINT32 MiscRegisterMsrAddress;\r
1834} EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1835\r
1836///\r
1837/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1838///\r
1839#define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1840#define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1841#define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1842\r
1843//\r
1844// Hardware Error Notification types. All other values are reserved\r
1845//\r
1846#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1847#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1848#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1849#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1850#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1851#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05\r
1852#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_MCE 0x06\r
1853#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07\r
1854#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08\r
1855#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09\r
1856#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A\r
1857#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B\r
1858\r
1859///\r
1860/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1861///\r
1862typedef struct {\r
1863 UINT16 Type:1;\r
1864 UINT16 PollInterval:1;\r
1865 UINT16 SwitchToPollingThresholdValue:1;\r
1866 UINT16 SwitchToPollingThresholdWindow:1;\r
1867 UINT16 ErrorThresholdValue:1;\r
1868 UINT16 ErrorThresholdWindow:1;\r
1869 UINT16 Reserved:10;\r
1870} EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1871\r
1872///\r
1873/// Hardware Error Notification Structure Definition\r
1874///\r
1875typedef struct {\r
1876 UINT8 Type;\r
1877 UINT8 Length;\r
1878 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1879 UINT32 PollInterval;\r
1880 UINT32 Vector;\r
1881 UINT32 SwitchToPollingThresholdValue;\r
1882 UINT32 SwitchToPollingThresholdWindow;\r
1883 UINT32 ErrorThresholdValue;\r
1884 UINT32 ErrorThresholdWindow;\r
1885} EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1886\r
1887///\r
1888/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1889///\r
1890typedef struct {\r
1891 UINT16 Type;\r
1892 UINT16 SourceId;\r
1893 UINT8 Reserved0[2];\r
1894 UINT8 Flags;\r
1895 UINT8 Enabled;\r
1896 UINT32 NumberOfRecordsToPreAllocate;\r
1897 UINT32 MaxSectionsPerRecord;\r
1898 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1899 UINT8 NumberOfHardwareBanks;\r
1900 UINT8 Reserved1[3];\r
1901} EFI_ACPI_6_2_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1902\r
1903///\r
1904/// IA-32 Architecture NMI Error Structure Definition\r
1905///\r
1906typedef struct {\r
1907 UINT16 Type;\r
1908 UINT16 SourceId;\r
1909 UINT8 Reserved0[2];\r
1910 UINT32 NumberOfRecordsToPreAllocate;\r
1911 UINT32 MaxSectionsPerRecord;\r
1912 UINT32 MaxRawDataLength;\r
1913} EFI_ACPI_6_2_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1914\r
1915///\r
1916/// PCI Express Root Port AER Structure Definition\r
1917///\r
1918typedef struct {\r
1919 UINT16 Type;\r
1920 UINT16 SourceId;\r
1921 UINT8 Reserved0[2];\r
1922 UINT8 Flags;\r
1923 UINT8 Enabled;\r
1924 UINT32 NumberOfRecordsToPreAllocate;\r
1925 UINT32 MaxSectionsPerRecord;\r
1926 UINT32 Bus;\r
1927 UINT16 Device;\r
1928 UINT16 Function;\r
1929 UINT16 DeviceControl;\r
1930 UINT8 Reserved1[2];\r
1931 UINT32 UncorrectableErrorMask;\r
1932 UINT32 UncorrectableErrorSeverity;\r
1933 UINT32 CorrectableErrorMask;\r
1934 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1935 UINT32 RootErrorCommand;\r
1936} EFI_ACPI_6_2_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1937\r
1938///\r
1939/// PCI Express Device AER Structure Definition\r
1940///\r
1941typedef struct {\r
1942 UINT16 Type;\r
1943 UINT16 SourceId;\r
1944 UINT8 Reserved0[2];\r
1945 UINT8 Flags;\r
1946 UINT8 Enabled;\r
1947 UINT32 NumberOfRecordsToPreAllocate;\r
1948 UINT32 MaxSectionsPerRecord;\r
1949 UINT32 Bus;\r
1950 UINT16 Device;\r
1951 UINT16 Function;\r
1952 UINT16 DeviceControl;\r
1953 UINT8 Reserved1[2];\r
1954 UINT32 UncorrectableErrorMask;\r
1955 UINT32 UncorrectableErrorSeverity;\r
1956 UINT32 CorrectableErrorMask;\r
1957 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1958} EFI_ACPI_6_2_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1959\r
1960///\r
1961/// PCI Express Bridge AER Structure Definition\r
1962///\r
1963typedef struct {\r
1964 UINT16 Type;\r
1965 UINT16 SourceId;\r
1966 UINT8 Reserved0[2];\r
1967 UINT8 Flags;\r
1968 UINT8 Enabled;\r
1969 UINT32 NumberOfRecordsToPreAllocate;\r
1970 UINT32 MaxSectionsPerRecord;\r
1971 UINT32 Bus;\r
1972 UINT16 Device;\r
1973 UINT16 Function;\r
1974 UINT16 DeviceControl;\r
1975 UINT8 Reserved1[2];\r
1976 UINT32 UncorrectableErrorMask;\r
1977 UINT32 UncorrectableErrorSeverity;\r
1978 UINT32 CorrectableErrorMask;\r
1979 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1980 UINT32 SecondaryUncorrectableErrorMask;\r
1981 UINT32 SecondaryUncorrectableErrorSeverity;\r
1982 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
1983} EFI_ACPI_6_2_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
1984\r
1985///\r
1986/// Generic Hardware Error Source Structure Definition\r
1987///\r
1988typedef struct {\r
1989 UINT16 Type;\r
1990 UINT16 SourceId;\r
1991 UINT16 RelatedSourceId;\r
1992 UINT8 Flags;\r
1993 UINT8 Enabled;\r
1994 UINT32 NumberOfRecordsToPreAllocate;\r
1995 UINT32 MaxSectionsPerRecord;\r
1996 UINT32 MaxRawDataLength;\r
1997 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1998 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1999 UINT32 ErrorStatusBlockLength;\r
2000} EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
2001\r
2002///\r
2003/// Generic Hardware Error Source Version 2 Structure Definition\r
2004///\r
2005typedef struct {\r
2006 UINT16 Type;\r
2007 UINT16 SourceId;\r
2008 UINT16 RelatedSourceId;\r
2009 UINT8 Flags;\r
2010 UINT8 Enabled;\r
2011 UINT32 NumberOfRecordsToPreAllocate;\r
2012 UINT32 MaxSectionsPerRecord;\r
2013 UINT32 MaxRawDataLength;\r
2014 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
2015 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2016 UINT32 ErrorStatusBlockLength;\r
2017 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ReadAckRegister;\r
2018 UINT64 ReadAckPreserve;\r
2019 UINT64 ReadAckWrite;\r
2020} EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE;\r
2021\r
2022///\r
2023/// Generic Error Status Definition\r
2024///\r
2025typedef struct {\r
2026 EFI_ACPI_6_2_ERROR_BLOCK_STATUS BlockStatus;\r
2027 UINT32 RawDataOffset;\r
2028 UINT32 RawDataLength;\r
2029 UINT32 DataLength;\r
2030 UINT32 ErrorSeverity;\r
2031} EFI_ACPI_6_2_GENERIC_ERROR_STATUS_STRUCTURE;\r
2032\r
2033///\r
2034/// IA-32 Architecture Deferred Machine Check Structure Definition\r
2035///\r
2036typedef struct {\r
2037 UINT16 Type;\r
2038 UINT16 SourceId;\r
2039 UINT8 Reserved0[2];\r
2040 UINT8 Flags;\r
2041 UINT8 Enabled;\r
2042 UINT32 NumberOfRecordsToPreAllocate;\r
2043 UINT32 MaxSectionsPerRecord;\r
2044 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2045 UINT8 NumberOfHardwareBanks;\r
2046 UINT8 Reserved1[3];\r
2047} EFI_ACPI_6_2_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE;;\r
2048\r
2049///\r
2050/// HMAT - Heterogeneous Memory Attribute Table\r
2051///\r
2052typedef struct {\r
2053 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2054 UINT8 Reserved[4];\r
2055} EFI_ACPI_6_2_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER;\r
2056\r
2057///\r
2058/// HMAT Revision (as defined in ACPI 6.2 spec.)\r
2059///\r
2060#define EFI_ACPI_6_2_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x01\r
2061\r
2062///\r
2063/// HMAT types\r
2064///\r
2065#define EFI_ACPI_6_2_HMAT_TYPE_MEMORY_SUBSYSTEM_ADDRESS_RANGE 0x00\r
2066#define EFI_ACPI_6_2_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01\r
2067#define EFI_ACPI_6_2_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02\r
2068\r
2069///\r
2070/// HMAT Structure Header\r
2071///\r
2072typedef struct {\r
2073 UINT16 Type;\r
2074 UINT8 Reserved[2];\r
2075 UINT32 Length;\r
2076} EFI_ACPI_6_2_HMAT_STRUCTURE_HEADER;\r
2077\r
2078///\r
2079/// Memory Subsystem Address Range Structure flags\r
2080///\r
2081typedef struct {\r
2082 UINT16 ProcessorProximityDomainValid:1;\r
2083 UINT16 MemoryProximityDomainValid:1;\r
2084 UINT16 ReservationHint:1;\r
2085 UINT16 Reserved:13;\r
2086} EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SUBSYSTEM_ADDRESS_RANGE_FLAGS;\r
2087\r
2088///\r
2089/// Memory Subsystem Address Range Structure\r
2090///\r
2091typedef struct {\r
2092 UINT16 Type;\r
2093 UINT8 Reserved[2];\r
2094 UINT32 Length;\r
2095 EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SUBSYSTEM_ADDRESS_RANGE_FLAGS Flags;\r
2096 UINT8 Reserved1[2];\r
2097 UINT32 ProcessorProximityDomain;\r
2098 UINT32 MemoryProximityDomain;\r
2099 UINT8 Reserved2[4];\r
2100 UINT64 SystemPhysicalAddressRangeBase;\r
2101 UINT64 SystemPhysicalAddressRangeLength;\r
2102} EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SUBSYSTEM_ADDRESS_RANGE;\r
2103\r
2104///\r
2105/// System Locality Latency and Bandwidth Information Structure flags\r
2106///\r
2107typedef struct {\r
2108 UINT8 MemoryHierarchy:5;\r
2109 UINT8 Reserved:3;\r
2110} EFI_ACPI_6_2_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS;\r
2111\r
2112///\r
2113/// System Locality Latency and Bandwidth Information Structure\r
2114///\r
2115typedef struct {\r
2116 UINT16 Type;\r
2117 UINT8 Reserved[2];\r
2118 UINT32 Length;\r
2119 EFI_ACPI_6_2_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags;\r
2120 UINT8 DataType;\r
2121 UINT8 Reserved1[2];\r
2122 UINT32 NumberOfInitiatorProximityDomains;\r
2123 UINT32 NumberOfTargetProximityDomains;\r
2124 UINT8 Reserved2[4];\r
2125 UINT64 EntryBaseUnit;\r
2126} EFI_ACPI_6_2_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO;\r
2127\r
2128///\r
2129/// Memory Side Cache Information Structure cache attributes\r
2130///\r
2131typedef struct {\r
2132 UINT32 TotalCacheLevels:4;\r
2133 UINT32 CacheLevel:4;\r
2134 UINT32 CacheAssociativity:4;\r
2135 UINT32 WritePolicy:4;\r
2136 UINT32 CacheLineSize:16;\r
2137} EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES;\r
2138\r
2139///\r
2140/// Memory Side Cache Information Structure\r
2141///\r
2142typedef struct {\r
2143 UINT16 Type;\r
2144 UINT8 Reserved[2];\r
2145 UINT32 Length;\r
2146 UINT32 MemoryProximityDomain;\r
2147 UINT8 Reserved1[4];\r
2148 UINT64 MemorySideCacheSize;\r
2149 EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes;\r
2150 UINT8 Reserved2[2];\r
2151 UINT16 NumberOfSmbiosHandles;\r
2152} EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO;\r
2153\r
2154///\r
2155/// ERST - Error Record Serialization Table\r
2156///\r
2157typedef struct {\r
2158 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2159 UINT32 SerializationHeaderSize;\r
2160 UINT8 Reserved0[4];\r
2161 UINT32 InstructionEntryCount;\r
2162} EFI_ACPI_6_2_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
2163\r
2164///\r
2165/// ERST Version (as defined in ACPI 6.2 spec.)\r
2166///\r
2167#define EFI_ACPI_6_2_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
2168\r
2169///\r
2170/// ERST Serialization Actions\r
2171///\r
2172#define EFI_ACPI_6_2_ERST_BEGIN_WRITE_OPERATION 0x00\r
2173#define EFI_ACPI_6_2_ERST_BEGIN_READ_OPERATION 0x01\r
2174#define EFI_ACPI_6_2_ERST_BEGIN_CLEAR_OPERATION 0x02\r
2175#define EFI_ACPI_6_2_ERST_END_OPERATION 0x03\r
2176#define EFI_ACPI_6_2_ERST_SET_RECORD_OFFSET 0x04\r
2177#define EFI_ACPI_6_2_ERST_EXECUTE_OPERATION 0x05\r
2178#define EFI_ACPI_6_2_ERST_CHECK_BUSY_STATUS 0x06\r
2179#define EFI_ACPI_6_2_ERST_GET_COMMAND_STATUS 0x07\r
2180#define EFI_ACPI_6_2_ERST_GET_RECORD_IDENTIFIER 0x08\r
2181#define EFI_ACPI_6_2_ERST_SET_RECORD_IDENTIFIER 0x09\r
2182#define EFI_ACPI_6_2_ERST_GET_RECORD_COUNT 0x0A\r
2183#define EFI_ACPI_6_2_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
2184#define EFI_ACPI_6_2_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
2185#define EFI_ACPI_6_2_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
2186#define EFI_ACPI_6_2_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
2187#define EFI_ACPI_6_2_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10\r
2188\r
2189///\r
2190/// ERST Action Command Status\r
2191///\r
2192#define EFI_ACPI_6_2_ERST_STATUS_SUCCESS 0x00\r
2193#define EFI_ACPI_6_2_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
2194#define EFI_ACPI_6_2_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
2195#define EFI_ACPI_6_2_ERST_STATUS_FAILED 0x03\r
2196#define EFI_ACPI_6_2_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
2197#define EFI_ACPI_6_2_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
2198\r
2199///\r
2200/// ERST Serialization Instructions\r
2201///\r
2202#define EFI_ACPI_6_2_ERST_READ_REGISTER 0x00\r
2203#define EFI_ACPI_6_2_ERST_READ_REGISTER_VALUE 0x01\r
2204#define EFI_ACPI_6_2_ERST_WRITE_REGISTER 0x02\r
2205#define EFI_ACPI_6_2_ERST_WRITE_REGISTER_VALUE 0x03\r
2206#define EFI_ACPI_6_2_ERST_NOOP 0x04\r
2207#define EFI_ACPI_6_2_ERST_LOAD_VAR1 0x05\r
2208#define EFI_ACPI_6_2_ERST_LOAD_VAR2 0x06\r
2209#define EFI_ACPI_6_2_ERST_STORE_VAR1 0x07\r
2210#define EFI_ACPI_6_2_ERST_ADD 0x08\r
2211#define EFI_ACPI_6_2_ERST_SUBTRACT 0x09\r
2212#define EFI_ACPI_6_2_ERST_ADD_VALUE 0x0A\r
2213#define EFI_ACPI_6_2_ERST_SUBTRACT_VALUE 0x0B\r
2214#define EFI_ACPI_6_2_ERST_STALL 0x0C\r
2215#define EFI_ACPI_6_2_ERST_STALL_WHILE_TRUE 0x0D\r
2216#define EFI_ACPI_6_2_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
2217#define EFI_ACPI_6_2_ERST_GOTO 0x0F\r
2218#define EFI_ACPI_6_2_ERST_SET_SRC_ADDRESS_BASE 0x10\r
2219#define EFI_ACPI_6_2_ERST_SET_DST_ADDRESS_BASE 0x11\r
2220#define EFI_ACPI_6_2_ERST_MOVE_DATA 0x12\r
2221\r
2222///\r
2223/// ERST Instruction Flags\r
2224///\r
2225#define EFI_ACPI_6_2_ERST_PRESERVE_REGISTER 0x01\r
2226\r
2227///\r
2228/// ERST Serialization Instruction Entry\r
2229///\r
2230typedef struct {\r
2231 UINT8 SerializationAction;\r
2232 UINT8 Instruction;\r
2233 UINT8 Flags;\r
2234 UINT8 Reserved0;\r
2235 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2236 UINT64 Value;\r
2237 UINT64 Mask;\r
2238} EFI_ACPI_6_2_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
2239\r
2240///\r
2241/// EINJ - Error Injection Table\r
2242///\r
2243typedef struct {\r
2244 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2245 UINT32 InjectionHeaderSize;\r
2246 UINT8 InjectionFlags;\r
2247 UINT8 Reserved0[3];\r
2248 UINT32 InjectionEntryCount;\r
2249} EFI_ACPI_6_2_ERROR_INJECTION_TABLE_HEADER;\r
2250\r
2251///\r
2252/// EINJ Version (as defined in ACPI 6.2 spec.)\r
2253///\r
2254#define EFI_ACPI_6_2_ERROR_INJECTION_TABLE_REVISION 0x01\r
2255\r
2256///\r
2257/// EINJ Error Injection Actions\r
2258///\r
2259#define EFI_ACPI_6_2_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
2260#define EFI_ACPI_6_2_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
2261#define EFI_ACPI_6_2_EINJ_SET_ERROR_TYPE 0x02\r
2262#define EFI_ACPI_6_2_EINJ_GET_ERROR_TYPE 0x03\r
2263#define EFI_ACPI_6_2_EINJ_END_OPERATION 0x04\r
2264#define EFI_ACPI_6_2_EINJ_EXECUTE_OPERATION 0x05\r
2265#define EFI_ACPI_6_2_EINJ_CHECK_BUSY_STATUS 0x06\r
2266#define EFI_ACPI_6_2_EINJ_GET_COMMAND_STATUS 0x07\r
2267#define EFI_ACPI_6_2_EINJ_TRIGGER_ERROR 0xFF\r
2268\r
2269///\r
2270/// EINJ Action Command Status\r
2271///\r
2272#define EFI_ACPI_6_2_EINJ_STATUS_SUCCESS 0x00\r
2273#define EFI_ACPI_6_2_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
2274#define EFI_ACPI_6_2_EINJ_STATUS_INVALID_ACCESS 0x02\r
2275\r
2276///\r
2277/// EINJ Error Type Definition\r
2278///\r
2279#define EFI_ACPI_6_2_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
2280#define EFI_ACPI_6_2_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
2281#define EFI_ACPI_6_2_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
2282#define EFI_ACPI_6_2_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
2283#define EFI_ACPI_6_2_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
2284#define EFI_ACPI_6_2_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
2285#define EFI_ACPI_6_2_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
2286#define EFI_ACPI_6_2_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
2287#define EFI_ACPI_6_2_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
2288#define EFI_ACPI_6_2_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
2289#define EFI_ACPI_6_2_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
2290#define EFI_ACPI_6_2_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
2291\r
2292///\r
2293/// EINJ Injection Instructions\r
2294///\r
2295#define EFI_ACPI_6_2_EINJ_READ_REGISTER 0x00\r
2296#define EFI_ACPI_6_2_EINJ_READ_REGISTER_VALUE 0x01\r
2297#define EFI_ACPI_6_2_EINJ_WRITE_REGISTER 0x02\r
2298#define EFI_ACPI_6_2_EINJ_WRITE_REGISTER_VALUE 0x03\r
2299#define EFI_ACPI_6_2_EINJ_NOOP 0x04\r
2300\r
2301///\r
2302/// EINJ Instruction Flags\r
2303///\r
2304#define EFI_ACPI_6_2_EINJ_PRESERVE_REGISTER 0x01\r
2305\r
2306///\r
2307/// EINJ Injection Instruction Entry\r
2308///\r
2309typedef struct {\r
2310 UINT8 InjectionAction;\r
2311 UINT8 Instruction;\r
2312 UINT8 Flags;\r
2313 UINT8 Reserved0;\r
2314 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2315 UINT64 Value;\r
2316 UINT64 Mask;\r
2317} EFI_ACPI_6_2_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
2318\r
2319///\r
2320/// EINJ Trigger Action Table\r
2321///\r
2322typedef struct {\r
2323 UINT32 HeaderSize;\r
2324 UINT32 Revision;\r
2325 UINT32 TableSize;\r
2326 UINT32 EntryCount;\r
2327} EFI_ACPI_6_2_EINJ_TRIGGER_ACTION_TABLE;\r
2328\r
2329///\r
2330/// Platform Communications Channel Table (PCCT)\r
2331///\r
2332typedef struct {\r
2333 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2334 UINT32 Flags;\r
2335 UINT64 Reserved;\r
2336} EFI_ACPI_6_2_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
2337\r
2338///\r
2339/// PCCT Version (as defined in ACPI 6.2 spec.)\r
2340///\r
2341#define EFI_ACPI_6_2_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02\r
2342\r
2343///\r
2344/// PCCT Global Flags\r
2345///\r
2346#define EFI_ACPI_6_2_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0\r
2347\r
2348//\r
2349// PCCT Subspace type\r
2350//\r
2351#define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
2352#define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01\r
2353#define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02\r
2354#define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03\r
2355#define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04\r
2356\r
2357///\r
2358/// PCC Subspace Structure Header\r
2359///\r
2360typedef struct {\r
2361 UINT8 Type;\r
2362 UINT8 Length;\r
2363} EFI_ACPI_6_2_PCCT_SUBSPACE_HEADER;\r
2364\r
2365///\r
2366/// Generic Communications Subspace Structure\r
2367///\r
2368typedef struct {\r
2369 UINT8 Type;\r
2370 UINT8 Length;\r
2371 UINT8 Reserved[6];\r
2372 UINT64 BaseAddress;\r
2373 UINT64 AddressLength;\r
2374 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2375 UINT64 DoorbellPreserve;\r
2376 UINT64 DoorbellWrite;\r
2377 UINT32 NominalLatency;\r
2378 UINT32 MaximumPeriodicAccessRate;\r
2379 UINT16 MinimumRequestTurnaroundTime;\r
2380} EFI_ACPI_6_2_PCCT_SUBSPACE_GENERIC;\r
2381\r
2382///\r
2383/// Generic Communications Channel Shared Memory Region\r
2384///\r
2385\r
2386typedef struct {\r
2387 UINT8 Command;\r
2388 UINT8 Reserved:7;\r
2389 UINT8 NotifyOnCompletion:1;\r
2390} EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
2391\r
2392typedef struct {\r
2393 UINT8 CommandComplete:1;\r
2394 UINT8 PlatformInterrupt:1;\r
2395 UINT8 Error:1;\r
2396 UINT8 PlatformNotification:1;\r
2397 UINT8 Reserved:4;\r
2398 UINT8 Reserved1;\r
2399} EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
2400\r
2401typedef struct {\r
2402 UINT32 Signature;\r
2403 EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
2404 EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
2405} EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
2406\r
2407#define EFI_ACPI_6_2_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0\r
2408#define EFI_ACPI_6_2_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1\r
2409\r
2410///\r
2411/// Type 1 HW-Reduced Communications Subspace Structure\r
2412///\r
2413typedef struct {\r
2414 UINT8 Type;\r
2415 UINT8 Length;\r
2416 UINT32 PlatformInterrupt;\r
2417 UINT8 PlatformInterruptFlags;\r
2418 UINT8 Reserved;\r
2419 UINT64 BaseAddress;\r
2420 UINT64 AddressLength;\r
2421 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2422 UINT64 DoorbellPreserve;\r
2423 UINT64 DoorbellWrite;\r
2424 UINT32 NominalLatency;\r
2425 UINT32 MaximumPeriodicAccessRate;\r
2426 UINT16 MinimumRequestTurnaroundTime;\r
2427} EFI_ACPI_6_2_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;\r
2428\r
2429///\r
2430/// Type 2 HW-Reduced Communications Subspace Structure\r
2431///\r
2432typedef struct {\r
2433 UINT8 Type;\r
2434 UINT8 Length;\r
2435 UINT32 PlatformInterrupt;\r
2436 UINT8 PlatformInterruptFlags;\r
2437 UINT8 Reserved;\r
2438 UINT64 BaseAddress;\r
2439 UINT64 AddressLength;\r
2440 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2441 UINT64 DoorbellPreserve;\r
2442 UINT64 DoorbellWrite;\r
2443 UINT32 NominalLatency;\r
2444 UINT32 MaximumPeriodicAccessRate;\r
2445 UINT16 MinimumRequestTurnaroundTime;\r
2446 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2447 UINT64 PlatformInterruptAckPreserve;\r
2448 UINT64 PlatformInterruptAckWrite;\r
2449} EFI_ACPI_6_2_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;\r
2450\r
2451///\r
2452/// Type 3 Extended PCC Subspace Structure\r
2453///\r
2454typedef struct {\r
2455 UINT8 Type;\r
2456 UINT8 Length;\r
2457 UINT32 PlatformInterrupt;\r
2458 UINT8 PlatformInterruptFlags;\r
2459 UINT8 Reserved;\r
2460 UINT64 BaseAddress;\r
2461 UINT32 AddressLength;\r
2462 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2463 UINT64 DoorbellPreserve;\r
2464 UINT64 DoorbellWrite;\r
2465 UINT32 NominalLatency;\r
2466 UINT32 MaximumPeriodicAccessRate;\r
2467 UINT32 MinimumRequestTurnaroundTime;\r
2468 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2469 UINT64 PlatformInterruptAckPreserve;\r
2470 UINT64 PlatformInterruptAckSet;\r
2471 UINT8 Reserved1[8];\r
2472 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;\r
2473 UINT64 CommandCompleteCheckMask;\r
2474 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister;\r
2475 UINT64 CommandCompleteUpdatePreserve;\r
2476 UINT64 CommandCompleteUpdateSet;\r
2477 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;\r
2478 UINT64 ErrorStatusMask;\r
2479} EFI_ACPI_6_2_PCCT_SUBSPACE_3_EXTENDED_PCC;\r
2480\r
2481///\r
2482/// Type 4 Extended PCC Subspace Structure\r
2483///\r
2484typedef EFI_ACPI_6_2_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_2_PCCT_SUBSPACE_4_EXTENDED_PCC;\r
2485\r
2486#define EFI_ACPI_6_2_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0\r
2487\r
2488typedef struct {\r
2489 UINT32 Signature;\r
2490 UINT32 Flags;\r
2491 UINT32 Length;\r
2492 UINT32 Command;\r
2493} EFI_ACPI_6_2_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER;\r
2494\r
2495///\r
2496/// Platform Debug Trigger Table (PDTT)\r
2497///\r
2498typedef struct {\r
2499 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2500 UINT8 TriggerCount;\r
2501 UINT8 Reserved[3];\r
2502 UINT32 TriggerIdentifierArrayOffset;\r
2503} EFI_ACPI_6_2_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER;\r
2504\r
2505///\r
2506/// PDTT Revision (as defined in ACPI 6.2 spec.)\r
2507///\r
2508#define EFI_ACPI_6_2_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00\r
2509\r
2510///\r
2511/// PDTT Platform Communication Channel Identifier Structure\r
2512///\r
2513typedef struct {\r
2514 UINT16 SubChannelIdentifer:8;\r
2515 UINT16 Runtime:1;\r
2516 UINT16 WaitForCompletion:1;\r
2517 UINT16 Reserved:6;\r
2518} EFI_ACPI_6_2_PDTT_PCC_IDENTIFIER;\r
2519\r
2520///\r
2521/// PCC Commands Codes used by Platform Debug Trigger Table\r
2522///\r
2523#define EFI_ACPI_6_2_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00\r
2524#define EFI_ACPI_6_2_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01\r
2525\r
2526///\r
2527/// PPTT Platform Communication Channel\r
2528///\r
2529typedef EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_2_PDTT_PCC;\r
2530\r
2531///\r
2532/// Processor Properties Topology Table (PPTT)\r
2533///\r
2534typedef struct {\r
2535 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2536} EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER;\r
2537\r
2538///\r
2539/// PPTT Revision (as defined in ACPI 6.2 spec.)\r
2540///\r
2541#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01\r
2542\r
2543///\r
2544/// PPTT types\r
2545///\r
2546#define EFI_ACPI_6_2_PPTT_TYPE_PROCESSOR 0x00\r
2547#define EFI_ACPI_6_2_PPTT_TYPE_CACHE 0x01\r
2548#define EFI_ACPI_6_2_PPTT_TYPE_ID 0x02\r
2549\r
2550///\r
2551/// PPTT Structure Header\r
2552///\r
2553typedef struct {\r
2554 UINT8 Type;\r
2555 UINT8 Length;\r
2556 UINT8 Reserved[2];\r
2557} EFI_ACPI_6_2_PPTT_STRUCTURE_HEADER;\r
2558\r
2559///\r
2560/// Processor hierarchy node structure flags\r
2561///\r
2562typedef struct {\r
2563 UINT32 PhysicalPackage:1;\r
2564 UINT32 AcpiProcessorIdValid:1;\r
2565 UINT32 Reserved:30;\r
2566} EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR_FLAGS;\r
2567\r
2568///\r
2569/// Processor hierarchy node structure\r
2570///\r
2571typedef struct {\r
2572 UINT32 Type;\r
2573 UINT8 Length;\r
2574 UINT8 Reserved[2];\r
2575 EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags;\r
2576 UINT32 Parent;\r
2577 UINT32 AcpiProcessorId;\r
2578 UINT32 NumberOfPrivateResources;\r
2579} EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR;\r
2580\r
2581///\r
2582/// Cache Type Structure flags\r
2583///\r
2584typedef struct {\r
2585 UINT32 SizePropertyValid:1;\r
2586 UINT32 NumberOfSetsValid:1;\r
2587 UINT32 AssociativityValid:1;\r
2588 UINT32 AllocationTypeValid:1;\r
2589 UINT32 CacheTypeValid:1;\r
2590 UINT32 WritePolicyValid:1;\r
2591 UINT32 LineSizeValid:1;\r
2592 UINT32 Reserved:25;\r
2593} EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_FLAGS;\r
2594\r
2595///\r
2596/// Cache Type Structure cache attributes\r
2597///\r
2598typedef struct {\r
2599 UINT8 AllocationType:2;\r
2600 UINT8 CacheType:2;\r
2601 UINT8 WritePolicy:1;\r
2602 UINT8 Reserved:3;\r
2603} EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_ATTRIBUTES;\r
2604\r
2605///\r
2606/// Cache Type Structure\r
2607///\r
2608typedef struct {\r
2609 UINT8 Type;\r
2610 UINT8 Length;\r
2611 UINT8 Reserved[2];\r
2612 EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_FLAGS Flags;\r
2613 UINT32 NextLevelOfCache;\r
2614 UINT32 Size;\r
2615 UINT32 NumberOfSets;\r
2616 UINT8 Associativity;\r
2617 EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes;\r
2618 UINT16 LineSize;\r
2619} EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE;\r
2620\r
2621///\r
2622/// ID structure\r
2623///\r
2624typedef struct {\r
2625 UINT8 Type;\r
2626 UINT8 Length;\r
2627 UINT8 Reserved[2];\r
2628 UINT32 VendorId;\r
2629 UINT64 Level1Id;\r
2630 UINT64 Level2Id;\r
2631 UINT16 MajorRev;\r
2632 UINT16 MinorRev;\r
2633 UINT16 SpinRev;\r
2634} EFI_ACPI_6_2_PPTT_STRUCTURE_ID;\r
2635\r
2636//\r
2637// Known table signatures\r
2638//\r
2639\r
2640///\r
2641/// "RSD PTR " Root System Description Pointer\r
2642///\r
2643#define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
2644\r
2645///\r
2646/// "APIC" Multiple APIC Description Table\r
2647///\r
2648#define EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
2649\r
2650///\r
2651/// "BERT" Boot Error Record Table\r
2652///\r
2653#define EFI_ACPI_6_2_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
2654\r
2655///\r
2656/// "BGRT" Boot Graphics Resource Table\r
2657///\r
2658#define EFI_ACPI_6_2_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
2659\r
2660///\r
2661/// "CPEP" Corrected Platform Error Polling Table\r
2662///\r
2663#define EFI_ACPI_6_2_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
2664\r
2665///\r
2666/// "DSDT" Differentiated System Description Table\r
2667///\r
2668#define EFI_ACPI_6_2_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
2669\r
2670///\r
2671/// "ECDT" Embedded Controller Boot Resources Table\r
2672///\r
2673#define EFI_ACPI_6_2_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
2674\r
2675///\r
2676/// "EINJ" Error Injection Table\r
2677///\r
2678#define EFI_ACPI_6_2_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
2679\r
2680///\r
2681/// "ERST" Error Record Serialization Table\r
2682///\r
2683#define EFI_ACPI_6_2_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
2684\r
2685///\r
2686/// "FACP" Fixed ACPI Description Table\r
2687///\r
2688#define EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
2689\r
2690///\r
2691/// "FACS" Firmware ACPI Control Structure\r
2692///\r
2693#define EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
2694\r
2695///\r
2696/// "FPDT" Firmware Performance Data Table\r
2697///\r
2698#define EFI_ACPI_6_2_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
2699\r
2700///\r
2701/// "GTDT" Generic Timer Description Table\r
2702///\r
2703#define EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
2704\r
2705///\r
2706/// "HEST" Hardware Error Source Table\r
2707///\r
2708#define EFI_ACPI_6_2_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
2709\r
2710///\r
2711/// "HMAT" Heterogeneous Memory Attribute Table\r
2712///\r
2713#define EFI_ACPI_6_2_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T')\r
2714\r
2715///\r
2716/// "MPST" Memory Power State Table\r
2717///\r
2718#define EFI_ACPI_6_2_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
2719\r
2720///\r
2721/// "MSCT" Maximum System Characteristics Table\r
2722///\r
2723#define EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
2724\r
2725///\r
2726/// "NFIT" NVDIMM Firmware Interface Table\r
2727///\r
2728#define EFI_ACPI_6_2_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T')\r
2729\r
2730///\r
2731/// "PDTT" Platform Debug Trigger Table\r
2732///\r
2733#define EFI_ACPI_6_2_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T')\r
2734\r
2735///\r
2736/// "PMTT" Platform Memory Topology Table\r
2737///\r
2738#define EFI_ACPI_6_2_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
2739\r
2740///\r
2741/// "PPTT" Processor Properties Topology Table\r
2742///\r
2743#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')\r
2744\r
2745///\r
2746/// "PSDT" Persistent System Description Table\r
2747///\r
2748#define EFI_ACPI_6_2_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
2749\r
2750///\r
2751/// "RASF" ACPI RAS Feature Table\r
2752///\r
2753#define EFI_ACPI_6_2_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
2754\r
2755///\r
2756/// "RSDT" Root System Description Table\r
2757///\r
2758#define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
2759\r
2760///\r
2761/// "SBST" Smart Battery Specification Table\r
2762///\r
2763#define EFI_ACPI_6_2_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
2764\r
2765///\r
2766/// "SDEV" Secure DEVices Table\r
2767///\r
2768#define EFI_ACPI_6_2_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V')\r
2769\r
2770///\r
2771/// "SLIT" System Locality Information Table\r
2772///\r
2773#define EFI_ACPI_6_2_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
2774\r
2775///\r
2776/// "SRAT" System Resource Affinity Table\r
2777///\r
2778#define EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
2779\r
2780///\r
2781/// "SSDT" Secondary System Description Table\r
2782///\r
2783#define EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
2784\r
2785///\r
2786/// "XSDT" Extended System Description Table\r
2787///\r
2788#define EFI_ACPI_6_2_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
2789\r
2790///\r
2791/// "BOOT" MS Simple Boot Spec\r
2792///\r
2793#define EFI_ACPI_6_2_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
2794\r
2795///\r
2796/// "CSRT" MS Core System Resource Table\r
2797///\r
2798#define EFI_ACPI_6_2_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2799\r
2800///\r
2801/// "DBG2" MS Debug Port 2 Spec\r
2802///\r
2803#define EFI_ACPI_6_2_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
2804\r
2805///\r
2806/// "DBGP" MS Debug Port Spec\r
2807///\r
2808#define EFI_ACPI_6_2_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
2809\r
2810///\r
2811/// "DMAR" DMA Remapping Table\r
2812///\r
2813#define EFI_ACPI_6_2_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
2814\r
2815///\r
2816/// "DPPT" DMA Protection Policy Table\r
2817///\r
2818#define EFI_ACPI_6_2_DMA_PROTECTION_POLICY_TABLE_SIGNATURE SIGNATURE_32('D', 'P', 'P', 'T')\r
2819\r
2820///\r
2821/// "DRTM" Dynamic Root of Trust for Measurement Table\r
2822///\r
2823#define EFI_ACPI_6_2_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
2824\r
2825///\r
2826/// "ETDT" Event Timer Description Table\r
2827///\r
2828#define EFI_ACPI_6_2_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
2829\r
2830///\r
2831/// "HPET" IA-PC High Precision Event Timer Table\r
2832///\r
2833#define EFI_ACPI_6_2_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
2834\r
2835///\r
2836/// "iBFT" iSCSI Boot Firmware Table\r
2837///\r
2838#define EFI_ACPI_6_2_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
2839\r
2840///\r
2841/// "IORT" I/O Remapping Table\r
2842///\r
2843#define EFI_ACPI_6_2_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T')\r
2844\r
2845///\r
2846/// "IVRS" I/O Virtualization Reporting Structure\r
2847///\r
2848#define EFI_ACPI_6_2_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
2849\r
2850///\r
2851/// "LPIT" Low Power Idle Table\r
2852///\r
2853#define EFI_ACPI_6_2_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')\r
2854\r
2855///\r
2856/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
2857///\r
2858#define EFI_ACPI_6_2_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
2859\r
2860///\r
2861/// "MCHI" Management Controller Host Interface Table\r
2862///\r
2863#define EFI_ACPI_6_2_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
2864\r
2865///\r
2866/// "MSDM" MS Data Management Table\r
2867///\r
2868#define EFI_ACPI_6_2_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
2869\r
2870///\r
2871/// "SDEI" Software Delegated Exceptions Interface Table\r
2872///\r
2873#define EFI_ACPI_6_2_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I')\r
2874\r
2875///\r
2876/// "SLIC" MS Software Licensing Table Specification\r
2877///\r
2878#define EFI_ACPI_6_2_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
2879\r
2880///\r
2881/// "SPCR" Serial Port Concole Redirection Table\r
2882///\r
2883#define EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
2884\r
2885///\r
2886/// "SPMI" Server Platform Management Interface Table\r
2887///\r
2888#define EFI_ACPI_6_2_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
2889\r
2890///\r
2891/// "STAO" _STA Override Table\r
2892///\r
2893#define EFI_ACPI_6_2_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O')\r
2894\r
2895///\r
2896/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
2897///\r
2898#define EFI_ACPI_6_2_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
2899\r
2900///\r
2901/// "TPM2" Trusted Computing Platform 1 Table\r
2902///\r
2903#define EFI_ACPI_6_2_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
2904\r
2905///\r
2906/// "UEFI" UEFI ACPI Data Table\r
2907///\r
2908#define EFI_ACPI_6_2_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
2909\r
2910///\r
2911/// "WAET" Windows ACPI Emulated Devices Table\r
2912///\r
2913#define EFI_ACPI_6_2_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
2914\r
2915///\r
2916/// "WDAT" Watchdog Action Table\r
2917///\r
2918#define EFI_ACPI_6_2_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
2919\r
2920///\r
2921/// "WDRT" Watchdog Resource Table\r
2922///\r
2923#define EFI_ACPI_6_2_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
2924\r
2925///\r
2926/// "WPBT" MS Platform Binary Table\r
2927///\r
2928#define EFI_ACPI_6_2_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
2929\r
2930///\r
2931/// "WSMT" Windows SMM Security Mitigation Table\r
2932///\r
2933#define EFI_ACPI_6_2_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T')\r
2934\r
2935///\r
2936/// "XENV" Xen Project Table\r
2937///\r
2938#define EFI_ACPI_6_2_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V')\r
2939\r
2940#pragma pack()\r
2941\r
2942#endif\r
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