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1 | /** @file\r | |
2 | \r | |
3 | PCH SPI SMM Driver implements the SPI Host Controller Compatibility Interface.\r | |
4 | \r | |
5 | Copyright (c) 2013-2015 Intel Corporation.\r | |
6 | \r | |
7 | This program and the accompanying materials\r | |
8 | are licensed and made available under the terms and conditions of the BSD License\r | |
9 | which accompanies this distribution. The full text of the license may be found at\r | |
10 | http://opensource.org/licenses/bsd-license.php\r | |
11 | \r | |
12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
14 | \r | |
15 | \r | |
16 | **/\r | |
17 | #include "PchSpi.h"\r | |
18 | \r | |
19 | SPI_INSTANCE *mSpiInstance;\r | |
20 | \r | |
21 | CONST UINT32 mSpiRegister[] = {\r | |
22 | R_QNC_RCRB_SPIS,\r | |
23 | R_QNC_RCRB_SPIPREOP,\r | |
24 | R_QNC_RCRB_SPIOPMENU,\r | |
25 | R_QNC_RCRB_SPIOPMENU + 4\r | |
26 | };\r | |
27 | \r | |
28 | EFI_STATUS\r | |
29 | EFIAPI\r | |
30 | InstallPchSpi (\r | |
31 | IN EFI_HANDLE ImageHandle,\r | |
32 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
33 | )\r | |
34 | /*++\r | |
35 | \r | |
36 | Routine Description:\r | |
37 | \r | |
38 | Entry point for the SPI host controller driver.\r | |
39 | \r | |
40 | Arguments:\r | |
41 | \r | |
42 | ImageHandle Image handle of this driver.\r | |
43 | SystemTable Global system service table.\r | |
44 | \r | |
45 | Returns:\r | |
46 | \r | |
47 | EFI_SUCCESS Initialization complete.\r | |
48 | EFI_UNSUPPORTED The chipset is unsupported by this driver.\r | |
49 | EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver.\r | |
50 | EFI_DEVICE_ERROR Device error, driver exits abnormally.\r | |
51 | \r | |
52 | --*/\r | |
53 | {\r | |
54 | EFI_STATUS Status;\r | |
55 | \r | |
56 | //\r | |
57 | // Allocate pool for SPI protocol instance\r | |
58 | //\r | |
59 | Status = gSmst->SmmAllocatePool (\r | |
60 | EfiRuntimeServicesData, // MemoryType don't care\r | |
61 | sizeof (SPI_INSTANCE),\r | |
62 | (VOID **) &mSpiInstance\r | |
63 | );\r | |
64 | if (EFI_ERROR (Status)) {\r | |
65 | return Status;\r | |
66 | }\r | |
67 | if (mSpiInstance == NULL) {\r | |
68 | return EFI_OUT_OF_RESOURCES;\r | |
69 | }\r | |
70 | ZeroMem ((VOID *) mSpiInstance, sizeof (SPI_INSTANCE));\r | |
71 | //\r | |
72 | // Initialize the SPI protocol instance\r | |
73 | //\r | |
74 | Status = SpiProtocolConstructor (mSpiInstance);\r | |
75 | if (EFI_ERROR (Status)) {\r | |
76 | return Status;\r | |
77 | }\r | |
78 | \r | |
79 | //\r | |
80 | // Install the SMM EFI_SPI_PROTOCOL interface\r | |
81 | //\r | |
82 | Status = gSmst->SmmInstallProtocolInterface (\r | |
83 | &(mSpiInstance->Handle),\r | |
84 | &gEfiSmmSpiProtocolGuid,\r | |
85 | EFI_NATIVE_INTERFACE,\r | |
86 | &(mSpiInstance->SpiProtocol)\r | |
87 | );\r | |
88 | if (EFI_ERROR (Status)) {\r | |
89 | gSmst->SmmFreePool (mSpiInstance);\r | |
90 | return EFI_DEVICE_ERROR;\r | |
91 | }\r | |
92 | \r | |
93 | return EFI_SUCCESS;\r | |
94 | }\r | |
95 | \r | |
96 | VOID\r | |
97 | EFIAPI\r | |
98 | SpiPhaseInit (\r | |
99 | VOID\r | |
100 | )\r | |
101 | /*++\r | |
102 | Routine Description:\r | |
103 | \r | |
104 | This function is a a hook for Spi Smm phase specific initialization\r | |
105 | \r | |
106 | Arguments:\r | |
107 | \r | |
108 | None\r | |
109 | \r | |
110 | Returns:\r | |
111 | \r | |
112 | None\r | |
113 | \r | |
114 | --*/\r | |
115 | {\r | |
116 | UINTN Index;\r | |
117 | \r | |
118 | //\r | |
119 | // Save SPI Registers for S3 resume usage\r | |
120 | //\r | |
121 | for (Index = 0; Index < sizeof (mSpiRegister) / sizeof (UINT32); Index++) {\r | |
122 | S3BootScriptSaveMemWrite (\r | |
123 | S3BootScriptWidthUint32,\r | |
124 | (UINTN) (mSpiInstance->PchRootComplexBar + mSpiRegister[Index]),\r | |
125 | 1,\r | |
126 | (VOID *) (UINTN) (mSpiInstance->PchRootComplexBar + mSpiRegister[Index])\r | |
127 | );\r | |
128 | }\r | |
129 | }\r |