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1 | /** @file\r | |
2 | MM Core data.\r | |
3 | \r | |
4 | Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r | |
5 | Copyright (c) 2018, ARM Limited. All rights reserved.<BR>\r | |
6 | This program and the accompanying materials are licensed and made available under\r | |
7 | the terms and conditions of the BSD License that accompanies this distribution.\r | |
8 | The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php.\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | #ifndef __MM_CORE_DATA_H__\r | |
17 | #define __MM_CORE_DATA_H__\r | |
18 | \r | |
19 | #define MM_CORE_DATA_HOB_GUID \\r | |
20 | { 0xa160bf99, 0x2aa4, 0x4d7d, { 0x99, 0x93, 0x89, 0x9c, 0xb1, 0x2d, 0xf3, 0x76 }}\r | |
21 | \r | |
22 | extern EFI_GUID gMmCoreDataHobGuid;\r | |
23 | \r | |
24 | typedef struct {\r | |
25 | //\r | |
26 | // Address pointer to MM_CORE_PRIVATE_DATA\r | |
27 | //\r | |
28 | EFI_PHYSICAL_ADDRESS Address;\r | |
29 | } MM_CORE_DATA_HOB_DATA;\r | |
30 | \r | |
31 | \r | |
32 | ///\r | |
33 | /// Define values for the communications buffer used when gEfiEventDxeDispatchGuid is\r | |
34 | /// event signaled. This event is signaled by the DXE Core each time the DXE Core\r | |
35 | /// dispatcher has completed its work. When this event is signaled, the MM Core\r | |
36 | /// if notified, so the MM Core can dispatch MM drivers. If COMM_BUFFER_MM_DISPATCH_ERROR\r | |
37 | /// is returned in the communication buffer, then an error occurred dispatching MM\r | |
38 | /// Drivers. If COMM_BUFFER_MM_DISPATCH_SUCCESS is returned, then the MM Core\r | |
39 | /// dispatched all the drivers it could. If COMM_BUFFER_MM_DISPATCH_RESTART is\r | |
40 | /// returned, then the MM Core just dispatched the MM Driver that registered\r | |
41 | /// the MM Entry Point enabling the use of MM Mode. In this case, the MM Core\r | |
42 | /// should be notified again to dispatch more MM Drivers using MM Mode.\r | |
43 | ///\r | |
44 | #define COMM_BUFFER_MM_DISPATCH_ERROR 0x00\r | |
45 | #define COMM_BUFFER_MM_DISPATCH_SUCCESS 0x01\r | |
46 | #define COMM_BUFFER_MM_DISPATCH_RESTART 0x02\r | |
47 | \r | |
48 | ///\r | |
49 | /// Signature for the private structure shared between the MM IPL and the MM Core\r | |
50 | ///\r | |
51 | #define MM_CORE_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('m', 'm', 'i', 'c')\r | |
52 | \r | |
53 | ///\r | |
54 | /// Private structure that is used to share information between the MM IPL and\r | |
55 | /// the MM Core. This structure is allocated from memory of type EfiRuntimeServicesData.\r | |
56 | /// Since runtime memory types are converted to available memory when a legacy boot\r | |
57 | /// is performed, the MM Core must not access any fields of this structure if a legacy\r | |
58 | /// boot is performed. As a result, the MM IPL must create an event notification\r | |
59 | /// for the Legacy Boot event and notify the MM Core that a legacy boot is being\r | |
60 | /// performed. The MM Core can then use this information to filter accesses to\r | |
61 | /// thos structure.\r | |
62 | ///\r | |
63 | typedef struct {\r | |
64 | UINT64 Signature;\r | |
65 | \r | |
66 | ///\r | |
67 | /// The number of MMRAM ranges passed from the MM IPL to the MM Core. The MM\r | |
68 | /// Core uses these ranges of MMRAM to initialize the MM Core memory manager.\r | |
69 | ///\r | |
70 | UINT64 MmramRangeCount;\r | |
71 | \r | |
72 | ///\r | |
73 | /// A table of MMRAM ranges passed from the MM IPL to the MM Core. The MM\r | |
74 | /// Core uses these ranges of MMRAM to initialize the MM Core memory manager.\r | |
75 | ///\r | |
76 | EFI_PHYSICAL_ADDRESS MmramRanges;\r | |
77 | \r | |
78 | ///\r | |
79 | /// The MM Foundation Entry Point. The MM Core fills in this field when the\r | |
80 | /// MM Core is initialized. The MM IPL is responsbile for registering this entry\r | |
81 | /// point with the MM Configuration Protocol. The MM Configuration Protocol may\r | |
82 | /// not be available at the time the MM IPL and MM Core are started, so the MM IPL\r | |
83 | /// sets up a protocol notification on the MM Configuration Protocol and registers\r | |
84 | /// the MM Foundation Entry Point as soon as the MM Configuration Protocol is\r | |
85 | /// available.\r | |
86 | ///\r | |
87 | EFI_PHYSICAL_ADDRESS MmEntryPoint;\r | |
88 | \r | |
89 | ///\r | |
90 | /// Boolean flag set to TRUE while an MMI is being processed by the MM Core.\r | |
91 | ///\r | |
92 | BOOLEAN MmEntryPointRegistered;\r | |
93 | \r | |
94 | ///\r | |
95 | /// Boolean flag set to TRUE while an MMI is being processed by the MM Core.\r | |
96 | ///\r | |
97 | BOOLEAN InMm;\r | |
98 | \r | |
99 | ///\r | |
100 | /// This field is set by the MM Core then the MM Core is initialized. This field is\r | |
101 | /// used by the MM Base 2 Protocol and MM Communication Protocol implementations in\r | |
102 | /// the MM IPL.\r | |
103 | ///\r | |
104 | EFI_PHYSICAL_ADDRESS Mmst;\r | |
105 | \r | |
106 | ///\r | |
107 | /// This field is used by the MM Communicatioon Protocol to pass a buffer into\r | |
108 | /// a software MMI handler and for the software MMI handler to pass a buffer back to\r | |
109 | /// the caller of the MM Communication Protocol.\r | |
110 | ///\r | |
111 | EFI_PHYSICAL_ADDRESS CommunicationBuffer;\r | |
112 | \r | |
113 | ///\r | |
114 | /// This field is used by the MM Communicatioon Protocol to pass the size of a buffer,\r | |
115 | /// in bytes, into a software MMI handler and for the software MMI handler to pass the\r | |
116 | /// size, in bytes, of a buffer back to the caller of the MM Communication Protocol.\r | |
117 | ///\r | |
118 | UINT64 BufferSize;\r | |
119 | \r | |
120 | ///\r | |
121 | /// This field is used by the MM Communication Protocol to pass the return status from\r | |
122 | /// a software MMI handler back to the caller of the MM Communication Protocol.\r | |
123 | ///\r | |
124 | UINT64 ReturnStatus;\r | |
125 | \r | |
126 | EFI_PHYSICAL_ADDRESS MmCoreImageBase;\r | |
127 | UINT64 MmCoreImageSize;\r | |
128 | EFI_PHYSICAL_ADDRESS MmCoreEntryPoint;\r | |
129 | \r | |
130 | EFI_PHYSICAL_ADDRESS StandaloneBfvAddress;\r | |
131 | } MM_CORE_PRIVATE_DATA;\r | |
132 | \r | |
133 | #endif\r |