Update to use DEBUG/RELEASE properly in DSC now tools have been fixed. Add VectorBase...
[mirror_edk2.git] / ArmEbPkg / Include / ArmEbUart.h
1 /*++
2
3 Copyright (c) 2006 - 2009, Intel Corporation
4 Portions copyright (c) 2009, Hewlett-Packard Company
5 Portions copyright (c) 2010, Apple, Inc. All rights reserved.
6 All rights reserved. This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 --*/
15
16 #ifndef __ARM_EB_UART_H__
17 #define __ARM_EB_UART_H__
18
19
20 #define SERIAL_PORT_MAX_TIMEOUT 100000000 // 100 seconds
21
22
23 // EB constants
24 #define EB_UART1_BASE 0x10009000
25
26 // PL011 Registers
27 #define UARTDR 0x000
28 #define UARTRSR 0x004
29 #define UARTECR 0x004
30 #define UARTFR 0x018
31 #define UARTILPR 0x020
32 #define UARTIBRD 0x024
33 #define UARTFBRD 0x028
34 #define UARTLCR_H 0x02C
35 #define UARTCR 0x030
36 #define UARTIFLS 0x034
37 #define UARTIMSC 0x038
38 #define UARTRIS 0x03C
39 #define UARTMIS 0x040
40 #define UARTICR 0x044
41 #define UARTDMACR 0x048
42
43 // If the required baud rate is 115200 and UARTCLK = 24MHz then:
44 // Baud Rate Divisor = (24×10^6)/(16×115200) = 13.020833
45 // This means BRDI = 13 and BRDF = 0.020833
46 // Therefore, fractional part, m = integer(0.020833×64) = integer(1.33331) = 1
47 // Generated baud rate divider = 13+1/64 = 13.015625
48 // Generated baud rate = (24×10^6)/(16×13.015625) = 115246.098
49 // Error = (115246.098-115200)/115200 × 100 = 0.04%
50 #define UART_115200_IDIV 13
51 #define UART_115200_FDIV 1
52
53 // add more baud rates here as needed
54
55 // data status bits
56 #define UART_DATA_ERROR_MASK 0x0F00
57
58 // status reg bits
59 #define UART_STATUS_ERROR_MASK 0x0F
60
61 // flag reg bits
62 #define UART_TX_EMPTY_FLAG_MASK 0x80
63 #define UART_RX_FULL_FLAG_MASK 0x40
64 #define UART_TX_FULL_FLAG_MASK 0x20
65 #define UART_RX_EMPTY_FLAG_MASK 0x10
66 #define UART_BUSY_FLAG_MASK 0x08
67
68 // control reg bits
69 #define UART_CTSEN_CONTROL_MASK 0x8000
70 #define UART_RTSEN_CONTROL_MASK 0x4000
71 #define UART_RTS_CONTROL_MASK 0x0800
72 #define UART_DTR_CONTROL_MASK 0x0400
73
74
75 #endif