Update for NetworkPkg.
[mirror_edk2.git] / ArmPkg / ArmPkg.dec
1 #/** @file
2 # ARM processor package.
3 #
4 # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
5 # Copyright (c) 2011, ARM Limited. All rights reserved.
6 #
7 # This program and the accompanying materials
8 # are licensed and made available under the terms and conditions of the BSD License
9 # which accompanies this distribution. The full text of the license may be found at
10 # http://opensource.org/licenses/bsd-license.php
11 #
12 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14 #
15 #**/
16
17 [Defines]
18 DEC_SPECIFICATION = 0x00010005
19 PACKAGE_NAME = ArmPkg
20 PACKAGE_GUID = 5CFBD99E-3C43-4E7F-8054-9CDEAFF7710F
21 PACKAGE_VERSION = 0.1
22
23 ################################################################################
24 #
25 # Include Section - list of Include Paths that are provided by this package.
26 # Comments are used for Keywords and Module Types.
27 #
28 # Supported Module Types:
29 # BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
30 #
31 ################################################################################
32 [Includes.common]
33 Include # Root include for the package
34
35 [LibraryClasses.common]
36 ArmLib|Include/Library/ArmLib.h
37 SemihostLib|Include/Library/Semihosting.h
38 UncachedMemoryAllocationLib|Include/Library/UncachedMemoryAllocationLib.h
39 DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h
40 ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h
41
42 [Guids.common]
43 gArmTokenSpaceGuid = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } }
44
45 ## ARM MPCore table
46 # Include/Guid/ArmMpCoreInfo.h
47 gArmMpCoreInfoGuid = { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }
48
49 [Ppis]
50 ## Include/Ppi/ArmMpCoreInfo.h
51 gArmMpCoreInfoPpiGuid = { 0x6847cc74, 0xe9ec, 0x4f8f, {0xa2, 0x9d, 0xab, 0x44, 0xe7, 0x54, 0xa8, 0xfc} }
52
53 [Protocols.common]
54 gVirtualUncachedPagesProtocolGuid = { 0xAD651C7D, 0x3C22, 0x4DBF, { 0x92, 0xe8, 0x38, 0xa7, 0xcd, 0xae, 0x87, 0xb2 } }
55
56 [PcdsFeatureFlag.common]
57 gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE|BOOLEAN|0x00000001
58
59 # On ARM Architecture with the Security Extension, the address for the
60 # Vector Table can be mapped anywhere in the memory map. It means we can
61 # point the Exception Vector Table to its location in CpuDxe.
62 # By default we copy the Vector Table at PcdGet32(PcdCpuVectorBaseAddress)
63 gArmTokenSpaceGuid.PcdRelocateVectorTable|TRUE|BOOLEAN|0x00000022
64 # Set this PCD to TRUE if the Exception Vector is changed to add debugger support before
65 # it has been configured by the CPU DXE
66 gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x00000032
67
68 gArmTokenSpaceGuid.PcdEfiUncachedMemoryToStronglyOrdered|FALSE|BOOLEAN|0x00000025
69
70 [PcdsFixedAtBuild.common]
71 gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x00000006
72
73 # This PCD should be a FeaturePcd. But we used this PCD as an '#if' in an ASM file.
74 # Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.
75 gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024
76
77 gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000080000000|UINT64|0x00000002
78 gArmTokenSpaceGuid.PcdArmCacheOperationThreshold|1024|UINT32|0x00000003
79 gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT32|0x00000004
80 gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005
81
82 #
83 # ARM PL390 General Interrupt Controller
84 #
85 gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C
86 gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D
87 gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023
88
89 #
90 # ARM Secure Firmware PCDs
91 #
92 gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015
93 gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016
94 gArmTokenSpaceGuid.PcdSecureFvBaseAddress|0x0|UINT32|0x0000002F
95 gArmTokenSpaceGuid.PcdSecureFvSize|0x0|UINT32|0x00000030
96
97 #
98 # ARM Normal (or Non Secure) Firmware PCDs
99 #
100 gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT32|0x0000002B
101 gArmTokenSpaceGuid.PcdFdSize|0|UINT32|0x0000002C
102 gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT32|0x0000002D
103 gArmTokenSpaceGuid.PcdFvSize|0|UINT32|0x0000002E
104
105 #
106 # ARM Security Extension
107 #
108
109 # Secure Configuration Register
110 # - BIT0 : NS - Non Secure bit
111 # - BIT1 : IRQ Handler
112 # - BIT2 : FIQ Handler
113 # - BIT3 : EA - External Abort
114 # - BIT4 : FW - F bit writable
115 # - BIT5 : AW - A bit writable
116 # - BIT6 : nET - Not Early Termination
117 # - BIT7 : SCD - Secure Monitor Call Disable
118 # - BIT8 : HCE - Hyp Call enable
119 # - BIT9 : SIF - Secure Instruction Fetch
120 # 0x31 = NS | EA | FW
121 gArmTokenSpaceGuid.PcdArmScr|0x31|UINT32|0x00000038
122
123 # Non Secure Access Control Register
124 # - BIT15 : NSASEDIS - Disable Non-secure Advanced SIMD functionality
125 # - BIT14 : NSD32DIS - Disable Non-secure use of D16-D31
126 # - BIT11 : cp11 - Non-secure access to coprocessor 11 enable
127 # - BIT10 : cp10 - Non-secure access to coprocessor 10 enable
128 # 0xC00 = cp10 | cp11
129 gArmTokenSpaceGuid.PcdArmNsacr|0xC00|UINT32|0x00000039
130
131 gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x0|UINT32|0x0000003E
132
133 # System Memory (DRAM): These PCDs define the region of in-built system memory
134 # Some platforms can get DRAM extensions, these additional regions will be declared
135 # to UEFI by ArmPLatformPlib
136 gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT32|0x00000029
137 gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT32|0x0000002A
138
139 # Use ClusterId + CoreId to identify the PrimaryCore
140 gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0xF03|UINT32|0x00000031
141 # The Primary Core is ClusterId[0] & CoreId[0]
142 gArmTokenSpaceGuid.PcdArmPrimaryCore|0|UINT32|0x00000037
143
144 #
145 # ARM L2x0 PCDs
146 #
147 gArmTokenSpaceGuid.PcdL2x0ControllerBase|0|UINT32|0x0000001B
148
149 #
150 # ARM PL390 General Interrupt Controller
151 #
152 gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000001C
153 gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000001D
154
155 #
156 # BdsLib
157 #
158 gArmTokenSpaceGuid.PcdArmMachineType|0|UINT32|0x0000001E
159 # The compressed Linux kernel is expected to be under 128MB from the beginning of the System Memory
160 gArmTokenSpaceGuid.PcdArmLinuxKernelMaxOffset|0x08000000|UINT32|0x0000001F
161 # The Linux ATAGs are expected to be under 0x4000 (16KB) from the beginning of the System Memory
162 gArmTokenSpaceGuid.PcdArmLinuxAtagMaxOffset|0x4000|UINT32|0x00000020
163
164 #
165 # ARM Architectural Timer
166 #
167 gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0|UINT32|0x00000034
168 # ARM Architectural Timer Interrupt(GIC PPI) number
169 gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|29|UINT32|0x00000035
170 gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|30|UINT32|0x00000036