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ArmPkg/CpuDxe: handle implied attributes in EfiAttributeToArmAttribute
[mirror_edk2.git] / ArmPkg / Drivers / CpuDxe / AArch64 / Mmu.c
1 /*++
2
3 Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
4 Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
5 Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>
6 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
7
8 This program and the accompanying materials
9 are licensed and made available under the terms and conditions of the BSD License
10 which accompanies this distribution. The full text of the license may be found at
11 http://opensource.org/licenses/bsd-license.php
12
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15
16
17 --*/
18
19 #include <Library/MemoryAllocationLib.h>
20 #include "CpuDxe.h"
21
22 #define TT_ATTR_INDX_INVALID ((UINT32)~0)
23
24 STATIC
25 UINT64
26 GetFirstPageAttribute (
27 IN UINT64 *FirstLevelTableAddress,
28 IN UINTN TableLevel
29 )
30 {
31 UINT64 FirstEntry;
32
33 // Get the first entry of the table
34 FirstEntry = *FirstLevelTableAddress;
35
36 if ((TableLevel != 3) && (FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {
37 // Only valid for Levels 0, 1 and 2
38
39 // Get the attribute of the subsequent table
40 return GetFirstPageAttribute ((UINT64*)(FirstEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), TableLevel + 1);
41 } else if (((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) ||
42 ((TableLevel == 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3)))
43 {
44 return FirstEntry & TT_ATTR_INDX_MASK;
45 } else {
46 return TT_ATTR_INDX_INVALID;
47 }
48 }
49
50 STATIC
51 UINT64
52 GetNextEntryAttribute (
53 IN UINT64 *TableAddress,
54 IN UINTN EntryCount,
55 IN UINTN TableLevel,
56 IN UINT64 BaseAddress,
57 IN OUT UINT32 *PrevEntryAttribute,
58 IN OUT UINT64 *StartGcdRegion
59 )
60 {
61 UINTN Index;
62 UINT64 Entry;
63 UINT32 EntryAttribute;
64 UINT32 EntryType;
65 EFI_STATUS Status;
66 UINTN NumberOfDescriptors;
67 EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
68
69 // Get the memory space map from GCD
70 MemorySpaceMap = NULL;
71 Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
72 ASSERT_EFI_ERROR (Status);
73
74 // We cannot get more than 3-level page table
75 ASSERT (TableLevel <= 3);
76
77 // While the top level table might not contain TT_ENTRY_COUNT entries;
78 // the subsequent ones should be filled up
79 for (Index = 0; Index < EntryCount; Index++) {
80 Entry = TableAddress[Index];
81 EntryType = Entry & TT_TYPE_MASK;
82 EntryAttribute = Entry & TT_ATTR_INDX_MASK;
83
84 // If Entry is a Table Descriptor type entry then go through the sub-level table
85 if ((EntryType == TT_TYPE_BLOCK_ENTRY) ||
86 ((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3))) {
87 if ((*PrevEntryAttribute == TT_ATTR_INDX_INVALID) || (EntryAttribute != *PrevEntryAttribute)) {
88 if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {
89 // Update GCD with the last region
90 SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
91 *StartGcdRegion,
92 (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,
93 PageAttributeToGcdAttribute (*PrevEntryAttribute));
94 }
95
96 // Start of the new region
97 *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));
98 *PrevEntryAttribute = EntryAttribute;
99 } else {
100 continue;
101 }
102 } else if (EntryType == TT_TYPE_TABLE_ENTRY) {
103 // Table Entry type is only valid for Level 0, 1, 2
104 ASSERT (TableLevel < 3);
105
106 // Increase the level number and scan the sub-level table
107 GetNextEntryAttribute ((UINT64*)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE),
108 TT_ENTRY_COUNT, TableLevel + 1,
109 (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))),
110 PrevEntryAttribute, StartGcdRegion);
111 } else {
112 if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {
113 // Update GCD with the last region
114 SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
115 *StartGcdRegion,
116 (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,
117 PageAttributeToGcdAttribute (*PrevEntryAttribute));
118
119 // Start of the new region
120 *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));
121 *PrevEntryAttribute = TT_ATTR_INDX_INVALID;
122 }
123 }
124 }
125
126 FreePool (MemorySpaceMap);
127
128 return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL(TableLevel));
129 }
130
131 EFI_STATUS
132 SyncCacheConfig (
133 IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
134 )
135 {
136 EFI_STATUS Status;
137 UINT32 PageAttribute = 0;
138 UINT64 *FirstLevelTableAddress;
139 UINTN TableLevel;
140 UINTN TableCount;
141 UINTN NumberOfDescriptors;
142 EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
143 UINTN Tcr;
144 UINTN T0SZ;
145 UINT64 BaseAddressGcdRegion;
146 UINT64 EndAddressGcdRegion;
147
148 // This code assumes MMU is enabled and filed with section translations
149 ASSERT (ArmMmuEnabled ());
150
151 //
152 // Get the memory space map from GCD
153 //
154 MemorySpaceMap = NULL;
155 Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
156 ASSERT_EFI_ERROR (Status);
157
158 // The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs
159 // to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a
160 // GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were
161 // a client) to update its copy of the attributes. This is bad architecture and should be replaced
162 // with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead.
163
164 // Obtain page table base
165 FirstLevelTableAddress = (UINT64*)(ArmGetTTBR0BaseAddress ());
166
167 // Get Translation Control Register value
168 Tcr = ArmGetTCR ();
169 // Get Address Region Size
170 T0SZ = Tcr & TCR_T0SZ_MASK;
171
172 // Get the level of the first table for the indicated Address Region Size
173 GetRootTranslationTableInfo (T0SZ, &TableLevel, &TableCount);
174
175 // First Attribute of the Page Tables
176 PageAttribute = GetFirstPageAttribute (FirstLevelTableAddress, TableLevel);
177
178 // We scan from the start of the memory map (ie: at the address 0x0)
179 BaseAddressGcdRegion = 0x0;
180 EndAddressGcdRegion = GetNextEntryAttribute (FirstLevelTableAddress,
181 TableCount, TableLevel,
182 BaseAddressGcdRegion,
183 &PageAttribute, &BaseAddressGcdRegion);
184
185 // Update GCD with the last region if valid
186 if (PageAttribute != TT_ATTR_INDX_INVALID) {
187 SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
188 BaseAddressGcdRegion,
189 EndAddressGcdRegion - BaseAddressGcdRegion,
190 PageAttributeToGcdAttribute (PageAttribute));
191 }
192
193 FreePool (MemorySpaceMap);
194
195 return EFI_SUCCESS;
196 }
197
198 UINT64
199 EfiAttributeToArmAttribute (
200 IN UINT64 EfiAttributes
201 )
202 {
203 UINT64 ArmAttributes;
204
205 switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {
206 case EFI_MEMORY_UC:
207 if (ArmReadCurrentEL () == AARCH64_EL2) {
208 ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;
209 } else {
210 ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
211 }
212 break;
213 case EFI_MEMORY_WC:
214 ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
215 break;
216 case EFI_MEMORY_WT:
217 ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;
218 break;
219 case EFI_MEMORY_WB:
220 ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;
221 break;
222 default:
223 ArmAttributes = TT_ATTR_INDX_MASK;
224 }
225
226 // Set the access flag to match the block attributes
227 ArmAttributes |= TT_AF;
228
229 // Determine protection attributes
230 if (EfiAttributes & EFI_MEMORY_RO) {
231 ArmAttributes |= TT_AP_RO_RO;
232 }
233
234 // Process eXecute Never attribute
235 if (EfiAttributes & EFI_MEMORY_XP) {
236 ArmAttributes |= TT_PXN_MASK;
237 }
238
239 return ArmAttributes;
240 }
241
242 // This function will recursively go down the page table to find the first block address linked to 'BaseAddress'.
243 // And then the function will identify the size of the region that has the same page table attribute.
244 EFI_STATUS
245 GetMemoryRegionRec (
246 IN UINT64 *TranslationTable,
247 IN UINTN TableLevel,
248 IN UINT64 *LastBlockEntry,
249 IN OUT UINTN *BaseAddress,
250 OUT UINTN *RegionLength,
251 OUT UINTN *RegionAttributes
252 )
253 {
254 EFI_STATUS Status;
255 UINT64 *NextTranslationTable;
256 UINT64 *BlockEntry;
257 UINT64 BlockEntryType;
258 UINT64 EntryType;
259
260 if (TableLevel != 3) {
261 BlockEntryType = TT_TYPE_BLOCK_ENTRY;
262 } else {
263 BlockEntryType = TT_TYPE_BLOCK_ENTRY_LEVEL3;
264 }
265
266 // Find the block entry linked to the Base Address
267 BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress);
268 EntryType = *BlockEntry & TT_TYPE_MASK;
269
270 if ((TableLevel < 3) && (EntryType == TT_TYPE_TABLE_ENTRY)) {
271 NextTranslationTable = (UINT64*)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);
272
273 // The entry is a page table, so we go to the next level
274 Status = GetMemoryRegionRec (
275 NextTranslationTable, // Address of the next level page table
276 TableLevel + 1, // Next Page Table level
277 (UINTN*)TT_LAST_BLOCK_ADDRESS(NextTranslationTable, TT_ENTRY_COUNT),
278 BaseAddress, RegionLength, RegionAttributes);
279
280 // In case of 'Success', it means the end of the block region has been found into the upper
281 // level translation table
282 if (!EFI_ERROR(Status)) {
283 return EFI_SUCCESS;
284 }
285
286 // Now we processed the table move to the next entry
287 BlockEntry++;
288 } else if (EntryType == BlockEntryType) {
289 // We have found the BlockEntry attached to the address. We save its start address (the start
290 // address might be before the 'BaseAdress') and attributes
291 *BaseAddress = *BaseAddress & ~(TT_ADDRESS_AT_LEVEL(TableLevel) - 1);
292 *RegionLength = 0;
293 *RegionAttributes = *BlockEntry & TT_ATTRIBUTES_MASK;
294 } else {
295 // We have an 'Invalid' entry
296 return EFI_UNSUPPORTED;
297 }
298
299 while (BlockEntry <= LastBlockEntry) {
300 if ((*BlockEntry & TT_ATTRIBUTES_MASK) == *RegionAttributes) {
301 *RegionLength = *RegionLength + TT_BLOCK_ENTRY_SIZE_AT_LEVEL(TableLevel);
302 } else {
303 // In case we have found the end of the region we return success
304 return EFI_SUCCESS;
305 }
306 BlockEntry++;
307 }
308
309 // If we have reached the end of the TranslationTable and we have not found the end of the region then
310 // we return EFI_NOT_FOUND.
311 // The caller will continue to look for the memory region at its level
312 return EFI_NOT_FOUND;
313 }
314
315 EFI_STATUS
316 GetMemoryRegion (
317 IN OUT UINTN *BaseAddress,
318 OUT UINTN *RegionLength,
319 OUT UINTN *RegionAttributes
320 )
321 {
322 EFI_STATUS Status;
323 UINT64 *TranslationTable;
324 UINTN TableLevel;
325 UINTN EntryCount;
326 UINTN T0SZ;
327
328 ASSERT ((BaseAddress != NULL) && (RegionLength != NULL) && (RegionAttributes != NULL));
329
330 TranslationTable = ArmGetTTBR0BaseAddress ();
331
332 T0SZ = ArmGetTCR () & TCR_T0SZ_MASK;
333 // Get the Table info from T0SZ
334 GetRootTranslationTableInfo (T0SZ, &TableLevel, &EntryCount);
335
336 Status = GetMemoryRegionRec (TranslationTable, TableLevel,
337 (UINTN*)TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount),
338 BaseAddress, RegionLength, RegionAttributes);
339
340 // If the region continues up to the end of the root table then GetMemoryRegionRec()
341 // will return EFI_NOT_FOUND
342 if (Status == EFI_NOT_FOUND) {
343 return EFI_SUCCESS;
344 } else {
345 return Status;
346 }
347 }