ArmPkg/Drivers/CpuDxe/CpuDxe.c

   1 /** @file
   2
   3   Copyright (c) 2008-2009, Apple Inc. All rights reserved.
   4
   5   All rights reserved. This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #include "CpuDxe.h"
  16
  17 BOOLEAN mInterruptState   = FALSE;
  18
  19
  20 /**
  21   This function flushes the range of addresses from Start to Start+Length
  22   from the processor's data cache. If Start is not aligned to a cache line
  23   boundary, then the bytes before Start to the preceding cache line boundary
  24   are also flushed. If Start+Length is not aligned to a cache line boundary,
  25   then the bytes past Start+Length to the end of the next cache line boundary
  26   are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
  27   supported. If the data cache is fully coherent with all DMA operations, then
  28   this function can just return EFI_SUCCESS. If the processor does not support
  29   flushing a range of the data cache, then the entire data cache can be flushed.
  30
  31   @param  This             The EFI_CPU_ARCH_PROTOCOL instance.
  32   @param  Start            The beginning physical address to flush from the processor's data
  33                            cache.
  34   @param  Length           The number of bytes to flush from the processor's data cache. This
  35                            function may flush more bytes than Length specifies depending upon
  36                            the granularity of the flush operation that the processor supports.
  37   @param  FlushType        Specifies the type of flush operation to perform.
  38
  39   @retval EFI_SUCCESS           The address range from Start to Start+Length was flushed from
  40                                 the processor's data cache.
  41   @retval EFI_UNSUPPORTEDT      The processor does not support the cache flush type specified
  42                                 by FlushType.
  43   @retval EFI_DEVICE_ERROR      The address range from Start to Start+Length could not be flushed
  44                                 from the processor's data cache.
  45
  46 **/
  47 EFI_STATUS
  48 EFIAPI
  49 CpuFlushCpuDataCache (
  50   IN EFI_CPU_ARCH_PROTOCOL           *This,
  51   IN EFI_PHYSICAL_ADDRESS            Start,
  52   IN UINT64                          Length,
  53   IN EFI_CPU_FLUSH_TYPE              FlushType
  54   )
  55 {
  56   DEBUG ((EFI_D_ERROR, "CpuFlushCpuDataCache (%lx, %lx, %x)\n", Start, Length, FlushType));
  57
  58   switch (FlushType) {
  59     case EfiCpuFlushTypeWriteBack:
  60       WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
  61       break;
  62     case EfiCpuFlushTypeInvalidate:
  63       InvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
  64       break;
  65     case EfiCpuFlushTypeWriteBackInvalidate:
  66       WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
  67       break;
  68     default:
  69       return EFI_INVALID_PARAMETER;
  70   }
  71
  72   return EFI_SUCCESS;
  73 }
  74
  75
  76 /**
  77   This function enables interrupt processing by the processor.
  78
  79   @param  This             The EFI_CPU_ARCH_PROTOCOL instance.
  80
  81   @retval EFI_SUCCESS           Interrupts are enabled on the processor.
  82   @retval EFI_DEVICE_ERROR      Interrupts could not be enabled on the processor.
  83
  84 **/
  85 EFI_STATUS
  86 EFIAPI
  87 CpuEnableInterrupt (
  88   IN EFI_CPU_ARCH_PROTOCOL          *This
  89   )
  90 {
  91   ArmEnableInterrupts ();
  92
  93   mInterruptState  = TRUE;
  94   return EFI_SUCCESS;
  95 }
  96
  97
  98 /**
  99   This function disables interrupt processing by the processor.
 100
 101   @param  This             The EFI_CPU_ARCH_PROTOCOL instance.
 102
 103   @retval EFI_SUCCESS           Interrupts are disabled on the processor.
 104   @retval EFI_DEVICE_ERROR      Interrupts could not be disabled on the processor.
 105
 106 **/
 107 EFI_STATUS
 108 EFIAPI
 109 CpuDisableInterrupt (
 110   IN EFI_CPU_ARCH_PROTOCOL          *This
 111   )
 112 {
 113   ArmDisableInterrupts ();
 114
 115   mInterruptState = FALSE;
 116   return EFI_SUCCESS;
 117 }
 118
 119
 120 /**
 121   This function retrieves the processor's current interrupt state a returns it in
 122   State. If interrupts are currently enabled, then TRUE is returned. If interrupts
 123   are currently disabled, then FALSE is returned.
 124
 125   @param  This             The EFI_CPU_ARCH_PROTOCOL instance.
 126   @param  State            A pointer to the processor's current interrupt state. Set to TRUE if
 127                            interrupts are enabled and FALSE if interrupts are disabled.
 128
 129   @retval EFI_SUCCESS           The processor's current interrupt state was returned in State.
 130   @retval EFI_INVALID_PARAMETER State is NULL.
 131
 132 **/
 133 EFI_STATUS
 134 EFIAPI
 135 CpuGetInterruptState (
 136   IN  EFI_CPU_ARCH_PROTOCOL         *This,
 137   OUT BOOLEAN                       *State
 138   )
 139 {
 140   if (State == NULL) {
 141     return EFI_INVALID_PARAMETER;
 142   }
 143
 144   *State = mInterruptState;
 145   return EFI_SUCCESS;
 146 }
 147
 148
 149 /**
 150   This function generates an INIT on the processor. If this function succeeds, then the
 151   processor will be reset, and control will not be returned to the caller. If InitType is
 152   not supported by this processor, or the processor cannot programmatically generate an
 153   INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error
 154   occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.
 155
 156   @param  This             The EFI_CPU_ARCH_PROTOCOL instance.
 157   @param  InitType         The type of processor INIT to perform.
 158
 159   @retval EFI_SUCCESS           The processor INIT was performed. This return code should never be seen.
 160   @retval EFI_UNSUPPORTED       The processor INIT operation specified by InitType is not supported
 161                                 by this processor.
 162   @retval EFI_DEVICE_ERROR      The processor INIT failed.
 163
 164 **/
 165 EFI_STATUS
 166 EFIAPI
 167 CpuInit (
 168   IN EFI_CPU_ARCH_PROTOCOL           *This,
 169   IN EFI_CPU_INIT_TYPE               InitType
 170   )
 171 {
 172   return EFI_UNSUPPORTED;
 173 }
 174
 175 EFI_STATUS
 176 EFIAPI
 177 CpuRegisterInterruptHandler (
 178   IN EFI_CPU_ARCH_PROTOCOL          *This,
 179   IN EFI_EXCEPTION_TYPE             InterruptType,
 180   IN EFI_CPU_INTERRUPT_HANDLER      InterruptHandler
 181   )
 182 {
 183   return RegisterInterruptHandler (InterruptType, InterruptHandler);
 184 }
 185
 186 EFI_STATUS
 187 EFIAPI
 188 CpuGetTimerValue (
 189   IN  EFI_CPU_ARCH_PROTOCOL          *This,
 190   IN  UINT32                         TimerIndex,
 191   OUT UINT64                         *TimerValue,
 192   OUT UINT64                         *TimerPeriod   OPTIONAL
 193   )
 194 {
 195   return EFI_UNSUPPORTED;
 196 }
 197
 198
 199 //
 200 // Globals used to initialize the protocol
 201 //
 202 EFI_HANDLE            mCpuHandle = NULL;
 203 EFI_CPU_ARCH_PROTOCOL mCpu = {
 204   CpuFlushCpuDataCache,
 205   CpuEnableInterrupt,
 206   CpuDisableInterrupt,
 207   CpuGetInterruptState,
 208   CpuInit,
 209   CpuRegisterInterruptHandler,
 210   CpuGetTimerValue,
 211   CpuSetMemoryAttributes,
 212   0,          // NumberOfTimers
 213   4,          // DmaBufferAlignment
 214 };
 215
 216 EFI_STATUS
 217 CpuDxeInitialize (
 218   IN EFI_HANDLE         ImageHandle,
 219   IN EFI_SYSTEM_TABLE   *SystemTable
 220   )
 221 {
 222   EFI_STATUS  Status;
 223
 224   InitializeExceptions (&mCpu);
 225
 226
 227   Status = gBS->InstallMultipleProtocolInterfaces (
 228                 &mCpuHandle,
 229                 &gEfiCpuArchProtocolGuid,           &mCpu,
 230                 &gVirtualUncachedPagesProtocolGuid, &gVirtualUncachedPages,
 231                 NULL
 232                 );
 233
 234   //
 235   // Make sure GCD and MMU settings match. This API calls gDS->SetMemorySpaceAttributes ()
 236   // and that calls EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes, so this code needs to go
 237   // after the protocol is installed
 238   //
 239   SyncCacheConfig (&mCpu);
 240
 241   return Status;
 242 }
 243