Added a library for the default exception handler and started to add a dissasembler...
[mirror_edk2.git] / ArmPkg / Drivers / CpuDxe / CpuDxe.c
1 /** @file
2
3 Copyright (c) 2008-2009, Apple Inc. All rights reserved.
4
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "CpuDxe.h"
16
17 BOOLEAN mInterruptState = FALSE;
18
19
20 /**
21 This function flushes the range of addresses from Start to Start+Length
22 from the processor's data cache. If Start is not aligned to a cache line
23 boundary, then the bytes before Start to the preceding cache line boundary
24 are also flushed. If Start+Length is not aligned to a cache line boundary,
25 then the bytes past Start+Length to the end of the next cache line boundary
26 are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
27 supported. If the data cache is fully coherent with all DMA operations, then
28 this function can just return EFI_SUCCESS. If the processor does not support
29 flushing a range of the data cache, then the entire data cache can be flushed.
30
31 @param This The EFI_CPU_ARCH_PROTOCOL instance.
32 @param Start The beginning physical address to flush from the processor's data
33 cache.
34 @param Length The number of bytes to flush from the processor's data cache. This
35 function may flush more bytes than Length specifies depending upon
36 the granularity of the flush operation that the processor supports.
37 @param FlushType Specifies the type of flush operation to perform.
38
39 @retval EFI_SUCCESS The address range from Start to Start+Length was flushed from
40 the processor's data cache.
41 @retval EFI_UNSUPPORTEDT The processor does not support the cache flush type specified
42 by FlushType.
43 @retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed
44 from the processor's data cache.
45
46 **/
47 EFI_STATUS
48 EFIAPI
49 CpuFlushCpuDataCache (
50 IN EFI_CPU_ARCH_PROTOCOL *This,
51 IN EFI_PHYSICAL_ADDRESS Start,
52 IN UINT64 Length,
53 IN EFI_CPU_FLUSH_TYPE FlushType
54 )
55 {
56
57 switch (FlushType) {
58 case EfiCpuFlushTypeWriteBack:
59 WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
60 break;
61 case EfiCpuFlushTypeInvalidate:
62 InvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
63 break;
64 case EfiCpuFlushTypeWriteBackInvalidate:
65 WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
66 break;
67 default:
68 return EFI_INVALID_PARAMETER;
69 }
70
71 return EFI_SUCCESS;
72 }
73
74
75 /**
76 This function enables interrupt processing by the processor.
77
78 @param This The EFI_CPU_ARCH_PROTOCOL instance.
79
80 @retval EFI_SUCCESS Interrupts are enabled on the processor.
81 @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor.
82
83 **/
84 EFI_STATUS
85 EFIAPI
86 CpuEnableInterrupt (
87 IN EFI_CPU_ARCH_PROTOCOL *This
88 )
89 {
90 ArmEnableInterrupts ();
91
92 mInterruptState = TRUE;
93 return EFI_SUCCESS;
94 }
95
96
97 /**
98 This function disables interrupt processing by the processor.
99
100 @param This The EFI_CPU_ARCH_PROTOCOL instance.
101
102 @retval EFI_SUCCESS Interrupts are disabled on the processor.
103 @retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor.
104
105 **/
106 EFI_STATUS
107 EFIAPI
108 CpuDisableInterrupt (
109 IN EFI_CPU_ARCH_PROTOCOL *This
110 )
111 {
112 ArmDisableInterrupts ();
113
114 mInterruptState = FALSE;
115 return EFI_SUCCESS;
116 }
117
118
119 /**
120 This function retrieves the processor's current interrupt state a returns it in
121 State. If interrupts are currently enabled, then TRUE is returned. If interrupts
122 are currently disabled, then FALSE is returned.
123
124 @param This The EFI_CPU_ARCH_PROTOCOL instance.
125 @param State A pointer to the processor's current interrupt state. Set to TRUE if
126 interrupts are enabled and FALSE if interrupts are disabled.
127
128 @retval EFI_SUCCESS The processor's current interrupt state was returned in State.
129 @retval EFI_INVALID_PARAMETER State is NULL.
130
131 **/
132 EFI_STATUS
133 EFIAPI
134 CpuGetInterruptState (
135 IN EFI_CPU_ARCH_PROTOCOL *This,
136 OUT BOOLEAN *State
137 )
138 {
139 if (State == NULL) {
140 return EFI_INVALID_PARAMETER;
141 }
142
143 *State = mInterruptState;
144 return EFI_SUCCESS;
145 }
146
147
148 /**
149 This function generates an INIT on the processor. If this function succeeds, then the
150 processor will be reset, and control will not be returned to the caller. If InitType is
151 not supported by this processor, or the processor cannot programmatically generate an
152 INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error
153 occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.
154
155 @param This The EFI_CPU_ARCH_PROTOCOL instance.
156 @param InitType The type of processor INIT to perform.
157
158 @retval EFI_SUCCESS The processor INIT was performed. This return code should never be seen.
159 @retval EFI_UNSUPPORTED The processor INIT operation specified by InitType is not supported
160 by this processor.
161 @retval EFI_DEVICE_ERROR The processor INIT failed.
162
163 **/
164 EFI_STATUS
165 EFIAPI
166 CpuInit (
167 IN EFI_CPU_ARCH_PROTOCOL *This,
168 IN EFI_CPU_INIT_TYPE InitType
169 )
170 {
171 return EFI_UNSUPPORTED;
172 }
173
174 EFI_STATUS
175 EFIAPI
176 CpuRegisterInterruptHandler (
177 IN EFI_CPU_ARCH_PROTOCOL *This,
178 IN EFI_EXCEPTION_TYPE InterruptType,
179 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
180 )
181 {
182 return RegisterInterruptHandler (InterruptType, InterruptHandler);
183 }
184
185 EFI_STATUS
186 EFIAPI
187 CpuGetTimerValue (
188 IN EFI_CPU_ARCH_PROTOCOL *This,
189 IN UINT32 TimerIndex,
190 OUT UINT64 *TimerValue,
191 OUT UINT64 *TimerPeriod OPTIONAL
192 )
193 {
194 return EFI_UNSUPPORTED;
195 }
196
197
198 //
199 // Globals used to initialize the protocol
200 //
201 EFI_HANDLE mCpuHandle = NULL;
202 EFI_CPU_ARCH_PROTOCOL mCpu = {
203 CpuFlushCpuDataCache,
204 CpuEnableInterrupt,
205 CpuDisableInterrupt,
206 CpuGetInterruptState,
207 CpuInit,
208 CpuRegisterInterruptHandler,
209 CpuGetTimerValue,
210 CpuSetMemoryAttributes,
211 0, // NumberOfTimers
212 4, // DmaBufferAlignment
213 };
214
215 EFI_STATUS
216 CpuDxeInitialize (
217 IN EFI_HANDLE ImageHandle,
218 IN EFI_SYSTEM_TABLE *SystemTable
219 )
220 {
221 EFI_STATUS Status;
222
223 InitializeExceptions (&mCpu);
224
225
226 Status = gBS->InstallMultipleProtocolInterfaces (
227 &mCpuHandle,
228 &gEfiCpuArchProtocolGuid, &mCpu,
229 &gVirtualUncachedPagesProtocolGuid, &gVirtualUncachedPages,
230 NULL
231 );
232
233 //
234 // Make sure GCD and MMU settings match. This API calls gDS->SetMemorySpaceAttributes ()
235 // and that calls EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes, so this code needs to go
236 // after the protocol is installed
237 //
238 SyncCacheConfig (&mCpu);
239
240 return Status;
241 }
242