ArmPkg/Drivers/CpuDxe/Exception.c

   1 /** @file
   2
   3   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
   4
   5   This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #include "CpuDxe.h"
  16
  17 //FIXME: Will not compile on non-ARMv7 builds
  18 #include <Chipset/ArmV7.h>
  19
  20 VOID
  21 ExceptionHandlersStart (
  22   VOID
  23   );
  24
  25 VOID
  26 ExceptionHandlersEnd (
  27   VOID
  28   );
  29
  30 VOID
  31 CommonExceptionEntry (
  32   VOID
  33   );
  34
  35 VOID
  36 AsmCommonExceptionEntry (
  37   VOID
  38   );
  39
  40
  41 EFI_EXCEPTION_CALLBACK  gExceptionHandlers[MAX_ARM_EXCEPTION + 1];
  42 EFI_EXCEPTION_CALLBACK  gDebuggerExceptionHandlers[MAX_ARM_EXCEPTION + 1];
  43
  44
  45
  46 /**
  47   This function registers and enables the handler specified by InterruptHandler for a processor
  48   interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
  49   handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
  50   The installed handler is called once for each processor interrupt or exception.
  51
  52   @param  InterruptType    A pointer to the processor's current interrupt state. Set to TRUE if interrupts
  53                            are enabled and FALSE if interrupts are disabled.
  54   @param  InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
  55                            when a processor interrupt occurs. If this parameter is NULL, then the handler
  56                            will be uninstalled.
  57
  58   @retval EFI_SUCCESS           The handler for the processor interrupt was successfully installed or uninstalled.
  59   @retval EFI_ALREADY_STARTED   InterruptHandler is not NULL, and a handler for InterruptType was
  60                                 previously installed.
  61   @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
  62                                 previously installed.
  63   @retval EFI_UNSUPPORTED       The interrupt specified by InterruptType is not supported.
  64
  65 **/
  66 EFI_STATUS
  67 RegisterInterruptHandler (
  68   IN EFI_EXCEPTION_TYPE             InterruptType,
  69   IN EFI_CPU_INTERRUPT_HANDLER      InterruptHandler
  70   )
  71 {
  72   if (InterruptType > MAX_ARM_EXCEPTION) {
  73     return EFI_UNSUPPORTED;
  74   }
  75
  76   if ((InterruptHandler != NULL) && (gExceptionHandlers[InterruptType] != NULL)) {
  77     return EFI_ALREADY_STARTED;
  78   }
  79
  80   gExceptionHandlers[InterruptType] = InterruptHandler;
  81
  82   return EFI_SUCCESS;
  83 }
  84
  85
  86
  87
  88 VOID
  89 EFIAPI
  90 CommonCExceptionHandler (
  91   IN     EFI_EXCEPTION_TYPE           ExceptionType,
  92   IN OUT EFI_SYSTEM_CONTEXT           SystemContext
  93   )
  94 {
  95   if (ExceptionType <= MAX_ARM_EXCEPTION) {
  96     if (gExceptionHandlers[ExceptionType]) {
  97       gExceptionHandlers[ExceptionType] (ExceptionType, SystemContext);
  98       return;
  99     }
 100   } else {
 101     DEBUG ((EFI_D_ERROR, "Unknown exception type %d from %08x\n", ExceptionType, SystemContext.SystemContextArm->PC));
 102     ASSERT (FALSE);
 103   }
 104
 105   if (ExceptionType == EXCEPT_ARM_SOFTWARE_INTERRUPT) {
 106     //
 107     // ARM JTAG debuggers some times use this vector, so it is not an error to get one
 108     //
 109     return;
 110   }
 111
 112   DefaultExceptionHandler (ExceptionType, SystemContext);
 113 }
 114
 115
 116
 117 EFI_STATUS
 118 InitializeExceptions (
 119   IN EFI_CPU_ARCH_PROTOCOL    *Cpu
 120   )
 121 {
 122   EFI_STATUS           Status;
 123   UINTN                Offset;
 124   UINTN                Length;
 125   UINTN                Index;
 126   BOOLEAN              IrqEnabled;
 127   BOOLEAN              FiqEnabled;
 128   EFI_PHYSICAL_ADDRESS Base;
 129   UINT32               *VectorBase;
 130
 131   Status = EFI_SUCCESS;
 132   ZeroMem (gExceptionHandlers,sizeof(*gExceptionHandlers));
 133
 134   //
 135   // Disable interrupts
 136   //
 137   Cpu->GetInterruptState (Cpu, &IrqEnabled);
 138   Cpu->DisableInterrupt (Cpu);
 139
 140   //
 141   // EFI does not use the FIQ, but a debugger might so we must disable
 142   // as we take over the exception vectors.
 143   //
 144   FiqEnabled = ArmGetFiqState ();
 145   ArmDisableFiq ();
 146
 147   if (FeaturePcdGet(PcdRelocateVectorTable) == TRUE) {
 148     //
 149     // Copy an implementation of the ARM exception vectors to PcdCpuVectorBaseAddress.
 150     //
 151     Length = (UINTN)ExceptionHandlersEnd - (UINTN)ExceptionHandlersStart;
 152
 153     // Check if the exception vector is in the low address
 154     if (PcdGet32 (PcdCpuVectorBaseAddress) == 0x0) {
 155       // Set SCTLR.V to 0 to enable VBAR to be used
 156       ArmSetLowVectors ();
 157     } else {
 158       ArmSetHighVectors ();
 159     }
 160
 161     //
 162     // Reserve space for the exception handlers
 163     //
 164     Base = (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdCpuVectorBaseAddress);
 165     VectorBase = (UINT32 *)(UINTN)Base;
 166     Status = gBS->AllocatePages (AllocateAddress, EfiBootServicesCode, EFI_SIZE_TO_PAGES (Length), &Base);
 167     // If the request was for memory that's not in the memory map (which is often the case for 0x00000000
 168     // on embedded systems, for example, we don't want to hang up.  So we'll check here for a status of
 169     // EFI_NOT_FOUND, and continue in that case.
 170     if (EFI_ERROR(Status) && (Status != EFI_NOT_FOUND)) {
 171       ASSERT_EFI_ERROR (Status);
 172     }
 173
 174     if (FeaturePcdGet(PcdDebuggerExceptionSupport) == TRUE) {
 175       // Save existing vector table, in case debugger is already hooked in
 176       CopyMem ((VOID *)gDebuggerExceptionHandlers, (VOID *)VectorBase, sizeof (gDebuggerExceptionHandlers));
 177     }
 178
 179     // Copy our assembly code into the page that contains the exception vectors.
 180     CopyMem ((VOID *)VectorBase, (VOID *)ExceptionHandlersStart, Length);
 181
 182     //
 183     // Patch in the common Assembly exception handler
 184     //
 185     Offset = (UINTN)CommonExceptionEntry - (UINTN)ExceptionHandlersStart;
 186     *(UINTN *) ((UINT8 *)(UINTN)PcdGet32 (PcdCpuVectorBaseAddress) + Offset) = (UINTN)AsmCommonExceptionEntry;
 187
 188     //
 189     // Initialize the C entry points for interrupts
 190     //
 191     for (Index = 0; Index <= MAX_ARM_EXCEPTION; Index++) {
 192       if (!FeaturePcdGet(PcdDebuggerExceptionSupport) ||
 193           (gDebuggerExceptionHandlers[Index] == 0) || (gDebuggerExceptionHandlers[Index] == (VOID *)(UINTN)0xEAFFFFFE)) {
 194         // Exception handler contains branch to vector location (jmp $) so no handler
 195         // NOTE: This code assumes vectors are ARM and not Thumb code
 196         Status = RegisterInterruptHandler (Index, NULL);
 197         ASSERT_EFI_ERROR (Status);
 198       } else {
 199         // If the debugger has already hooked put its vector back
 200         VectorBase[Index] = (UINT32)(UINTN)gDebuggerExceptionHandlers[Index];
 201       }
 202     }
 203
 204     // Flush Caches since we updated executable stuff
 205     InvalidateInstructionCacheRange ((VOID *)PcdGet32(PcdCpuVectorBaseAddress), Length);
 206
 207     //Note: On ARM processor with the Security Extension, the Vector Table can be located anywhere in the memory.
 208     //      The Vector Base Address Register defines the location
 209     ArmWriteVBar (PcdGet32(PcdCpuVectorBaseAddress));
 210   } else {
 211     // The Vector table must be 32-byte aligned
 212     ASSERT(((UINT32)ExceptionHandlersStart & ((1 << 5)-1)) == 0);
 213
 214     // We do not copy the Exception Table at PcdGet32(PcdCpuVectorBaseAddress). We just set Vector Base Address to point into CpuDxe code.
 215     ArmWriteVBar ((UINT32)ExceptionHandlersStart);
 216   }
 217
 218   if (FiqEnabled) {
 219     ArmEnableFiq ();
 220   }
 221
 222   if (IrqEnabled) {
 223     //
 224     // Restore interrupt state
 225     //
 226     Status = Cpu->EnableInterrupt (Cpu);
 227   }
 228
 229   return Status;
 230 }