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1 /** @file
2 Macros to work around lack of Apple support for LDR register, =expr
3
4 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
5 Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
6
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17
18 #ifndef __MACRO_IO_LIB_H__
19 #define __MACRO_IO_LIB_H__
20
21 #if defined(__APPLE__)
22
23 //
24 // ldr reg, =expr does not work with current Apple tool chain. So do the work our selves
25 //
26
27 // returns _Data in R0 and _Address in R1
28 #define MmioWrite32(_Address, _Data) \
29 ldr r1, [pc, #8] ; \
30 ldr r0, [pc, #8] ; \
31 str r0, [r1] ; \
32 b 1f ; \
33 .long (_Address) ; \
34 .long (_Data) ; \
35 1:
36
37 // returns _Data in R0 and _Address in R1, and _OrData in r2
38 #define MmioOr32(_Address, _OrData) \
39 ldr r1, [pc, #16] ; \
40 ldr r2, [pc, #16] ; \
41 ldr r0, [r1] ; \
42 orr r0, r0, r2 ; \
43 str r0, [r1] ; \
44 b 1f ; \
45 .long (_Address) ; \
46 .long (_OrData) ; \
47 1:
48
49 // returns _Data in R0 and _Address in R1, and _OrData in r2
50 #define MmioAnd32(_Address, _AndData) \
51 ldr r1, [pc, #16] ; \
52 ldr r2, [pc, #16] ; \
53 ldr r0, [r1] ; \
54 and r0, r0, r2 ; \
55 str r0, [r1] ; \
56 b 1f ; \
57 .long (_Address) ; \
58 .long (_AndData) ; \
59 1:
60
61 // returns result in R0, _Address in R1, and _OrData in r2
62 #define MmioAndThenOr32(_Address, _AndData, _OrData) \
63 ldr r1, [pc, #24] ; \
64 ldr r0, [r1] ; \
65 ldr r2, [pc, #20] ; \
66 and r0, r0, r2 ; \
67 ldr r2, [pc, #16] ; \
68 orr r0, r0, r2 ; \
69 str r0, [r1] ; \
70 b 1f ; \
71 .long (_Address) ; \
72 .long (_AndData) ; \
73 .long (_OrData) ; \
74 1:
75
76 // returns _Data in _Reg and _Address in R1
77 #define MmioWriteFromReg32(_Address, _Reg) \
78 ldr r1, [pc, #4] ; \
79 str _Reg, [r1] ; \
80 b 1f ; \
81 .long (_Address) ; \
82 1:
83
84
85 // returns _Data in R0 and _Address in R1
86 #define MmioRead32(_Address) \
87 ldr r1, [pc, #4] ; \
88 ldr r0, [r1] ; \
89 b 1f ; \
90 .long (_Address) ; \
91 1:
92
93 // returns _Data in Reg and _Address in R1
94 #define MmioReadToReg32(_Address, _Reg) \
95 ldr r1, [pc, #4] ; \
96 ldr _Reg, [r1] ; \
97 b 1f ; \
98 .long (_Address) ; \
99 1:
100
101
102 // load R0 with _Data
103 #define LoadConstant(_Data) \
104 ldr r0, [pc, #0] ; \
105 b 1f ; \
106 .long (_Data) ; \
107 1:
108
109 // load _Reg with _Data
110 #define LoadConstantToReg(_Data, _Reg) \
111 ldr _Reg, [pc, #0] ; \
112 b 1f ; \
113 .long (_Data) ; \
114 1:
115
116 // load _Reg with _Data if eq
117 #define LoadConstantToRegIfEq(_Data, _Reg) \
118 ldreq _Reg, [pc, #0] ; \
119 b 1f ; \
120 .long (_Data) ; \
121 1:
122
123 // Convert the (ClusterId,CoreId) into a Core Position
124 // We assume there are 4 cores per cluster
125 // Note: 0xFFFF is the magic value for ARM_CORE_MASK | ARM_CLUSTER_MASK
126 #define GetCorePositionFromMpId(Pos, MpId, Tmp) \
127 ldr Tmp, =0xFFFF \
128 and MpId, Tmp \
129 lsr Pos, MpId, #6 ; \
130 and Tmp, MpId, #3 ; \
131 add Pos, Pos, Tmp
132
133 // Reserve a region at the top of the Primary Core stack
134 // for Global variables for the XIP phase
135 #define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
136 and Tmp, GlobalSize, #7 ; \
137 rsbne Tmp, Tmp, #8 ; \
138 add GlobalSize, GlobalSize, Tmp ; \
139 sub sp, StackTop, GlobalSize ; \
140 ; \
141 mov Tmp, sp ; \
142 mov GlobalSize, #0x0 ; \
143 _SetPrimaryStackInitGlobals: ; \
144 cmp Tmp, StackTop ; \
145 beq _SetPrimaryStackEnd ; \
146 str GlobalSize, [Tmp], #4 ; \
147 b _SetPrimaryStackInitGlobals ; \
148 _SetPrimaryStackEnd:
149
150 // Initialize the Global Variable with '0'
151 #define InitializePrimaryStack(GlobalSize, Tmp1) \
152 and Tmp1, GlobalSize, #7 ; \
153 rsbne Tmp1, Tmp1, #8 ; \
154 add GlobalSize, GlobalSize, Tmp1 ; \
155 ; \
156 mov Tmp1, sp ; \
157 sub sp, GlobalSize ; \
158 mov GlobalSize, #0x0 ; \
159 _InitializePrimaryStackLoop: ; \
160 cmp Tmp1, sp ; \
161 bls _InitializePrimaryStackEnd ; \
162 str GlobalSize, [Tmp1], #-4 ; \
163 b _InitializePrimaryStackLoop ; \
164 _InitializePrimaryStackEnd:
165
166 #elif defined (__GNUC__)
167
168 #define MmioWrite32(Address, Data) \
169 ldr r1, =Address ; \
170 ldr r0, =Data ; \
171 str r0, [r1]
172
173 #define MmioOr32(Address, OrData) \
174 ldr r1, =Address ; \
175 ldr r2, =OrData ; \
176 ldr r0, [r1] ; \
177 orr r0, r0, r2 ; \
178 str r0, [r1]
179
180 #define MmioAnd32(Address, AndData) \
181 ldr r1, =Address ; \
182 ldr r2, =AndData ; \
183 ldr r0, [r1] ; \
184 and r0, r0, r2 ; \
185 str r0, [r1]
186
187 #define MmioAndThenOr32(Address, AndData, OrData) \
188 ldr r1, =Address ; \
189 ldr r0, [r1] ; \
190 ldr r2, =AndData ; \
191 and r0, r0, r2 ; \
192 ldr r2, =OrData ; \
193 orr r0, r0, r2 ; \
194 str r0, [r1]
195
196 #define MmioWriteFromReg32(Address, Reg) \
197 ldr r1, =Address ; \
198 str Reg, [r1]
199
200 #define MmioRead32(Address) \
201 ldr r1, =Address ; \
202 ldr r0, [r1]
203
204 #define MmioReadToReg32(Address, Reg) \
205 ldr r1, =Address ; \
206 ldr Reg, [r1]
207
208 #define LoadConstant(Data) \
209 ldr r0, =Data
210
211 #define LoadConstantToReg(Data, Reg) \
212 ldr Reg, =Data
213
214 // Convert the (ClusterId,CoreId) into a Core Position
215 // We assume there are 4 cores per cluster
216 // Note: 0xFFFF is the magic value for ARM_CORE_MASK | ARM_CLUSTER_MASK
217 #define GetCorePositionFromMpId(Pos, MpId, Tmp) \
218 ldr Tmp, =0xFFFF ; \
219 and MpId, Tmp ; \
220 lsr Pos, MpId, #6 ; \
221 and Tmp, MpId, #3 ; \
222 add Pos, Pos, Tmp
223
224 #define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
225 and Tmp, GlobalSize, #7 ; \
226 rsbne Tmp, Tmp, #8 ; \
227 add GlobalSize, GlobalSize, Tmp ; \
228 sub sp, StackTop, GlobalSize ; \
229 ; \
230 mov Tmp, sp ; \
231 mov GlobalSize, #0x0 ; \
232 _SetPrimaryStackInitGlobals: ; \
233 cmp Tmp, StackTop ; \
234 beq _SetPrimaryStackEnd ; \
235 str GlobalSize, [Tmp], #4 ; \
236 b _SetPrimaryStackInitGlobals ; \
237 _SetPrimaryStackEnd:
238
239 // Initialize the Global Variable with '0'
240 #define InitializePrimaryStack(GlobalSize, Tmp1) \
241 and Tmp1, GlobalSize, #7 ; \
242 rsbne Tmp1, Tmp1, #8 ; \
243 add GlobalSize, GlobalSize, Tmp1 ; \
244 ; \
245 mov Tmp1, sp ; \
246 sub sp, GlobalSize ; \
247 mov GlobalSize, #0x0 ; \
248 _InitializePrimaryStackLoop: ; \
249 cmp Tmp1, sp ; \
250 bls _InitializePrimaryStackEnd ; \
251 str GlobalSize, [Tmp1], #-4 ; \
252 b _InitializePrimaryStackLoop ; \
253 _InitializePrimaryStackEnd:
254
255 #else
256
257 //
258 // Use ARM assembly macros, form armasam
259 //
260 // Less magic in the macros if ldr reg, =expr works
261 //
262
263 // returns _Data in R0 and _Address in R1
264
265
266
267 #define MmioWrite32(Address, Data) MmioWrite32Macro Address, Data
268
269
270
271
272 // returns Data in R0 and Address in R1, and OrData in r2
273 #define MmioOr32(Address, OrData) MmioOr32Macro Address, OrData
274
275
276 // returns _Data in R0 and _Address in R1, and _OrData in r2
277
278
279 #define MmioAnd32(Address, AndData) MmioAnd32Macro Address, AndData
280
281 // returns result in R0, _Address in R1, and _OrData in r2
282
283
284 #define MmioAndThenOr32(Address, AndData, OrData) MmioAndThenOr32Macro Address, AndData, OrData
285
286
287 // returns _Data in _Reg and _Address in R1
288
289
290 #define MmioWriteFromReg32(Address, Reg) MmioWriteFromReg32Macro Address, Reg
291
292 // returns _Data in R0 and _Address in R1
293
294
295 #define MmioRead32(Address) MmioRead32Macro Address
296
297 // returns _Data in Reg and _Address in R1
298
299
300 #define MmioReadToReg32(Address, Reg) MmioReadToReg32Macro Address, Reg
301
302
303 // load R0 with _Data
304
305
306 #define LoadConstant(Data) LoadConstantMacro Data
307
308 // load _Reg with _Data
309
310
311 #define LoadConstantToReg(Data, Reg) LoadConstantToRegMacro Data, Reg
312
313 // conditional load testing eq flag
314 #define LoadConstantToRegIfEq(Data, Reg) LoadConstantToRegIfEqMacro Data, Reg
315
316 #define GetCorePositionFromMpId(Pos, MpId, Tmp) GetCorePositionFromMpId Pos, MpId, Tmp
317
318 #define SetPrimaryStack(StackTop,GlobalSize,Tmp) SetPrimaryStack StackTop, GlobalSize, Tmp
319
320 // Initialize the Global Variable with '0'
321 #define InitializePrimaryStack(GlobalSize, Tmp1) InitializePrimaryStack GlobalSize, Tmp1
322
323 #endif
324
325 #endif