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1 /** @file
2 Macros to work around lack of Apple support for LDR register, =expr
3
4 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
5
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16
17 #ifndef __MACRO_IO_LIB_H__
18 #define __MACRO_IO_LIB_H__
19
20 #if defined(__APPLE__)
21
22 //
23 // ldr reg, =expr does not work with current Apple tool chain. So do the work our selves
24 //
25
26 // returns _Data in R0 and _Address in R1
27 #define MmioWrite32(_Address, _Data) \
28 ldr r1, [pc, #8] ; \
29 ldr r0, [pc, #8] ; \
30 str r0, [r1] ; \
31 b 1f ; \
32 .long (_Address) ; \
33 .long (_Data) ; \
34 1:
35
36 // returns _Data in R0 and _Address in R1, and _OrData in r2
37 #define MmioOr32(_Address, _OrData) \
38 ldr r1, [pc, #16] ; \
39 ldr r2, [pc, #16] ; \
40 ldr r0, [r1] ; \
41 orr r0, r0, r2 ; \
42 str r0, [r1] ; \
43 b 1f ; \
44 .long (_Address) ; \
45 .long (_OrData) ; \
46 1:
47
48 // returns _Data in R0 and _Address in R1, and _OrData in r2
49 #define MmioAnd32(_Address, _AndData) \
50 ldr r1, [pc, #16] ; \
51 ldr r2, [pc, #16] ; \
52 ldr r0, [r1] ; \
53 and r0, r0, r2 ; \
54 str r0, [r1] ; \
55 b 1f ; \
56 .long (_Address) ; \
57 .long (_AndData) ; \
58 1:
59
60 // returns result in R0, _Address in R1, and _OrData in r2
61 #define MmioAndThenOr32(_Address, _AndData, _OrData) \
62 ldr r1, [pc, #24] ; \
63 ldr r0, [r1] ; \
64 ldr r2, [pc, #20] ; \
65 and r0, r0, r2 ; \
66 ldr r2, [pc, #16] ; \
67 orr r0, r0, r2 ; \
68 str r0, [r1] ; \
69 b 1f ; \
70 .long (_Address) ; \
71 .long (_AndData) ; \
72 .long (_OrData) ; \
73 1:
74
75 // returns _Data in _Reg and _Address in R1
76 #define MmioWriteFromReg32(_Address, _Reg) \
77 ldr r1, [pc, #4] ; \
78 str _Reg, [r1] ; \
79 b 1f ; \
80 .long (_Address) ; \
81 1:
82
83
84 // returns _Data in R0 and _Address in R1
85 #define MmioRead32(_Address) \
86 ldr r1, [pc, #4] ; \
87 ldr r0, [r1] ; \
88 b 1f ; \
89 .long (_Address) ; \
90 1:
91
92 // returns _Data in Reg and _Address in R1
93 #define MmioReadToReg32(_Address, _Reg) \
94 ldr r1, [pc, #4] ; \
95 ldr _Reg, [r1] ; \
96 b 1f ; \
97 .long (_Address) ; \
98 1:
99
100
101 // load R0 with _Data
102 #define LoadConstant(_Data) \
103 ldr r0, [pc, #0] ; \
104 b 1f ; \
105 .long (_Data) ; \
106 1:
107
108 // load _Reg with _Data
109 #define LoadConstantToReg(_Data, _Reg) \
110 ldr _Reg, [pc, #0] ; \
111 b 1f ; \
112 .long (_Data) ; \
113 1:
114
115 // load _Reg with _Data if eq
116 #define LoadConstantToRegIfEq(_Data, _Reg) \
117 ldreq _Reg, [pc, #0] ; \
118 b 1f ; \
119 .long (_Data) ; \
120 1:
121
122 // Convert the (ClusterId,CoreId) into a Core Position
123 // We assume there are 4 cores per cluster
124 #define GetCorePositionInStack(Pos, MpId, Tmp) \
125 lsr Pos, MpId, #6 ; \
126 and Tmp, MpId, #3 ; \
127 add Pos, Pos, Tmp
128
129 // Reserve a region at the top of the Primary Core stack
130 // for Global variables for the XIP phase
131 #define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
132 and Tmp, GlobalSize, #7 ; \
133 rsbne Tmp, Tmp, #8 ; \
134 add GlobalSize, GlobalSize, Tmp ; \
135 sub sp, StackTop, GlobalSize
136
137
138 #elif defined (__GNUC__)
139
140 #define MmioWrite32(Address, Data) \
141 ldr r1, =Address ; \
142 ldr r0, =Data ; \
143 str r0, [r1]
144
145 #define MmioOr32(Address, OrData) \
146 ldr r1, =Address ; \
147 ldr r2, =OrData ; \
148 ldr r0, [r1] ; \
149 orr r0, r0, r2 ; \
150 str r0, [r1]
151
152 #define MmioAnd32(Address, AndData) \
153 ldr r1, =Address ; \
154 ldr r2, =AndData ; \
155 ldr r0, [r1] ; \
156 and r0, r0, r2 ; \
157 str r0, [r1]
158
159 #define MmioAndThenOr32(Address, AndData, OrData) \
160 ldr r1, =Address ; \
161 ldr r0, [r1] ; \
162 ldr r2, =AndData ; \
163 and r0, r0, r2 ; \
164 ldr r2, =OrData ; \
165 orr r0, r0, r2 ; \
166 str r0, [r1]
167
168 #define MmioWriteFromReg32(Address, Reg) \
169 ldr r1, =Address ; \
170 str Reg, [r1]
171
172 #define MmioRead32(Address) \
173 ldr r1, =Address ; \
174 ldr r0, [r1]
175
176 #define MmioReadToReg32(Address, Reg) \
177 ldr r1, =Address ; \
178 ldr Reg, [r1]
179
180 #define LoadConstant(Data) \
181 ldr r0, =Data
182
183 #define LoadConstantToReg(Data, Reg) \
184 ldr Reg, =Data
185
186 #define GetCorePositionInStack(Pos, MpId, Tmp) \
187 lsr Pos, MpId, #6 ; \
188 and Tmp, MpId, #3 ; \
189 add Pos, Pos, Tmp
190
191 #define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
192 and Tmp, GlobalSize, #7 ; \
193 rsbne Tmp, Tmp, #8 ; \
194 add GlobalSize, GlobalSize, Tmp ; \
195 sub sp, StackTop, GlobalSize
196
197 #else
198
199 //
200 // Use ARM assembly macros, form armasam
201 //
202 // Less magic in the macros if ldr reg, =expr works
203 //
204
205 // returns _Data in R0 and _Address in R1
206
207
208
209 #define MmioWrite32(Address, Data) MmioWrite32Macro Address, Data
210
211
212
213
214 // returns Data in R0 and Address in R1, and OrData in r2
215 #define MmioOr32(Address, OrData) MmioOr32Macro Address, OrData
216
217
218 // returns _Data in R0 and _Address in R1, and _OrData in r2
219
220
221 #define MmioAnd32(Address, AndData) MmioAnd32Macro Address, AndData
222
223 // returns result in R0, _Address in R1, and _OrData in r2
224
225
226 #define MmioAndThenOr32(Address, AndData, OrData) MmioAndThenOr32Macro Address, AndData, OrData
227
228
229 // returns _Data in _Reg and _Address in R1
230
231
232 #define MmioWriteFromReg32(Address, Reg) MmioWriteFromReg32Macro Address, Reg
233
234 // returns _Data in R0 and _Address in R1
235
236
237 #define MmioRead32(Address) MmioRead32Macro Address
238
239 // returns _Data in Reg and _Address in R1
240
241
242 #define MmioReadToReg32(Address, Reg) MmioReadToReg32Macro Address, Reg
243
244
245 // load R0 with _Data
246
247
248 #define LoadConstant(Data) LoadConstantMacro Data
249
250 // load _Reg with _Data
251
252
253 #define LoadConstantToReg(Data, Reg) LoadConstantToRegMacro Data, Reg
254
255 // conditional load testing eq flag
256 #define LoadConstantToRegIfEq(Data, Reg) LoadConstantToRegIfEqMacro Data, Reg
257
258 #define GetCorePositionInStack(Pos, MpId, Tmp) GetCorePositionInStack Pos, MpId, Tmp
259
260 #define SetPrimaryStack(StackTop,GlobalSize,Tmp) SetPrimaryStack StackTop, GlobalSize, Tmp
261
262 #endif
263
264 #endif