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git.proxmox.com Git - mirror_edk2.git/blob - ArmPkg/Include/Chipset/AArch64.h
3 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
4 Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
19 #include <Chipset/AArch64Mmu.h>
20 #include <Chipset/ArmArchTimer.h>
22 // ARM Interrupt ID in Exception Table
23 #define ARM_ARCH_EXCEPTION_IRQ EXCEPT_AARCH64_IRQ
25 // CPACR - Coprocessor Access Control Register definitions
26 #define CPACR_TTA_EN (1UL << 28)
27 #define CPACR_FPEN_EL1 (1UL << 20)
28 #define CPACR_FPEN_FULL (3UL << 20)
29 #define CPACR_CP_FULL_ACCESS 0x300000
31 // Coprocessor Trap Register (CPTR)
32 #define AARCH64_CPTR_TFP (1 << 10)
34 // ID_AA64PFR0 - AArch64 Processor Feature Register 0 definitions
35 #define AARCH64_PFR0_FP (0xF << 16)
37 // SCR - Secure Configuration Register definitions
38 #define SCR_NS (1 << 0)
39 #define SCR_IRQ (1 << 1)
40 #define SCR_FIQ (1 << 2)
41 #define SCR_EA (1 << 3)
42 #define SCR_FW (1 << 4)
43 #define SCR_AW (1 << 5)
45 // MIDR - Main ID Register definitions
46 #define ARM_CPU_TYPE_MASK 0xFFF
47 #define ARM_CPU_TYPE_AEMv8 0xD0F
48 #define ARM_CPU_TYPE_A15 0xC0F
49 #define ARM_CPU_TYPE_A9 0xC09
50 #define ARM_CPU_TYPE_A5 0xC05
52 // Hypervisor Configuration Register
53 #define ARM_HCR_FMO BIT3
54 #define ARM_HCR_IMO BIT4
55 #define ARM_HCR_AMO BIT5
56 #define ARM_HCR_TGE BIT27
58 // AArch64 Exception Level
59 #define AARCH64_EL3 0xC
60 #define AARCH64_EL2 0x8
61 #define AARCH64_EL1 0x4
63 #define ARM_VECTOR_TABLE_ALIGNMENT ((1 << 11)-1)
67 ArmEnableSWPInstruction (
91 ArmIsArchTimerImplemented (
133 ArmDisableAlignmentCheck (
140 ArmEnableAlignmentCheck (
146 ArmDisableAllExceptions (
161 PageAttributeToGcdAttribute (
162 IN UINT64 PageAttributes
166 GcdAttributeToPageAttribute (
167 IN UINT64 GcdAttributes
175 #endif // __AARCH64_H__