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1 /** @file
2 Generic ARM implementation of TimerLib.h
3
4 Copyright (c) 2011-2012, ARM Limited. All rights reserved.
5
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16
17 #include <Base.h>
18 #include <Library/BaseLib.h>
19 #include <Library/TimerLib.h>
20 #include <Library/DebugLib.h>
21 #include <Library/PcdLib.h>
22 #include <Library/ArmV7ArchTimerLib.h>
23 #include <Chipset/ArmV7.h>
24
25 #define TICKS_PER_MICRO_SEC (PcdGet32 (PcdArmArchTimerFreqInHz)/1000000U)
26
27 RETURN_STATUS
28 EFIAPI
29 TimerConstructor (
30 VOID
31 )
32 {
33 // Check if the ARM Generic Timer Extension is implemented
34 if (ArmIsArchTimerImplemented ()) {
35
36 UINTN TimerFreq;
37
38 // Check if Architectural Timer frequency is valid number (should not be 0)
39 ASSERT (PcdGet32 (PcdArmArchTimerFreqInHz));
40
41 // Check if ticks/uS is not 0. The Architectural timer runs at constant
42 // frequency irrespective of CPU frequency. According to General Timer Ref
43 // manual lower bound of the frequency is in the range of 1-10MHz
44 ASSERT (TICKS_PER_MICRO_SEC);
45
46 // If the security extensions are not implemented set Timer Frequency
47 if ((ArmReadIdPfr1 () & 0xF0) == 0x0) {
48 ArmArchTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));
49 }
50
51 // Architectural Timer Frequency must be set in the Secure privileged(if secure extensions are supported) mode.
52 // If the reset value (0) is returned just ASSERT.
53 TimerFreq = ArmArchTimerGetTimerFreq ();
54 ASSERT (TimerFreq);
55
56 } else {
57 DEBUG ((EFI_D_ERROR, "ARM Architectural Timer is not available in the CPU, hence this library can not be used.\n"));
58 ASSERT (0);
59 }
60
61 return RETURN_SUCCESS;
62 }
63
64
65 /**
66 Stalls the CPU for the number of microseconds specified by MicroSeconds.
67
68 @param MicroSeconds The minimum number of microseconds to delay.
69
70 @return The value of MicroSeconds inputted.
71
72 **/
73 UINTN
74 EFIAPI
75 MicroSecondDelay (
76 IN UINTN MicroSeconds
77 )
78 {
79 UINT64 TimerTicks64;
80 UINT64 SystemCounterVal;
81
82 // Calculate counter ticks that can represent requested delay
83 TimerTicks64 = MultU64x32 (MicroSeconds, TICKS_PER_MICRO_SEC);
84
85 // Read System Counter value
86 SystemCounterVal = ArmArchTimerGetSystemCount ();
87
88 TimerTicks64 += SystemCounterVal;
89
90 // Wait until delay count is expired.
91 while (SystemCounterVal < TimerTicks64) {
92 SystemCounterVal = ArmArchTimerGetSystemCount ();
93 }
94
95 return MicroSeconds;
96 }
97
98
99 /**
100 Stalls the CPU for at least the given number of nanoseconds.
101
102 Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
103
104 When the timer frequency is 1MHz, each tick corresponds to 1 microsecond.
105 Therefore, the nanosecond delay will be rounded up to the nearest 1 microsecond.
106
107 @param NanoSeconds The minimum number of nanoseconds to delay.
108
109 @return The value of NanoSeconds inputed.
110
111 **/
112 UINTN
113 EFIAPI
114 NanoSecondDelay (
115 IN UINTN NanoSeconds
116 )
117 {
118 UINTN MicroSeconds;
119
120 // Round up to 1us Tick Number
121 MicroSeconds = NanoSeconds / 1000;
122 MicroSeconds += ((NanoSeconds % 1000) == 0) ? 0 : 1;
123
124 MicroSecondDelay (MicroSeconds);
125
126 return NanoSeconds;
127 }
128
129 /**
130 Retrieves the current value of a 64-bit free running performance counter.
131
132 The counter can either count up by 1 or count down by 1. If the physical
133 performance counter counts by a larger increment, then the counter values
134 must be translated. The properties of the counter can be retrieved from
135 GetPerformanceCounterProperties().
136
137 @return The current value of the free running performance counter.
138
139 **/
140 UINT64
141 EFIAPI
142 GetPerformanceCounter (
143 VOID
144 )
145 {
146 // Just return the value of system count
147 return ArmArchTimerGetSystemCount ();
148 }
149
150 /**
151 Retrieves the 64-bit frequency in Hz and the range of performance counter
152 values.
153
154 If StartValue is not NULL, then the value that the performance counter starts
155 with immediately after is it rolls over is returned in StartValue. If
156 EndValue is not NULL, then the value that the performance counter end with
157 immediately before it rolls over is returned in EndValue. The 64-bit
158 frequency of the performance counter in Hz is always returned. If StartValue
159 is less than EndValue, then the performance counter counts up. If StartValue
160 is greater than EndValue, then the performance counter counts down. For
161 example, a 64-bit free running counter that counts up would have a StartValue
162 of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
163 that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
164
165 @param StartValue The value the performance counter starts with when it
166 rolls over.
167 @param EndValue The value that the performance counter ends with before
168 it rolls over.
169
170 @return The frequency in Hz.
171
172 **/
173 UINT64
174 EFIAPI
175 GetPerformanceCounterProperties (
176 OUT UINT64 *StartValue, OPTIONAL
177 OUT UINT64 *EndValue OPTIONAL
178 )
179 {
180 if (StartValue != NULL) {
181 // Timer starts with the reload value
182 *StartValue = (UINT64)0ULL ;
183 }
184
185 if (EndValue != NULL) {
186 // Timer counts down to 0x0
187 *EndValue = 0xFFFFFFFFFFFFFFFFUL;
188 }
189
190 return (UINT64)ArmArchTimerGetTimerFreq ();
191 }