ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c

   1 /** @file
   2
   3   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
   4   Copyright (c) 2011 - 2021, ARM Limited. All rights reserved.
   5
   6   SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8 **/
   9 #include <Base.h>
  10 #include <Library/ArmLib.h>
  11 #include <Library/DebugLib.h>
  12 #include <Library/PcdLib.h>
  13
  14 STATIC
  15 VOID
  16 CacheRangeOperation (
  17   IN  VOID            *Start,
  18   IN  UINTN           Length,
  19   IN  LINE_OPERATION  LineOperation,
  20   IN  UINTN           LineLength
  21   )
  22 {
  23   UINTN  ArmCacheLineAlignmentMask;
  24   // Align address (rounding down)
  25   UINTN  AlignedAddress;
  26   UINTN  EndAddress;
  27
  28   ArmCacheLineAlignmentMask = LineLength - 1;
  29   AlignedAddress            = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
  30   EndAddress                = (UINTN)Start + Length;
  31
  32   // Perform the line operation on an address in each cache line
  33   while (AlignedAddress < EndAddress) {
  34     LineOperation (AlignedAddress);
  35     AlignedAddress += LineLength;
  36   }
  37
  38   ArmDataSynchronizationBarrier ();
  39 }
  40
  41 VOID
  42 EFIAPI
  43 InvalidateInstructionCache (
  44   VOID
  45   )
  46 {
  47   ASSERT (FALSE);
  48 }
  49
  50 VOID
  51 EFIAPI
  52 InvalidateDataCache (
  53   VOID
  54   )
  55 {
  56   ASSERT (FALSE);
  57 }
  58
  59 VOID *
  60 EFIAPI
  61 InvalidateInstructionCacheRange (
  62   IN      VOID   *Address,
  63   IN      UINTN  Length
  64   )
  65 {
  66   CacheRangeOperation (
  67     Address,
  68     Length,
  69     ArmCleanDataCacheEntryToPoUByMVA,
  70     ArmDataCacheLineLength ()
  71     );
  72   CacheRangeOperation (
  73     Address,
  74     Length,
  75     ArmInvalidateInstructionCacheEntryToPoUByMVA,
  76     ArmInstructionCacheLineLength ()
  77     );
  78
  79   ArmInstructionSynchronizationBarrier ();
  80
  81   return Address;
  82 }
  83
  84 VOID
  85 EFIAPI
  86 WriteBackInvalidateDataCache (
  87   VOID
  88   )
  89 {
  90   ASSERT (FALSE);
  91 }
  92
  93 VOID *
  94 EFIAPI
  95 WriteBackInvalidateDataCacheRange (
  96   IN      VOID   *Address,
  97   IN      UINTN  Length
  98   )
  99 {
 100   CacheRangeOperation (
 101     Address,
 102     Length,
 103     ArmCleanInvalidateDataCacheEntryByMVA,
 104     ArmDataCacheLineLength ()
 105     );
 106   return Address;
 107 }
 108
 109 VOID
 110 EFIAPI
 111 WriteBackDataCache (
 112   VOID
 113   )
 114 {
 115   ASSERT (FALSE);
 116 }
 117
 118 VOID *
 119 EFIAPI
 120 WriteBackDataCacheRange (
 121   IN      VOID   *Address,
 122   IN      UINTN  Length
 123   )
 124 {
 125   CacheRangeOperation (
 126     Address,
 127     Length,
 128     ArmCleanDataCacheEntryByMVA,
 129     ArmDataCacheLineLength ()
 130     );
 131   return Address;
 132 }
 133
 134 VOID *
 135 EFIAPI
 136 InvalidateDataCacheRange (
 137   IN      VOID   *Address,
 138   IN      UINTN  Length
 139   )
 140 {
 141   CacheRangeOperation (
 142     Address,
 143     Length,
 144     ArmInvalidateDataCacheEntryByMVA,
 145     ArmDataCacheLineLength ()
 146     );
 147   return Address;
 148 }