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ArmPkg/ArmBaseLib: clean up directory structure
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1 #------------------------------------------------------------------------------
2 #
3 # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
4 # Copyright (c) 2011-2013, ARM Limited. All rights reserved.
5 # Copyright (c) 2016, Linaro Limited. All rights reserved.
6 #
7 # This program and the accompanying materials
8 # are licensed and made available under the terms and conditions of the BSD License
9 # which accompanies this distribution. The full text of the license may be found at
10 # http://opensource.org/licenses/bsd-license.php
11 #
12 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14 #
15 #------------------------------------------------------------------------------
16
17 #include <AsmMacroIoLib.h>
18
19 ASM_FUNC(ArmIsMpCore)
20 mrc p15,0,R0,c0,c0,5
21 // Get Multiprocessing extension (bit31) & U bit (bit30)
22 and R0, R0, #0xC0000000
23 // if (bit31 == 1) && (bit30 == 0) then the processor is part of a multiprocessor system
24 cmp R0, #0x80000000
25 moveq R0, #1
26 movne R0, #0
27 bx LR
28
29 ASM_FUNC(ArmEnableAsynchronousAbort)
30 cpsie a
31 isb
32 bx LR
33
34 ASM_FUNC(ArmDisableAsynchronousAbort)
35 cpsid a
36 isb
37 bx LR
38
39 ASM_FUNC(ArmEnableIrq)
40 cpsie i
41 isb
42 bx LR
43
44 ASM_FUNC(ArmDisableIrq)
45 cpsid i
46 isb
47 bx LR
48
49 ASM_FUNC(ArmEnableFiq)
50 cpsie f
51 isb
52 bx LR
53
54 ASM_FUNC(ArmDisableFiq)
55 cpsid f
56 isb
57 bx LR
58
59 ASM_FUNC(ArmEnableInterrupts)
60 cpsie if
61 isb
62 bx LR
63
64 ASM_FUNC(ArmDisableInterrupts)
65 cpsid if
66 isb
67 bx LR
68
69 // UINT32
70 // ReadCCSIDR (
71 // IN UINT32 CSSELR
72 // )
73 ASM_FUNC(ReadCCSIDR)
74 mcr p15,2,r0,c0,c0,0 @ Write Cache Size Selection Register (CSSELR)
75 isb
76 mrc p15,1,r0,c0,c0,0 @ Read current CP15 Cache Size ID Register (CCSIDR)
77 bx lr
78
79 // UINT32
80 // ReadCLIDR (
81 // IN UINT32 CSSELR
82 // )
83 ASM_FUNC(ReadCLIDR)
84 mrc p15,1,r0,c0,c0,1 @ Read CP15 Cache Level ID Register
85 bx lr
86
87 ASM_FUNC(ArmReadNsacr)
88 mrc p15, 0, r0, c1, c1, 2
89 bx lr
90
91 ASM_FUNC(ArmWriteNsacr)
92 mcr p15, 0, r0, c1, c1, 2
93 bx lr
94
95 ASM_FUNCTION_REMOVE_IF_UNREFERENCED