1 #------------------------------------------------------------------------------
3 # Copyright (c) 2008-2009 Apple Inc. All rights reserved.
5 # All rights reserved. This program and the accompanying materials
6 # are licensed and made available under the terms and conditions of the BSD License
7 # which accompanies this distribution. The full text of the license may be found at
8 # http://opensource.org/licenses/bsd-license.php
10 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 #------------------------------------------------------------------------------
17 .globl ASM_PFX(ArmCleanInvalidateDataCache)
18 .globl ASM_PFX(ArmCleanDataCache)
19 .globl ASM_PFX(ArmInvalidateDataCache)
20 .globl ASM_PFX(ArmInvalidateInstructionCache)
21 .globl ASM_PFX(ArmInvalidateDataCacheEntryByMVA)
22 .globl ASM_PFX(ArmCleanDataCacheEntryByMVA)
23 .globl ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA)
24 .globl ASM_PFX(ArmEnableMmu)
25 .globl ASM_PFX(ArmDisableMmu)
26 .globl ASM_PFX(ArmMmuEnabled)
27 .globl ASM_PFX(ArmEnableDataCache)
28 .globl ASM_PFX(ArmDisableDataCache)
29 .globl ASM_PFX(ArmEnableInstructionCache)
30 .globl ASM_PFX(ArmDisableInstructionCache)
31 .globl ASM_PFX(ArmEnableBranchPrediction)
32 .globl ASM_PFX(ArmDisableBranchPrediction)
37 #------------------------------------------------------------------------------
39 ASM_PFX(ArmInvalidateDataCacheEntryByMVA):
40 mcr p15, 0, r0, c7, c6, 1 @ invalidate single data cache line
43 ASM_PFX(ArmCleanDataCacheEntryByMVA):
44 mcr p15, 0, r0, c7, c10, 1 @ clean single data cache line
47 ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA):
48 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate single data cache line
51 ASM_PFX(ArmEnableInstructionCache):
53 mrc p15,0,r0,c1,c0,0 @Read control register configuration data
54 orr r0,r0,r1 @Set I bit
55 mcr p15,0,r0,c1,c0,0 @Write control register configuration data
58 ASM_PFX(ArmDisableInstructionCache):
60 mrc p15,0,r0,c1,c0,0 @Read control register configuration data
61 bic r0,r0,r1 @Clear I bit.
62 mcr p15,0,r0,c1,c0,0 @Write control register configuration data
65 ASM_PFX(ArmInvalidateInstructionCache):
67 mcr p15,0,r0,c7,c5,0 @Invalidate entire Instruction cache.
68 @Also flushes the branch target cache.
70 mcr p15,0,r0,c7,c10,4 @Data write buffer
73 ASM_PFX(ArmEnableMmu):
79 ASM_PFX(ArmMmuEnabled):
84 ASM_PFX(ArmDisableMmu):
89 mcr p15,0,R0,c7,c10,4 @Drain write buffer
92 ASM_PFX(ArmEnableDataCache):
94 mrc p15,0,R0,c1,c0,0 @Read control register configuration data
95 orr R0,R0,R1 @Set C bit
96 mcr p15,0,r0,c1,c0,0 @Write control register configuration data
99 ASM_PFX(ArmDisableDataCache):
101 mrc p15,0,R0,c1,c0,0 @Read control register configuration data
102 bic R0,R0,R1 @Clear C bit
103 mcr p15,0,r0,c1,c0,0 @Write control register configuration data
106 ASM_PFX(ArmCleanDataCache):
107 mrc p15,0,r15,c7,c10,3
108 bne ASM_PFX(ArmCleanDataCache)
110 mcr p15,0,R0,c7,c10,4 @Drain write buffer
113 ASM_PFX(ArmInvalidateDataCache):
115 mcr p15,0,R0,c7,c6,0 @Invalidate entire data cache
117 mcr p15,0,R0,c7,c10,4 @Drain write buffer
120 ASM_PFX(ArmCleanInvalidateDataCache):
121 mrc p15,0,r15,c7,c14,3
122 bne ASM_PFX(ArmCleanInvalidateDataCache)
124 mcr p15,0,R0,c7,c10,4 @Drain write buffer
127 ASM_PFX(ArmEnableBranchPrediction):
128 bx LR @Branch prediction is not supported.
130 ASM_PFX(ArmDisableBranchPrediction):
131 bx LR @Branch prediction is not supported.
133 ASM_FUNCTION_REMOVE_IF_UNREFERENCED