ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.S

   1 #------------------------------------------------------------------------------
   2 #
   3 # Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
   4 #
   5 # This program and the accompanying materials
   6 # are licensed and made available under the terms and conditions of the BSD License
   7 # which accompanies this distribution.  The full text of the license may be found at
   8 # http://opensource.org/licenses/bsd-license.php
   9 #
  10 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 #
  13 #------------------------------------------------------------------------------
  14
  15 .globl ASM_PFX(Cp15IdCode)
  16 .globl ASM_PFX(Cp15CacheInfo)
  17 .globl ASM_PFX(ArmEnableInterrupts)
  18 .globl ASM_PFX(ArmDisableInterrupts)
  19 .globl ASM_PFX(ArmGetInterruptState)
  20 .globl ASM_PFX(ArmEnableFiq)
  21 .globl ASM_PFX(ArmDisableFiq)
  22 .globl ASM_PFX(ArmGetFiqState)
  23 .globl ASM_PFX(ArmInvalidateTlb)
  24 .globl ASM_PFX(ArmSetTranslationTableBaseAddress)
  25 .globl ASM_PFX(ArmGetTranslationTableBaseAddress)
  26 .globl ASM_PFX(ArmSetDomainAccessControl)
  27 .globl ASM_PFX(ArmUpdateTranslationTableEntry)
  28 .globl ASM_PFX(CPSRMaskInsert)
  29 .globl ASM_PFX(CPSRRead)
  30 .globl ASM_PFX(ReadCCSIDR)
  31 .globl ASM_PFX(ReadCLIDR)
  32
  33 .text
  34 .align 2
  35
  36 #------------------------------------------------------------------------------
  37
  38 ASM_PFX(Cp15IdCode):
  39   mrc     p15,0,R0,c0,c0,0
  40   bx      LR
  41
  42 ASM_PFX(Cp15CacheInfo):
  43   mrc     p15,0,R0,c0,c0,1
  44   bx      LR
  45
  46 ASM_PFX(ArmEnableInterrupts):
  47   cpsie   i
  48         bx      LR
  49
  50 ASM_PFX(ArmDisableInterrupts):
  51   cpsid   i
  52         bx      LR
  53
  54 ASM_PFX(ArmGetInterruptState):
  55         mrs     R0,CPSR
  56         tst     R0,#0x80            @Check if IRQ is enabled.
  57         moveq   R0,#1
  58         movne   R0,#0
  59         bx      LR
  60
  61 ASM_PFX(ArmEnableFiq):
  62   cpsie   f
  63         bx      LR
  64
  65 ASM_PFX(ArmDisableFiq):
  66   cpsid   f
  67         bx      LR
  68
  69 ASM_PFX(ArmGetFiqState):
  70         mrs     R0,CPSR
  71         tst     R0,#0x40            @Check if FIQ is enabled.
  72         moveq   R0,#1
  73         movne   R0,#0
  74         bx      LR
  75
  76 ASM_PFX(ArmInvalidateTlb):
  77   mov     r0,#0
  78   mcr     p15,0,r0,c8,c7,0
  79   mcr     p15,0,R9,c7,c5,6      @ BPIALL Invalidate Branch predictor array. R9 == NoOp
  80   dsb
  81   isb
  82   bx      lr
  83
  84 ASM_PFX(ArmSetTranslationTableBaseAddress):
  85   mcr     p15,0,r0,c2,c0,0
  86   isb
  87   bx      lr
  88
  89 ASM_PFX(ArmGetTranslationTableBaseAddress):
  90   mrc     p15,0,r0,c2,c0,0
  91   isb
  92   bx      lr
  93
  94
  95 ASM_PFX(ArmSetDomainAccessControl):
  96   mcr     p15,0,r0,c3,c0,0
  97   isb
  98   bx      lr
  99
 100 //
 101 //VOID
 102 //ArmUpdateTranslationTableEntry (
 103 //  IN VOID  *TranslationTableEntry  // R0
 104 //  IN VOID  *MVA                    // R1
 105 //  );
 106 ASM_PFX(ArmUpdateTranslationTableEntry):
 107   mcr     p15,0,R0,c7,c14,1     @ DCCIMVAC Clean data cache by MVA
 108   dsb
 109   mcr     p15,0,R1,c8,c7,1      @ TLBIMVA TLB Invalidate MVA
 110   mcr     p15,0,R9,c7,c5,6      @ BPIALL Invalidate Branch predictor array. R9 == NoOp
 111   dsb
 112   isb
 113   bx      lr
 114
 115 ASM_PFX(CPSRMaskInsert):    @ on entry, r0 is the mask and r1 is the field to insert
 116   stmfd   sp!, {r4-r12, lr} @ save all the banked registers
 117   mov     r3, sp            @ copy the stack pointer into a non-banked register
 118   mrs     r2, cpsr          @ read the cpsr
 119   bic     r2, r2, r0        @ clear mask in the cpsr
 120   and     r1, r1, r0        @ clear bits outside the mask in the input
 121   orr     r2, r2, r1        @ set field
 122   msr     cpsr_cxsf, r2     @ write back cpsr (may have caused a mode switch)
 123   isb
 124   mov     sp, r3            @ restore stack pointer
 125   ldmfd   sp!, {r4-r12, lr} @ restore registers
 126   bx      lr                @ return (hopefully thumb-safe!)
 127
 128 ASM_PFX(CPSRRead):
 129   mrs     r0, cpsr
 130   bx      lr
 131
 132 // UINT32
 133 // ReadCCSIDR (
 134 //   IN UINT32 CSSELR
 135 //   )
 136 ASM_PFX(ReadCCSIDR):
 137   mcr p15,2,r0,c0,c0,0   @ Write Cache Size Selection Register (CSSELR)
 138   isb
 139   mrc p15,1,r0,c0,c0,0   @ Read current CP15 Cache Size ID Register (CCSIDR)
 140   bx  lr
 141
 142 // UINT32
 143 // ReadCLIDR (
 144 //   IN UINT32 CSSELR
 145 //   )
 146 ASM_PFX(ReadCLIDR):
 147   mrc p15,1,r0,c0,c0,1 @ Read CP15 Cache Level ID Register
 148   bx  lr
 149
 150 ASM_FUNCTION_REMOVE_IF_UNREFERENCED