ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.S

   1 #------------------------------------------------------------------------------
   2 #
   3 # Copyright (c) 2008-2009 Apple Inc. All rights reserved.
   4 #
   5 # All rights reserved. This program and the accompanying materials
   6 # are licensed and made available under the terms and conditions of the BSD License
   7 # which accompanies this distribution.  The full text of the license may be found at
   8 # http://opensource.org/licenses/bsd-license.php
   9 #
  10 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 #
  13 #------------------------------------------------------------------------------
  14
  15 .text
  16 .align 2
  17 .globl ASM_PFX(Cp15IdCode)
  18 .globl ASM_PFX(Cp15CacheInfo)
  19 .globl ASM_PFX(ArmEnableInterrupts)
  20 .globl ASM_PFX(ArmDisableInterrupts)
  21 .globl ASM_PFX(ArmGetInterruptState)
  22 .globl ASM_PFX(ArmInvalidateTlb)
  23 .globl ASM_PFX(ArmSetTranslationTableBaseAddress)
  24 .globl ASM_PFX(ArmGetTranslationTableBaseAddress)
  25 .globl ASM_PFX(ArmSetDomainAccessControl)
  26 .globl ASM_PFX(CPSRMaskInsert)
  27 .globl ASM_PFX(CPSRRead)
  28 .globl ASM_PFX(ReadCCSIDR)
  29 .globl ASM_PFX(ReadCLIDR)
  30
  31
  32 #------------------------------------------------------------------------------
  33
  34 ASM_PFX(Cp15IdCode):
  35   mrc     p15,0,R0,c0,c0,0
  36   bx      LR
  37
  38 ASM_PFX(Cp15CacheInfo):
  39   mrc     p15,0,R0,c0,c0,1
  40   bx      LR
  41
  42 ASM_PFX(ArmEnableInterrupts):
  43   cpsie   i
  44         bx      LR
  45
  46 ASM_PFX(ArmDisableInterrupts):
  47   cpsid   i
  48         bx      LR
  49
  50 ASM_PFX(ArmGetInterruptState):
  51         mrs     R0,CPSR
  52         tst     R0,#0x80            @Check if IRQ is enabled.
  53         moveq   R0,#1
  54         movne   R0,#0
  55         bx      LR
  56
  57 ASM_PFX(ArmInvalidateTlb):
  58   mov     r0,#0
  59   mcr     p15,0,r0,c8,c7,0
  60   isb
  61   bx      lr
  62
  63 ASM_PFX(ArmSetTranslationTableBaseAddress):
  64   mcr     p15,0,r0,c2,c0,0
  65   isb
  66   bx      lr
  67
  68 ASM_PFX(ArmGetTranslationTableBaseAddress):
  69   mrc     p15,0,r0,c2,c0,0
  70   bx      lr
  71
  72
  73 ASM_PFX(ArmSetDomainAccessControl):
  74   mcr     p15,0,r0,c3,c0,0
  75   isb
  76   bx      lr
  77
  78 ASM_PFX(CPSRMaskInsert):    @ on entry, r0 is the mask and r1 is the field to insert
  79   stmfd   sp!, {r4-r12, lr} @ save all the banked registers
  80   mov     r3, sp            @ copy the stack pointer into a non-banked register
  81   mrs     r2, cpsr          @ read the cpsr
  82   bic     r2, r2, r0        @ clear mask in the cpsr
  83   and     r1, r1, r0        @ clear bits outside the mask in the input
  84   orr     r2, r2, r1        @ set field
  85   msr     cpsr_cxsf, r2     @ write back cpsr (may have caused a mode switch)
  86   mov     sp, r3            @ restore stack pointer
  87   ldmfd   sp!, {r4-r12, lr} @ restore registers
  88   bx      lr                @ return (hopefully thumb-safe!)
  89
  90 ASM_PFX(CPSRRead):
  91   mrs     r0, cpsr
  92   bx      lr
  93
  94 ASM_PFX(ReadCCSIDR):
  95   mcr p15,2,r0,c0,c0,0   @ Write Cache Size Selection Register (CSSELR)
  96   isb
  97   mrc p15,1,r0,c0,c0,0   @ Read current CP15 Cache Size ID Register (CCSIDR)
  98   bx  lr
  99
 100
 101 ASM_PFX(ReadCLIDR):
 102   mrc p15,1,r0,c0,c0,1 @ Read CP15 Cache Level ID Register
 103
 104 ASM_FUNCTION_REMOVE_IF_UNREFERENCED