1 //------------------------------------------------------------------------------
3 // Copyright (c) 2011, ARM Limited. All rights reserved.
5 // This program and the accompanying materials
6 // are licensed and made available under the terms and conditions of the BSD License
7 // which accompanies this distribution. The full text of the license may be found at
8 // http://opensource.org/licenses/bsd-license.php
10 // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 //------------------------------------------------------------------------------
19 EXPORT ArmWriteCntkCtl
20 EXPORT ArmReadCntpTval
21 EXPORT ArmWriteCntpTval
23 EXPORT ArmWriteCntpCtl
24 EXPORT ArmReadCntvTval
25 EXPORT ArmWriteCntvTval
27 EXPORT ArmWriteCntvCtl
29 EXPORT ArmReadCntpCval
30 EXPORT ArmWriteCntpCval
31 EXPORT ArmReadCntvCval
32 EXPORT ArmWriteCntvCval
34 EXPORT ArmWriteCntvOff
36 AREA ArmV7ArchTimerSupport, CODE, READONLY
40 mrc p15, 0, r0, c14, c0, 0 ; Read CNTFRQ
44 mcr p15, 0, r0, c14, c0, 0 ; Write to CNTFRQ
48 mrrc p15, 0, r0, r1, c14 ; Read CNTPT (Physical counter register)
52 mrc p15, 0, r0, c14, c1, 0 ; Read CNTK_CTL (Timer PL1 Control Register)
56 mcr p15, 0, r0, c14, c1, 0 ; Write to CNTK_CTL (Timer PL1 Control Register)
60 mrc p15, 0, r0, c14, c2, 0 ; Read CNTP_TVAL (PL1 physical timer value register)
64 mcr p15, 0, r0, c14, c2, 0 ; Write to CNTP_TVAL (PL1 physical timer value register)
68 mrc p15, 0, r0, c14, c2, 1 ; Read CNTP_CTL (PL1 Physical Timer Control Register)
72 mcr p15, 0, r0, c14, c2, 1 ; Write to CNTP_CTL (PL1 Physical Timer Control Register)
76 mrc p15, 0, r0, c14, c3, 0 ; Read CNTV_TVAL (Virtual Timer Value register)
80 mcr p15, 0, r0, c14, c3, 0 ; Write to CNTV_TVAL (Virtual Timer Value register)
84 mrc p15, 0, r0, c14, c3, 1 ; Read CNTV_CTL (Virtual Timer Control Register)
88 mcr p15, 0, r0, c14, c3, 1 ; Write to CNTV_CTL (Virtual Timer Control Register)
92 mrrc p15, 1, r0, r1, c14 ; Read CNTVCT (Virtual Count Register)
96 mrrc p15, 2, r0, r1, c14 ; Read CNTP_CTVAL (Physical Timer Compare Value Register)
100 mcrr p15, 2, r0, r1, c14 ; Write to CNTP_CTVAL (Physical Timer Compare Value Register)
104 mrrc p15, 3, r0, r1, c14 ; Read CNTV_CTVAL (Virtual Timer Compare Value Register)
108 mcrr p15, 3, r0, r1, c14 ; write to CNTV_CTVAL (Virtual Timer Compare Value Register)
112 mrrc p15, 4, r0, r1, c14 ; Read CNTVOFF (virtual Offset register)
116 mcrr p15, 4, r0, r1, c14 ; Write to CNTVOFF (Virtual Offset register)