ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S

   1 #------------------------------------------------------------------------------
   2 #
   3 # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
   4 # Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
   5 #
   6 # This program and the accompanying materials
   7 # are licensed and made available under the terms and conditions of the BSD License
   8 # which accompanies this distribution.  The full text of the license may be found at
   9 # http://opensource.org/licenses/bsd-license.php
  10 #
  11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 #
  14 #------------------------------------------------------------------------------
  15
  16 #include <AsmMacroIoLibV8.h>
  17
  18 .text
  19 .align 3
  20 GCC_ASM_EXPORT (ArmReadMidr)
  21 GCC_ASM_EXPORT (ArmCacheInfo)
  22 GCC_ASM_EXPORT (ArmGetInterruptState)
  23 GCC_ASM_EXPORT (ArmGetFiqState)
  24 GCC_ASM_EXPORT (ArmGetTTBR0BaseAddress)
  25 GCC_ASM_EXPORT (ArmSetTTBR0)
  26 GCC_ASM_EXPORT (ArmGetTCR)
  27 GCC_ASM_EXPORT (ArmSetTCR)
  28 GCC_ASM_EXPORT (ArmGetMAIR)
  29 GCC_ASM_EXPORT (ArmSetMAIR)
  30 GCC_ASM_EXPORT (ArmWriteCpacr)
  31 GCC_ASM_EXPORT (ArmWriteAuxCr)
  32 GCC_ASM_EXPORT (ArmReadAuxCr)
  33 GCC_ASM_EXPORT (ArmInvalidateTlb)
  34 GCC_ASM_EXPORT (ArmUpdateTranslationTableEntry)
  35 GCC_ASM_EXPORT (ArmWriteCptr)
  36 GCC_ASM_EXPORT (ArmWriteScr)
  37 GCC_ASM_EXPORT (ArmWriteMVBar)
  38 GCC_ASM_EXPORT (ArmCallWFE)
  39 GCC_ASM_EXPORT (ArmCallSEV)
  40 GCC_ASM_EXPORT (ArmReadCpuActlr)
  41 GCC_ASM_EXPORT (ArmWriteCpuActlr)
  42
  43 #------------------------------------------------------------------------------
  44
  45 .set DAIF_RD_FIQ_BIT,   (1 << 6)
  46 .set DAIF_RD_IRQ_BIT,   (1 << 7)
  47
  48 ASM_PFX(ArmReadMidr):
  49   mrs     x0, midr_el1        // Read from Main ID Register (MIDR)
  50   ret
  51
  52 ASM_PFX(ArmCacheInfo):
  53   mrs     x0, ctr_el0         // Read from Cache Type Regiter (CTR)
  54   ret
  55
  56 ASM_PFX(ArmGetInterruptState):
  57   mrs     x0, daif
  58   tst     w0, #DAIF_RD_IRQ_BIT  // Check if IRQ is enabled. Enabled if 0 (Z=1)
  59   cset    w0, eq                // if Z=1 return 1, else 0
  60   ret
  61
  62 ASM_PFX(ArmGetFiqState):
  63   mrs     x0, daif
  64   tst     w0, #DAIF_RD_FIQ_BIT  // Check if FIQ is enabled. Enabled if 0 (Z=1)
  65   cset    w0, eq                // if Z=1 return 1, else 0
  66   ret
  67
  68 ASM_PFX(ArmWriteCpacr):
  69   msr     cpacr_el1, x0      // Coprocessor Access Control Reg (CPACR)
  70   ret
  71
  72 ASM_PFX(ArmWriteAuxCr):
  73   EL1_OR_EL2(x1)
  74 1:msr     actlr_el1, x0      // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
  75   ret
  76 2:msr     actlr_el2, x0      // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
  77   ret
  78
  79 ASM_PFX(ArmReadAuxCr):
  80   EL1_OR_EL2(x1)
  81 1:mrs     x0, actlr_el1      // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
  82   ret
  83 2:mrs     x0, actlr_el2      // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
  84   ret
  85
  86 ASM_PFX(ArmSetTTBR0):
  87   EL1_OR_EL2_OR_EL3(x1)
  88 1:msr     ttbr0_el1, x0      // Translation Table Base Reg 0 (TTBR0)
  89   b       4f
  90 2:msr     ttbr0_el2, x0      // Translation Table Base Reg 0 (TTBR0)
  91   b       4f
  92 3:msr     ttbr0_el3, x0      // Translation Table Base Reg 0 (TTBR0)
  93 4:isb
  94   ret
  95
  96 ASM_PFX(ArmGetTTBR0BaseAddress):
  97   EL1_OR_EL2(x1)
  98 1:mrs     x0, ttbr0_el1
  99   b       3f
 100 2:mrs     x0, ttbr0_el2
 101 3:LoadConstantToReg(0xFFFFFFFFFFFF, x1) /* Look at bottom 48 bits */
 102   and     x0, x0, x1
 103   isb
 104   ret
 105
 106 ASM_PFX(ArmGetTCR):
 107   EL1_OR_EL2_OR_EL3(x1)
 108 1:mrs     x0, tcr_el1
 109   b       4f
 110 2:mrs     x0, tcr_el2
 111   b       4f
 112 3:mrs     x0, tcr_el3
 113 4:isb
 114   ret
 115
 116 ASM_PFX(ArmSetTCR):
 117   EL1_OR_EL2_OR_EL3(x1)
 118 1:msr     tcr_el1, x0
 119   b       4f
 120 2:msr     tcr_el2, x0
 121   b       4f
 122 3:msr     tcr_el3, x0
 123 4:isb
 124   ret
 125
 126 ASM_PFX(ArmGetMAIR):
 127   EL1_OR_EL2_OR_EL3(x1)
 128 1:mrs     x0, mair_el1
 129   b       4f
 130 2:mrs     x0, mair_el2
 131   b       4f
 132 3:mrs     x0, mair_el3
 133 4:isb
 134   ret
 135
 136 ASM_PFX(ArmSetMAIR):
 137   EL1_OR_EL2_OR_EL3(x1)
 138 1:msr     mair_el1, x0
 139   b       4f
 140 2:msr     mair_el2, x0
 141   b       4f
 142 3:msr     mair_el3, x0
 143 4:isb
 144   ret
 145
 146
 147 //
 148 //VOID
 149 //ArmUpdateTranslationTableEntry (
 150 //  IN VOID  *TranslationTableEntry  // X0
 151 //  IN VOID  *MVA                    // X1
 152 //  );
 153 ASM_PFX(ArmUpdateTranslationTableEntry):
 154    dc      civac, x0             // Clean and invalidate data line
 155    dsb     sy
 156    EL1_OR_EL2_OR_EL3(x0)
 157 1: tlbi    vaae1, x1             // TLB Invalidate VA , EL1
 158    b       4f
 159 2: tlbi    vae2, x1              // TLB Invalidate VA , EL2
 160    b       4f
 161 3: tlbi    vae3, x1              // TLB Invalidate VA , EL3
 162 4: dsb     sy
 163    isb
 164    ret
 165
 166 ASM_PFX(ArmInvalidateTlb):
 167    EL1_OR_EL2_OR_EL3(x0)
 168 1: tlbi  vmalle1
 169    b     4f
 170 2: tlbi  alle2
 171    b     4f
 172 3: tlbi  alle3
 173 4: dsb   sy
 174    isb
 175    ret
 176
 177 ASM_PFX(ArmWriteCptr):
 178   msr     cptr_el3, x0           // EL3 Coprocessor Trap Reg (CPTR)
 179   ret
 180
 181 ASM_PFX(ArmWriteScr):
 182   msr     scr_el3, x0            // Secure configuration register EL3
 183   isb
 184   ret
 185
 186 ASM_PFX(ArmWriteMVBar):
 187   msr    vbar_el3, x0            // Exception Vector Base address for Monitor on EL3
 188   ret
 189
 190 ASM_PFX(ArmCallWFE):
 191   wfe
 192   ret
 193
 194 ASM_PFX(ArmCallSEV):
 195   sev
 196   ret
 197
 198 ASM_PFX(ArmReadCpuActlr):
 199   mrs   x0, S3_1_c15_c2_0
 200   ret
 201
 202 ASM_PFX(ArmWriteCpuActlr):
 203   msr   S3_1_c15_c2_0, x0
 204   dsb   sy
 205   isb
 206   ret
 207
 208 ASM_FUNCTION_REMOVE_IF_UNREFERENCED