1 //------------------------------------------------------------------------------
3 // Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
5 // This program and the accompanying materials
6 // are licensed and made available under the terms and conditions of the BSD License
7 // which accompanies this distribution. The full text of the license may be found at
8 // http://opensource.org/licenses/bsd-license.php
10 // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 //------------------------------------------------------------------------------
19 EXPORT ArmEnableInterrupts
20 EXPORT ArmDisableInterrupts
21 EXPORT ArmGetInterruptState
25 EXPORT ArmInvalidateTlb
27 EXPORT ArmGetTTBR0BaseAddress
28 EXPORT ArmSetDomainAccessControl
32 AREA ArmLibSupport, CODE, READONLY
44 # Get Multiprocessing extension (bit31) & U bit (bit30)
45 and R0, R0, #0xC0000000
46 # if bit30 == 0 then the processor is part of a multiprocessor system)
47 and R0, R0, #0x80000000
52 bic R0,R0,#0x80 ;Enable IRQ interrupts
58 orr R1,R0,#0x80 ;Disable IRQ interrupts
67 tst R0,#0x80 ;Check if IRQ is enabled.
74 bic R0,R0,#0x40 ;Enable IRQ interrupts
80 orr R1,R0,#0x40 ;Disable IRQ interrupts
89 tst R0,#0x40 ;Check if IRQ is enabled.
103 ArmGetTTBR0BaseAddress
105 and r0, r0, #0xFFFFC000
108 ArmSetDomainAccessControl
112 CPSRMaskInsert ; on entry, r0 is the mask and r1 is the field to insert
113 stmfd sp!, {r4-r12, lr} ; save all the banked registers
114 mov r3, sp ; copy the stack pointer into a non-banked register
115 mrs r2, cpsr ; read the cpsr
116 bic r2, r2, r0 ; clear mask in the cpsr
117 and r1, r1, r0 ; clear bits outside the mask in the input
118 orr r2, r2, r1 ; set field
119 msr cpsr_cxsf, r2 ; write back cpsr (may have caused a mode switch)
120 mov sp, r3 ; restore stack pointer
121 ldmfd sp!, {r4-r12, lr} ; restore registers
122 bx lr ; return (hopefully thumb-safe!)