ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm

   1 ;------------------------------------------------------------------------------
   2 ;
   3 ; SetMem() worker for ARM
   4 ;
   5 ; This file started out as C code that did 64 bit moves if the buffer was
   6 ; 32-bit aligned, else it does a byte copy. It also does a byte copy for
   7 ; any trailing bytes. It was updated to do 32-byte at a time.
   8 ;
   9 ; Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
  10 ; This program and the accompanying materials
  11 ; are licensed and made available under the terms and conditions of the BSD License
  12 ; which accompanies this distribution.  The full text of the license may be found at
  13 ; http://opensource.org/licenses/bsd-license.php
  14 ;
  15 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  16 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  17 ;
  18
  19 /**
  20   Set Buffer to Value for Size bytes.
  21
  22   @param  Buffer   Memory to set.
  23   @param  Length   Number of bytes to set
  24   @param  Value    Value of the set operation.
  25
  26   @return Buffer
  27
  28 VOID *
  29 EFIAPI
  30 InternalMemSetMem (
  31   OUT     VOID                      *Buffer,
  32   IN      UINTN                     Length,
  33   IN      UINT8                     Value
  34   )
  35 **/
  36 \s\s
  37 \s\sEXPORT InternalMemSetMem
  38 \s\s
  39 \s\sAREA AsmMemStuff, CODE, READONLY
  40
  41 InternalMemSetMem
  42 \s\sstmfd\s\ssp!, {r4-r11, lr}
  43 \s\stst\s\s  r0, #3
  44 \s\smovne\s\sr3, #0
  45 \s\smoveq\s\sr3, #1
  46 \s\scmp\s\s  r1, #31
  47 \s\smovls lr, #0
  48 \s\sandhi\s\slr, r3, #1
  49 \s\scmp\s\s  lr, #0
  50 \s\smov\s\s  r12, r0
  51 \s\sbne\s\s  L31
  52 L32
  53 \s\smov\s\s  r3, #0
  54 \s\sb\s\s    L43
  55 L31
  56   and   r4, r2, #0xff
  57   orr   r4, r4, r4, LSL #8
  58   orr   r4, r4, r4, LSL #16
  59 \s\smov   r5, r4
  60 \s\smov   r5, r4
  61 \s\smov   r6, r4
  62 \s\smov   r7, r4
  63 \s\smov   r8, r4
  64 \s\smov   r9, r4
  65 \s\smov   r10, r4
  66 \s\smov   r11, r4
  67 \s\sb\s\s    L32
  68 L34
  69 \s\scmp\s\s    lr, #0
  70 \s\sstreqb\s\sr2, [r12], #1
  71 \s\ssubeq\s\s  r1, r1, #1
  72 \s\sbeq\s\s    L43
  73 \s\ssub\s\s    r1, r1, #32
  74 \s\scmp\s\s    r1, #31
  75 \s\smovls\s\s  lr, r3
  76 \s\sstmia\s\s  r12!, {r4-r11}
  77 L43
  78 \s\scmp\s\s    r1, #0
  79 \s\sbne\s\s    L34
  80 \s\sldmfd\s\s  sp!, {r4-r11, pc}
  81 \s\s
  82   END
  83