ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.S

   1 //------------------------------------------------------------------------------
   2 //
   3 // Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
   4 //
   5 // This program and the accompanying materials
   6 // are licensed and made available under the terms and conditions of the BSD License
   7 // which accompanies this distribution.  The full text of the license may be found at
   8 // http://opensource.org/licenses/bsd-license.php
   9 //
  10 // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 //
  13 //------------------------------------------------------------------------------
  14
  15
  16
  17         .text
  18         .align 2
  19         .globl ASM_PFX(__aeabi_uldivmod)
  20         INTERWORK_FUNC(__aeabi_uldivmod)
  21
  22 //
  23 //UINT64
  24 //EFIAPI
  25 //__aeabi_uldivmod (
  26 //  IN  UINT64   Dividend
  27 //  IN  UINT64   Divisor
  28 //  )
  29 //
  30 ASM_PFX(__aeabi_uldivmod):
  31   stmdb   sp!, {r4, r5, r6, lr}
  32   mov     r4, r1
  33   mov     r5, r0
  34   mov     r6, #0  // 0x0
  35   orrs    ip, r3, r2, lsr #31
  36   bne     ASM_PFX(__aeabi_uldivmod_label1)
  37   tst     r2, r2
  38   beq     ASM_PFX(_ll_div0)
  39   movs    ip, r2, lsr #15
  40   addeq   r6, r6, #16     // 0x10
  41   mov     ip, r2, lsl r6
  42   movs    lr, ip, lsr #23
  43   moveq   ip, ip, lsl #8
  44   addeq   r6, r6, #8      // 0x8
  45   movs    lr, ip, lsr #27
  46   moveq   ip, ip, lsl #4
  47   addeq   r6, r6, #4      // 0x4
  48   movs    lr, ip, lsr #29
  49   moveq   ip, ip, lsl #2
  50   addeq   r6, r6, #2      // 0x2
  51   movs    lr, ip, lsr #30
  52   moveq   ip, ip, lsl #1
  53   addeq   r6, r6, #1      // 0x1
  54   b       ASM_PFX(_ll_udiv_small)
  55 ASM_PFX(__aeabi_uldivmod_label1):
  56   tst     r3, #-2147483648        // 0x80000000
  57   bne     ASM_PFX(__aeabi_uldivmod_label2)
  58   movs    ip, r3, lsr #15
  59   addeq   r6, r6, #16     // 0x10
  60   mov     ip, r3, lsl r6
  61   movs    lr, ip, lsr #23
  62   moveq   ip, ip, lsl #8
  63   addeq   r6, r6, #8      // 0x8
  64   movs    lr, ip, lsr #27
  65   moveq   ip, ip, lsl #4
  66   addeq   r6, r6, #4      // 0x4
  67   movs    lr, ip, lsr #29
  68   moveq   ip, ip, lsl #2
  69   addeq   r6, r6, #2      // 0x2
  70   movs    lr, ip, lsr #30
  71   addeq   r6, r6, #1      // 0x1
  72   rsb     r3, r6, #32     // 0x20
  73   moveq   ip, ip, lsl #1
  74   orr     ip, ip, r2, lsr r3
  75   mov     lr, r2, lsl r6
  76   b       ASM_PFX(_ll_udiv_big)
  77 ASM_PFX(__aeabi_uldivmod_label2):
  78   mov     ip, r3
  79   mov     lr, r2
  80   b       ASM_PFX(_ll_udiv_ginormous)
  81
  82 ASM_PFX(_ll_udiv_small):
  83   cmp     r4, ip, lsl #1
  84   mov     r3, #0  // 0x0
  85   subcs   r4, r4, ip, lsl #1
  86   addcs   r3, r3, #2      // 0x2
  87   cmp     r4, ip
  88   subcs   r4, r4, ip
  89   adcs    r3, r3, #0      // 0x0
  90   add     r2, r6, #32     // 0x20
  91   cmp     r2, #32 // 0x20
  92   rsb     ip, ip, #0      // 0x0
  93   bcc     ASM_PFX(_ll_udiv_small_label1)
  94   orrs    r0, r4, r5, lsr #30
  95   moveq   r4, r5
  96   moveq   r5, #0  // 0x0
  97   subeq   r2, r2, #32     // 0x20
  98 ASM_PFX(_ll_udiv_small_label1):
  99   mov     r1, #0  // 0x0
 100   cmp     r2, #16 // 0x10
 101   bcc     ASM_PFX(_ll_udiv_small_label2)
 102   movs    r0, r4, lsr #14
 103   moveq   r4, r4, lsl #16
 104   addeq   r1, r1, #16     // 0x10
 105 ASM_PFX(_ll_udiv_small_label2):
 106   sub     lr, r2, r1
 107   cmp     lr, #8  // 0x8
 108   bcc     ASM_PFX(_ll_udiv_small_label3)
 109   movs    r0, r4, lsr #22
 110   moveq   r4, r4, lsl #8
 111   addeq   r1, r1, #8      // 0x8
 112 ASM_PFX(_ll_udiv_small_label3):
 113   rsb     r0, r1, #32     // 0x20
 114   sub     r2, r2, r1
 115   orr     r4, r4, r5, lsr r0
 116   mov     r5, r5, lsl r1
 117   cmp     r2, #1  // 0x1
 118   bcc     ASM_PFX(_ll_udiv_small_label5)
 119   sub     r2, r2, #1      // 0x1
 120   and     r0, r2, #7      // 0x7
 121   eor     r0, r0, #7      // 0x7
 122   adds    r0, r0, r0, lsl #1
 123   add     pc, pc, r0, lsl #2
 124   nop                     // (mov r0,r0)
 125 ASM_PFX(_ll_udiv_small_label4):
 126   adcs    r5, r5, r5
 127   adcs    r4, ip, r4, lsl #1
 128   rsbcc   r4, ip, r4
 129   adcs    r5, r5, r5
 130   adcs    r4, ip, r4, lsl #1
 131   rsbcc   r4, ip, r4
 132   adcs    r5, r5, r5
 133   adcs    r4, ip, r4, lsl #1
 134   rsbcc   r4, ip, r4
 135   adcs    r5, r5, r5
 136   adcs    r4, ip, r4, lsl #1
 137   rsbcc   r4, ip, r4
 138   adcs    r5, r5, r5
 139   adcs    r4, ip, r4, lsl #1
 140   rsbcc   r4, ip, r4
 141   adcs    r5, r5, r5
 142   adcs    r4, ip, r4, lsl #1
 143   rsbcc   r4, ip, r4
 144   adcs    r5, r5, r5
 145   adcs    r4, ip, r4, lsl #1
 146   rsbcc   r4, ip, r4
 147   adcs    r5, r5, r5
 148   adcs    r4, ip, r4, lsl #1
 149   sub     r2, r2, #8      // 0x8
 150   tst     r2, r2
 151   rsbcc   r4, ip, r4
 152   bpl     ASM_PFX(_ll_udiv_small_label4)
 153 ASM_PFX(_ll_udiv_small_label5):
 154   mov     r2, r4, lsr r6
 155   bic     r4, r4, r2, lsl r6
 156   adcs    r0, r5, r5
 157   adc     r1, r4, r4
 158   add     r1, r1, r3, lsl r6
 159   mov     r3, #0  // 0x0
 160   ldmia   sp!, {r4, r5, r6, pc}
 161
 162 ASM_PFX(_ll_udiv_big):
 163   subs    r0, r5, lr
 164   mov     r3, #0  // 0x0
 165   sbcs    r1, r4, ip
 166   movcs   r5, r0
 167   movcs   r4, r1
 168   adcs    r3, r3, #0      // 0x0
 169   subs    r0, r5, lr
 170   sbcs    r1, r4, ip
 171   movcs   r5, r0
 172   movcs   r4, r1
 173   adcs    r3, r3, #0      // 0x0
 174   subs    r0, r5, lr
 175   sbcs    r1, r4, ip
 176   movcs   r5, r0
 177   movcs   r4, r1
 178   adcs    r3, r3, #0      // 0x0
 179   mov     r1, #0  // 0x0
 180   rsbs    lr, lr, #0      // 0x0
 181   rsc     ip, ip, #0      // 0x0
 182   cmp     r6, #16 // 0x10
 183   bcc     ASM_PFX(_ll_udiv_big_label1)
 184   movs    r0, r4, lsr #14
 185   moveq   r4, r4, lsl #16
 186   addeq   r1, r1, #16     // 0x10
 187 ASM_PFX(_ll_udiv_big_label1):
 188   sub     r2, r6, r1
 189   cmp     r2, #8  // 0x8
 190   bcc     ASM_PFX(_ll_udiv_big_label2)
 191   movs    r0, r4, lsr #22
 192   moveq   r4, r4, lsl #8
 193   addeq   r1, r1, #8      // 0x8
 194 ASM_PFX(_ll_udiv_big_label2):
 195   rsb     r0, r1, #32     // 0x20
 196   sub     r2, r6, r1
 197   orr     r4, r4, r5, lsr r0
 198   mov     r5, r5, lsl r1
 199   cmp     r2, #1  // 0x1
 200   bcc     ASM_PFX(_ll_udiv_big_label4)
 201   sub     r2, r2, #1      // 0x1
 202   and     r0, r2, #3      // 0x3
 203   rsb     r0, r0, #3      // 0x3
 204   adds    r0, r0, r0, lsl #1
 205   add     pc, pc, r0, lsl #3
 206   nop                     // (mov r0,r0)
 207 ASM_PFX(_ll_udiv_big_label3):
 208   adcs    r5, r5, r5
 209   adcs    r4, r4, r4
 210   adcs    r0, lr, r5
 211   adcs    r1, ip, r4
 212   movcs   r5, r0
 213   movcs   r4, r1
 214   adcs    r5, r5, r5
 215   adcs    r4, r4, r4
 216   adcs    r0, lr, r5
 217   adcs    r1, ip, r4
 218   movcs   r5, r0
 219   movcs   r4, r1
 220   adcs    r5, r5, r5
 221   adcs    r4, r4, r4
 222   adcs    r0, lr, r5
 223   adcs    r1, ip, r4
 224   movcs   r5, r0
 225   movcs   r4, r1
 226   sub     r2, r2, #4      // 0x4
 227   adcs    r5, r5, r5
 228   adcs    r4, r4, r4
 229   adcs    r0, lr, r5
 230   adcs    r1, ip, r4
 231   tst     r2, r2
 232   movcs   r5, r0
 233   movcs   r4, r1
 234   bpl     ASM_PFX(_ll_udiv_big_label3)
 235 ASM_PFX(_ll_udiv_big_label4):
 236   mov     r1, #0  // 0x0
 237   mov     r2, r5, lsr r6
 238   bic     r5, r5, r2, lsl r6
 239   adcs    r0, r5, r5
 240   adc     r1, r1, #0      // 0x0
 241   movs    lr, r3, lsl r6
 242   mov     r3, r4, lsr r6
 243   bic     r4, r4, r3, lsl r6
 244   adc     r1, r1, #0      // 0x0
 245   adds    r0, r0, lr
 246   orr     r2, r2, r4, ror r6
 247   adc     r1, r1, #0      // 0x0
 248   ldmia   sp!, {r4, r5, r6, pc}
 249
 250 ASM_PFX(_ll_udiv_ginormous):
 251   subs    r2, r5, lr
 252   mov     r1, #0  // 0x0
 253   sbcs    r3, r4, ip
 254   adc     r0, r1, r1
 255   movcc   r2, r5
 256   movcc   r3, r4
 257   ldmia   sp!, {r4, r5, r6, pc}
 258
 259 ASM_PFX(_ll_div0):
 260   ldmia   sp!, {r4, r5, r6, lr}
 261   mov     r0, #0  // 0x0
 262   mov     r1, #0  // 0x0
 263   b       ASM_PFX(__aeabi_ldiv0)
 264
 265 ASM_PFX(__aeabi_ldiv0):
 266   bx      r14
 267
 268