1 //------------------------------------------------------------------------------
3 // Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
5 // SPDX-License-Identifier: BSD-2-Clause-Patent
7 //------------------------------------------------------------------------------
13 GCC_ASM_EXPORT(__aeabi_uldivmod)
23 ASM_PFX(__aeabi_uldivmod):
24 stmdb sp!, {r4, r5, r6, lr}
28 orrs ip, r3, r2, lsr #31
29 bne ASM_PFX(__aeabi_uldivmod_label1)
33 addeq r6, r6, #16 // 0x10
37 addeq r6, r6, #8 // 0x8
40 addeq r6, r6, #4 // 0x4
43 addeq r6, r6, #2 // 0x2
46 addeq r6, r6, #1 // 0x1
47 b ASM_PFX(_ll_udiv_small)
48 ASM_PFX(__aeabi_uldivmod_label1):
49 tst r3, #-2147483648 // 0x80000000
50 bne ASM_PFX(__aeabi_uldivmod_label2)
52 addeq r6, r6, #16 // 0x10
56 addeq r6, r6, #8 // 0x8
59 addeq r6, r6, #4 // 0x4
62 addeq r6, r6, #2 // 0x2
64 addeq r6, r6, #1 // 0x1
65 rsb r3, r6, #32 // 0x20
67 orr ip, ip, r2, lsr r3
69 b ASM_PFX(_ll_udiv_big)
70 ASM_PFX(__aeabi_uldivmod_label2):
73 b ASM_PFX(_ll_udiv_ginormous)
75 ASM_PFX(_ll_udiv_small):
78 subcs r4, r4, ip, lsl #1
79 addcs r3, r3, #2 // 0x2
82 adcs r3, r3, #0 // 0x0
83 add r2, r6, #32 // 0x20
86 bcc ASM_PFX(_ll_udiv_small_label1)
87 orrs r0, r4, r5, lsr #30
90 subeq r2, r2, #32 // 0x20
91 ASM_PFX(_ll_udiv_small_label1):
94 bcc ASM_PFX(_ll_udiv_small_label2)
97 addeq r1, r1, #16 // 0x10
98 ASM_PFX(_ll_udiv_small_label2):
101 bcc ASM_PFX(_ll_udiv_small_label3)
104 addeq r1, r1, #8 // 0x8
105 ASM_PFX(_ll_udiv_small_label3):
106 rsb r0, r1, #32 // 0x20
108 orr r4, r4, r5, lsr r0
111 bcc ASM_PFX(_ll_udiv_small_label5)
112 sub r2, r2, #1 // 0x1
113 and r0, r2, #7 // 0x7
114 eor r0, r0, #7 // 0x7
115 adds r0, r0, r0, lsl #1
116 add pc, pc, r0, lsl #2
118 ASM_PFX(_ll_udiv_small_label4):
120 adcs r4, ip, r4, lsl #1
123 adcs r4, ip, r4, lsl #1
126 adcs r4, ip, r4, lsl #1
129 adcs r4, ip, r4, lsl #1
132 adcs r4, ip, r4, lsl #1
135 adcs r4, ip, r4, lsl #1
138 adcs r4, ip, r4, lsl #1
141 adcs r4, ip, r4, lsl #1
142 sub r2, r2, #8 // 0x8
145 bpl ASM_PFX(_ll_udiv_small_label4)
146 ASM_PFX(_ll_udiv_small_label5):
148 bic r4, r4, r2, lsl r6
151 add r1, r1, r3, lsl r6
153 ldmia sp!, {r4, r5, r6, pc}
155 ASM_PFX(_ll_udiv_big):
161 adcs r3, r3, #0 // 0x0
166 adcs r3, r3, #0 // 0x0
171 adcs r3, r3, #0 // 0x0
173 rsbs lr, lr, #0 // 0x0
174 rsc ip, ip, #0 // 0x0
176 bcc ASM_PFX(_ll_udiv_big_label1)
178 moveq r4, r4, lsl #16
179 addeq r1, r1, #16 // 0x10
180 ASM_PFX(_ll_udiv_big_label1):
183 bcc ASM_PFX(_ll_udiv_big_label2)
186 addeq r1, r1, #8 // 0x8
187 ASM_PFX(_ll_udiv_big_label2):
188 rsb r0, r1, #32 // 0x20
190 orr r4, r4, r5, lsr r0
193 bcc ASM_PFX(_ll_udiv_big_label4)
194 sub r2, r2, #1 // 0x1
195 and r0, r2, #3 // 0x3
196 rsb r0, r0, #3 // 0x3
197 adds r0, r0, r0, lsl #1
198 add pc, pc, r0, lsl #3
200 ASM_PFX(_ll_udiv_big_label3):
219 sub r2, r2, #4 // 0x4
227 bpl ASM_PFX(_ll_udiv_big_label3)
228 ASM_PFX(_ll_udiv_big_label4):
231 bic r5, r5, r2, lsl r6
233 adc r1, r1, #0 // 0x0
236 bic r4, r4, r3, lsl r6
237 adc r1, r1, #0 // 0x0
239 orr r2, r2, r4, ror r6
240 adc r1, r1, #0 // 0x0
241 ldmia sp!, {r4, r5, r6, pc}
243 ASM_PFX(_ll_udiv_ginormous):
250 ldmia sp!, {r4, r5, r6, pc}
253 ldmia sp!, {r4, r5, r6, lr}
256 b ASM_PFX(__aeabi_ldiv0)
258 ASM_PFX(__aeabi_ldiv0):