ArmPlatformPkg/ArmPlatformPkg.dec

   1 #/** @file
   2 #
   3 #  Copyright (c) 2011-2018, ARM Limited. All rights reserved.
   4 #  Copyright (c) 2015, Intel Corporation. All rights reserved.
   5 #
   6 #  This program and the accompanying materials
   7 #  are licensed and made available under the terms and conditions of the BSD License
   8 #  which accompanies this distribution.  The full text of the license may be found at
   9 #  http://opensource.org/licenses/bsd-license.php
  10 #
  11 #  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 #
  14 #**/
  15
  16 [Defines]
  17   DEC_SPECIFICATION              = 0x00010005
  18   PACKAGE_NAME                   = ArmPlatformPkg
  19   PACKAGE_GUID                   = 3308e0a0-1d94-11e0-915c-0002a5d5c51b
  20   PACKAGE_VERSION                = 0.1
  21
  22 ################################################################################
  23 #
  24 # Include Section - list of Include Paths that are provided by this package.
  25 #                   Comments are used for Keywords and Module Types.
  26 #
  27 # Supported Module Types:
  28 #  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
  29 #
  30 ################################################################################
  31 [Includes.common]
  32   Include                        # Root include for the package
  33
  34 [LibraryClasses]
  35   ArmPlatformLib|Include/Library/ArmPlatformLib.h
  36   LcdHwLib|Include/Library/LcdHwLib.h
  37   LcdPlatformLib|Include/Library/LcdPlatformLib.h
  38   NorFlashPlatformLib|Include/Library/NorFlashPlatformLib.h
  39   PL011UartClockLib|Include/Library/PL011UartClockLib.h
  40   PL011UartLib|Include/Library/PL011UartLib.h
  41
  42 [Guids.common]
  43   gArmPlatformTokenSpaceGuid   = { 0x9c0aaed4, 0x74c5, 0x4043, { 0xb4, 0x17, 0xa3, 0x22, 0x38, 0x14, 0xce, 0x76 } }
  44
  45 [PcdsFeatureFlag.common]
  46   gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|FALSE|BOOLEAN|0x00000004
  47
  48   gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x0000003C
  49
  50   # Disable the GOP controller on ExitBootServices(). By default the value is FALSE,
  51   # we assume the OS will handle the FrameBuffer from the UEFI GOP information.
  52   gArmPlatformTokenSpaceGuid.PcdGopDisableOnExitBootServices|FALSE|BOOLEAN|0x0000003D
  53
  54 [PcdsFixedAtBuild.common]
  55   gArmPlatformTokenSpaceGuid.PcdCoreCount|1|UINT32|0x00000039
  56   gArmPlatformTokenSpaceGuid.PcdClusterCount|1|UINT32|0x00000038
  57
  58   # Stack for CPU Cores in Non Secure Mode
  59   gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT64|0x00000009
  60   gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000|UINT32|0x00000037
  61   gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000|UINT32|0x0000000A
  62
  63   # Size of the region used by UEFI in permanent memory (Reserved 128MB by default)
  64   gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x08000000|UINT32|0x00000015
  65
  66   #
  67   # ARM Primecells
  68   #
  69
  70   ## SP805 Watchdog
  71   gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x0|UINT32|0x00000023
  72   gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT32|0x00000021
  73
  74   ## PL011 UART
  75   gArmPlatformTokenSpaceGuid.PL011UartClkInHz|24000000|UINT32|0x0000001F
  76   gArmPlatformTokenSpaceGuid.PL011UartInteger|0|UINT32|0x00000020
  77   gArmPlatformTokenSpaceGuid.PL011UartFractional|0|UINT32|0x0000002D
  78   gArmPlatformTokenSpaceGuid.PL011UartInterrupt|0x00000000|UINT32|0x0000002F
  79   gArmPlatformTokenSpaceGuid.PL011UartRegOffsetVariant|0|UINT8|0x0000003E
  80
  81   ## PL011 Serial Debug UART
  82   gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x00000000|UINT64|0x00000030
  83   gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|0x00000000|UINT64|0x00000031
  84   gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|0x00000000|UINT32|0x00000032
  85
  86   ## PL061 GPIO
  87   gArmPlatformTokenSpaceGuid.PcdPL061GpioBase|0x0|UINT32|0x00000025
  88
  89   ## PL111 Lcd & HdLcd
  90   gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x0|UINT32|0x00000026
  91   gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x0|UINT32|0x00000027
  92
  93   ## Default size for display modes upto 1920x1080 (1920 * 1080 * 4 Bytes Per Pixel)
  94   gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferSize|0x7E9000|UINT32|0x00000043
  95   ## If set, framebuffer memory will be reserved and mapped in the system RAM
  96   gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferBase|0x0|UINT64|0x00000044
  97
  98   ## ARM Mali Display Processor DP500/DP550/DP650
  99   gArmPlatformTokenSpaceGuid.PcdArmMaliDpBase|0x0|UINT64|0x00000050
 100   gArmPlatformTokenSpaceGuid.PcdArmMaliDpMemoryRegionLength|0x0|UINT32|0x00000051
 101
 102   ## PL180 MCI
 103   gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000028
 104   gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000029
 105
 106   # Graphics Output Pixel format
 107   # 0 : PixelRedGreenBlueReserved8BitPerColor
 108   # 1 : PixelBlueGreenRedReserved8BitPerColor
 109   # 2 : PixelBitMask
 110   # Default is set to UEFI console font format PixelBlueGreenRedReserved8BitPerColor
 111   gArmPlatformTokenSpaceGuid.PcdGopPixelFormat|0x00000001|UINT32|0x00000040
 112
 113   ## If set, this will swap settings for HDLCD RED_SELECT and BLUE_SELECT registers
 114   gArmPlatformTokenSpaceGuid.PcdArmHdLcdSwapBlueRedSelect|FALSE|BOOLEAN|0x00000045
 115
 116 [PcdsFixedAtBuild.common,PcdsDynamic.common]
 117   ## PL031 RealTimeClock
 118   gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0|UINT32|0x00000024
 119   gArmPlatformTokenSpaceGuid.PcdPL031RtcPpmAccuracy|300000000|UINT32|0x00000022
 120
 121   gArmPlatformTokenSpaceGuid.PcdWatchdogCount|0x0|UINT32|0x00000033