ArmPlatformPkg/ArmPlatformPkg.dec

   1 #/** @file
   2 #
   3 #  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
   4 #
   5 #  This program and the accompanying materials
   6 #  are licensed and made available under the terms and conditions of the BSD License
   7 #  which accompanies this distribution.  The full text of the license may be found at
   8 #  http://opensource.org/licenses/bsd-license.php
   9 #
  10 #  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 #
  13 #**/
  14
  15 [Defines]
  16   DEC_SPECIFICATION              = 0x00010005
  17   PACKAGE_NAME                   = ArmPlatformPkg
  18   PACKAGE_GUID                   = 3308e0a0-1d94-11e0-915c-0002a5d5c51b
  19   PACKAGE_VERSION                = 0.1
  20
  21 ################################################################################
  22 #
  23 # Include Section - list of Include Paths that are provided by this package.
  24 #                   Comments are used for Keywords and Module Types.
  25 #
  26 # Supported Module Types:
  27 #  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
  28 #
  29 ################################################################################
  30 [Includes.common]
  31   Include                        # Root include for the package
  32
  33 [Guids.common]
  34   gArmPlatformTokenSpaceGuid   = { 0x9c0aaed4, 0x74c5, 0x4043, { 0xb4, 0x17, 0xa3, 0x22, 0x38, 0x14, 0xce, 0x76 } }
  35   #
  36   # Following Guid must match FILE_GUID in MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
  37   #
  38   gVariableRuntimeDxeFileGuid = { 0xcbd2e4d5, 0x7068, 0x4ff5, { 0xb4, 0x62, 0x98, 0x22, 0xb4, 0xad, 0x8d, 0x60 } }
  39
  40   ## Include/Guid/ArmGlobalVariableHob.h
  41   gArmGlobalVariableGuid      = { 0xc3253c90, 0xa24f, 0x4599, { 0xa6, 0x64, 0x1f, 0x88, 0x13, 0x77, 0x8f, 0xc9} }
  42
  43 [Ppis]
  44   ## Include/Ppi/ArmGlobalVariable.h
  45   gArmGlobalVariablePpiGuid = { 0xab1c1816, 0xd542, 0x4e6f, {0x9b, 0x1e, 0x8e, 0xcd, 0x92, 0x53, 0xe2, 0xe7} }
  46
  47 [PcdsFeatureFlag.common]
  48   # Set this PCD to TRUE to map NORFlash at 0x0. FALSE means the DRAM is mapped at 0x0.
  49   gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping|FALSE|BOOLEAN|0x00000012
  50
  51   gArmPlatformTokenSpaceGuid.PcdStandalone|TRUE|BOOLEAN|0x00000001
  52   gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|FALSE|BOOLEAN|0x00000002
  53   gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|FALSE|BOOLEAN|0x00000004
  54
  55   gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x0000003C
  56
  57   # Disable the GOP controller on ExitBootServices(). By default the value is FALSE,
  58   # we assume the OS will handle the FrameBuffer from the UEFI GOP information.
  59   gArmPlatformTokenSpaceGuid.PcdGopDisableOnExitBootServices|FALSE|BOOLEAN|0x0000003D
  60
  61 [PcdsFixedAtBuild.common]
  62   gArmPlatformTokenSpaceGuid.PcdCoreCount|1|UINT32|0x00000039
  63   gArmPlatformTokenSpaceGuid.PcdClusterCount|1|UINT32|0x00000038
  64
  65   # Stack for CPU Cores in Secure Mode
  66   gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0|UINT32|0x00000005
  67   gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x10000|UINT32|0x00000036
  68   gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000|UINT32|0x00000006
  69
  70   # Stack for CPU Cores in Non Secure Mode
  71   gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT32|0x00000009
  72   gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000|UINT32|0x00000037
  73   gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000|UINT32|0x0000000A
  74
  75   # Size of the region used by UEFI in permanent memory (Reserved 128MB by default)
  76   gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x08000000|UINT32|0x00000015
  77
  78   # Size to reserve in the primary core stack for PEI Global Variables
  79   #  = sizeof(UINTN) /* PcdPeiServicePtr or HobListPtr */
  80   gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize|0x4|UINT32|0x00000016
  81   # PeiServicePtr and HobListPtr shares the same location in the PEI Global Variable list
  82   # PeiServicePtr is only valid with PEI Core and HobListPtr only when the PEI Core is skipped.
  83   gArmPlatformTokenSpaceGuid.PcdPeiServicePtrGlobalOffset|0x0|UINT32|0x00000017
  84   gArmPlatformTokenSpaceGuid.PcdHobListPtrGlobalOffset|0x0|UINT32|0x00000018
  85
  86   # Size to reserve in the primary core stack for SEC Global Variables
  87   gArmPlatformTokenSpaceGuid.PcdSecGlobalVariableSize|0x0|UINT32|0x00000031
  88
  89   # Boot Monitor FileSystem
  90   gArmPlatformTokenSpaceGuid.PcdBootMonFsSupportedDevicePaths|L""|VOID*|0x0000003A
  91
  92   #
  93   # ARM Primecells
  94   #
  95
  96   ## SP804 DualTimer
  97   gArmPlatformTokenSpaceGuid.PcdSP804TimerFrequencyInMHz|1|UINT32|0x0000001D
  98   gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicInterruptNum|0|UINT32|0x0000001E
  99   gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicBase|0|UINT32|0x0000002A
 100   gArmPlatformTokenSpaceGuid.PcdSP804TimerPerformanceBase|0|UINT32|0x0000002B
 101   gArmPlatformTokenSpaceGuid.PcdSP804TimerMetronomeBase|0|UINT32|0x0000002C
 102
 103   ## SP805 Watchdog
 104   gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x0|UINT32|0x00000023
 105   gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT32|0x00000021
 106
 107   ## PL011 UART
 108   gArmPlatformTokenSpaceGuid.PL011UartClkInHz|24000000|UINT32|0x0000001F
 109   gArmPlatformTokenSpaceGuid.PL011UartInteger|0|UINT32|0x00000020
 110   gArmPlatformTokenSpaceGuid.PL011UartFractional|0|UINT32|0x0000002D
 111
 112   ## PL031 RealTimeClock
 113   gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0|UINT32|0x00000024
 114   gArmPlatformTokenSpaceGuid.PcdPL031RtcPpmAccuracy|300000000|UINT32|0x00000022
 115
 116   ## PL061 GPIO
 117   gArmPlatformTokenSpaceGuid.PcdPL061GpioBase|0x0|UINT32|0x00000025
 118
 119   ## PL111 Lcd & HdLcd
 120   gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x0|UINT32|0x00000026
 121   gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x0|UINT32|0x00000027
 122
 123   ## PL180 MCI
 124   gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000028
 125   gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000029
 126
 127   #
 128   # BDS - Boot Manager
 129   #
 130   gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Platform"|VOID*|0x00000019
 131   gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"Default Boot Device"|VOID*|0x0000000C
 132   gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L""|VOID*|0x0000000D
 133   gArmPlatformTokenSpaceGuid.PcdDefaultBootInitrdPath|L""|VOID*|0x0000000E
 134   gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|L""|VOID*|0x000000F
 135   # PcdDefaultBootType define the type of the binary pointed by PcdDefaultBootDevicePath:
 136   #  - 0 = an EFI application
 137   #  - 1 = a Linux kernel with ATAG support
 138   #  - 2 = a Linux kernel with FDT support
 139   gArmPlatformTokenSpaceGuid.PcdDefaultBootType|0|UINT32|0x00000010
 140   gArmPlatformTokenSpaceGuid.PcdFdtDevicePath|L""|VOID*|0x00000011
 141
 142   ## Timeout value for displaying progressing bar in before boot OS.
 143   #  According to UEFI 2.0 spec, the default TimeOut should be 0xffff.
 144   gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut|0xffff|UINT16|0x0000001A
 145
 146   gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L""|VOID*|0x0000001B
 147   gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L""|VOID*|0x0000001C
 148
 149 [PcdsFixedAtBuild.ARM]
 150   # Stack for CPU Cores in Secure Monitor Mode
 151   gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0|UINT32|0x00000007
 152   gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000|UINT32|0x00000008
 153
 154 [PcdsFixedAtBuild.AARCH64]
 155   # The Secure World is only running in EL3. Only one set of stacks is needed for AArch64.
 156   # The Secure stacks are described by PcdCPUCoresSecStackBase, PcdCPUCoreSecPrimaryStackSize
 157   # and PcdCPUCoreSecSecondaryStackSize
 158   gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0|UINT32|0x00000007
 159   gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x0|UINT32|0x00000008
 160