ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h

   1 /** @file
   2 *  Header defining RealView EB constants (Base addresses, sizes, flags)
   3 *
   4 *  Copyright (c) 2011, ARM Limited. All rights reserved.
   5 *
   6 *  This program and the accompanying materials
   7 *  are licensed and made available under the terms and conditions of the BSD License
   8 *  which accompanies this distribution.  The full text of the license may be found at
   9 *  http://opensource.org/licenses/bsd-license.php
  10 *
  11 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 *
  14 **/
  15
  16 #ifndef __ARM_EB_H__
  17 #define __ARM_EB_H__
  18
  19 /*******************************************
  20 // Platform Memory Map
  21 *******************************************/
  22
  23 // Can be NOR, DOC, DRAM, SRAM
  24 #define ARM_EB_REMAP_BASE                     0x00000000
  25 #define ARM_EB_REMAP_SZ                       0x04000000
  26
  27 // Motherboard Peripheral and On-chip peripheral
  28 #define ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE     0x10000000
  29 #define ARM_EB_SMB_MB_ON_CHIP_PERIPH_SZ       0x10000000
  30 #define ARM_EB_BOARD_PERIPH_BASE              0x10000000
  31 //#define ARM_EB_CHIP_PERIPH_BASE             0x10020000
  32
  33 // SMC
  34 #define ARM_EB_SMC_BASE                       0x40000000
  35 #define ARM_EB_SMC_SZ                         0x20000000
  36
  37 // NOR Flash 1
  38 #define ARM_EB_SMB_NOR_BASE                   0x40000000
  39 #define ARM_EB_SMB_NOR_SZ                     0x04000000 /* 64 MB */
  40 // DOC Flash
  41 #define ARM_EB_SMB_DOC_BASE                   0x44000000
  42 #define ARM_EB_SMB_DOC_SZ                     0x04000000 /* 64 MB */
  43 // SRAM
  44 #define ARM_EB_SMB_SRAM_BASE                  0x48000000
  45 #define ARM_EB_SMB_SRAM_SZ                    0x02000000 /* 32 MB */
  46 // USB, Ethernet, VRAM
  47 #define ARM_EB_SMB_PERIPH_BASE                0x4E000000
  48 //#define ARM_EB_SMB_PERIPH_VRAM              0x4C000000
  49 #define ARM_EB_SMB_PERIPH_SZ                  0x02000000 /* 32 MB */
  50
  51 // DRAM
  52 #define ARM_EB_DRAM_BASE                      0x70000000
  53 #define ARM_EB_DRAM_SZ                        0x10000000
  54
  55 // Logic Tile
  56 #define ARM_EB_LOGIC_TILE_BASE                0xC0000000
  57 #define ARM_EB_LOGIC_TILE_SZ                  0x40000000
  58
  59 /*******************************************
  60 // Motherboard peripherals
  61 *******************************************/
  62
  63 // Define MotherBoard SYS flags offsets (from ARM_EB_BOARD_PERIPH_BASE)
  64 #define ARM_EB_SYS_OSC4_REG                   (ARM_EB_BOARD_PERIPH_BASE + 0x0001C)
  65 #define ARM_EB_SYS_LOCK_REG                   (ARM_EB_BOARD_PERIPH_BASE + 0x00020)
  66 #define ARM_EB_SYS_100HZ_REG                  (ARM_EB_BOARD_PERIPH_BASE + 0x00024)
  67 #define ARM_EB_SYS_FLAGS_REG                  (ARM_EB_BOARD_PERIPH_BASE + 0x00030)
  68 #define ARM_EB_SYS_FLAGS_SET_REG              (ARM_EB_BOARD_PERIPH_BASE + 0x00030)
  69 #define ARM_EB_SYS_FLAGS_CLR_REG              (ARM_EB_BOARD_PERIPH_BASE + 0x00034)
  70 #define ARM_EB_SYS_FLAGS_NV_REG               (ARM_EB_BOARD_PERIPH_BASE + 0x00038)
  71 #define ARM_EB_SYS_FLAGS_NV_SET_REG           (ARM_EB_BOARD_PERIPH_BASE + 0x00038)
  72 #define ARM_EB_SYS_FLAGS_NV_CLR_REG           (ARM_EB_BOARD_PERIPH_BASE + 0x0003C)
  73 #define ARM_EB_SYS_CLCD_REG                   (ARM_EB_BOARD_PERIPH_BASE + 0x00050)
  74 #define ARM_EB_SYS_PROCID0_REG                (ARM_EB_BOARD_PERIPH_BASE + 0x00084)
  75 #define ARM_EB_SYS_PROCID1_REG                (ARM_EB_BOARD_PERIPH_BASE + 0x00088)
  76
  77 // SP810 Controller
  78 #define SP810_CTRL_BASE                       (ARM_EB_BOARD_PERIPH_BASE + 0x01000)
  79
  80 // SYSTRCL Register
  81 #define ARM_EB_SYSCTRL                                                                                    0x10001000
  82
  83 // Uart0
  84 #define PL011_CONSOLE_UART_BASE               (ARM_EB_BOARD_PERIPH_BASE + 0x09000)
  85
  86 // SP804 Timer Bases
  87 #define SP804_TIMER0_BASE                     (ARM_EB_BOARD_PERIPH_BASE + 0x11000)
  88 #define SP804_TIMER1_BASE                     (ARM_EB_BOARD_PERIPH_BASE + 0x11020)
  89 #define SP804_TIMER2_BASE                     (ARM_EB_BOARD_PERIPH_BASE + 0x12000)
  90 #define SP804_TIMER3_BASE                     (ARM_EB_BOARD_PERIPH_BASE + 0x12020)
  91
  92 // PL301 RTC
  93 #define PL031_RTC_BASE                        (ARM_EB_BOARD_PERIPH_BASE + 0x17000)
  94
  95 // Dynamic Memory Controller Base
  96 #define ARM_EB_DMC_BASE                       0x10018000
  97
  98 // Static Memory Controller Base
  99 #define ARM_EB_SMC_CTRL_BASE                  0x10080000
 100
 101 #define PL111_CLCD_BASE                       0x10020000
 102 //Note: Moving the framebuffer into the 0x70000000-0x80000000 region does not seem to work
 103 #define PL111_CLCD_VRAM_BASE                  0x00100000
 104
 105 /*// System Configuration Controller register Base addresses
 106 //#define ARM_EB_SYS_CFG_CTRL_BASE                0x100E2000
 107 #define ARM_EB_SYS_CFGRW0_REG                   0x100E2000
 108 #define ARM_EB_SYS_CFGRW1_REG                   0x100E2004
 109 #define ARM_EB_SYS_CFGRW2_REG                   0x100E2008
 110
 111 #define ARM_EB_CFGRW1_REMAP_NOR0                0
 112 #define ARM_EB_CFGRW1_REMAP_NOR1                (1 << 28)
 113 #define ARM_EB_CFGRW1_REMAP_EXT_AXI             (1 << 29)
 114 #define ARM_EB_CFGRW1_REMAP_DRAM                (1 << 30)
 115
 116 // PL301 Fast AXI Base Address
 117 #define ARM_EB_FAXI_BASE                        0x100E9000
 118
 119 // L2x0 Cache Controller Base Address
 120 //#define ARM_EB_L2x0_CTLR_BASE                   0x1E00A000*/
 121
 122
 123 /*******************************************
 124 // EFI Memory Map in Permanent Memory (DRAM)
 125 *******************************************/
 126
 127 // This region is allocated at the bottom of the DRAM. It will be used
 128 // for fixed address allocations such as Vector Table
 129 #define ARM_EB_EFI_FIX_ADDRESS_REGION_SZ        SIZE_8MB
 130
 131 // This region is the memory declared to PEI as permanent memory for PEI
 132 // and DXE. EFI stacks and heaps will be declared in this region.
 133 #define ARM_EB_EFI_MEMORY_REGION_SZ             0x1000000
 134
 135 /*******************************************
 136 // System Configuration Control
 137 *******************************************/
 138
 139 // Sites where the peripheral is fitted
 140 #define ARM_EB_UNSUPPORTED                        ~0
 141
 142 #define VIRTUAL_SYS_CFG(site,func)                     (((site) << 24) | (func))
 143
 144 #define SYS_CFG_RTC                               VIRTUAL_SYS_CFG(ARM_EB_UNSUPPORTED,1)
 145
 146 #endif