ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h

   1 /** @file
   2 *  Header defining RealView EB constants (Base addresses, sizes, flags)
   3 *
   4 *  Copyright (c) 2011, ARM Limited. All rights reserved.
   5 *
   6 *  This program and the accompanying materials
   7 *  are licensed and made available under the terms and conditions of the BSD License
   8 *  which accompanies this distribution.  The full text of the license may be found at
   9 *  http://opensource.org/licenses/bsd-license.php
  10 *
  11 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 *
  14 **/
  15
  16 #ifndef __ARM_EB_H__
  17 #define __ARM_EB_H__
  18
  19 /*******************************************
  20 // Platform Memory Map
  21 *******************************************/
  22
  23 // Can be NOR, DOC, DRAM, SRAM
  24 #define ARM_EB_REMAP_BASE                     0x00000000
  25 #define ARM_EB_REMAP_SZ                       0x04000000
  26
  27 // Motherboard Peripheral and On-chip peripheral
  28 #define ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE     0x10000000
  29 #define ARM_EB_SMB_MB_ON_CHIP_PERIPH_SZ       0x10000000
  30 #define ARM_EB_BOARD_PERIPH_BASE              0x10000000
  31 //#define ARM_EB_CHIP_PERIPH_BASE             0x10020000
  32
  33 // SMC
  34 #define ARM_EB_SMC_BASE                       0x40000000
  35 #define ARM_EB_SMC_SZ                         0x20000000
  36
  37 // NOR Flash 1
  38 #define ARM_EB_SMB_NOR_BASE                   0x40000000
  39 #define ARM_EB_SMB_NOR_SZ                     0x04000000 /* 64 MB */
  40 // DOC Flash
  41 #define ARM_EB_SMB_DOC_BASE                   0x44000000
  42 #define ARM_EB_SMB_DOC_SZ                     0x04000000 /* 64 MB */
  43 // SRAM
  44 #define ARM_EB_SMB_SRAM_BASE                  0x48000000
  45 #define ARM_EB_SMB_SRAM_SZ                    0x02000000 /* 32 MB */
  46 // USB, Ethernet, VRAM
  47 #define ARM_EB_SMB_PERIPH_BASE                0x4E000000
  48 //#define ARM_EB_SMB_PERIPH_VRAM              0x4C000000
  49 #define ARM_EB_SMB_PERIPH_SZ                  0x02000000 /* 32 MB */
  50
  51 // Logic Tile
  52 #define ARM_EB_LOGIC_TILE_BASE                0xC0000000
  53 #define ARM_EB_LOGIC_TILE_SZ                  0x40000000
  54
  55 /*******************************************
  56 // Motherboard peripherals
  57 *******************************************/
  58
  59 // Define MotherBoard SYS flags offsets (from ARM_EB_BOARD_PERIPH_BASE)
  60 #define ARM_EB_SYS_ID_REG                     (ARM_EB_BOARD_PERIPH_BASE + 0x00000)
  61 #define ARM_EB_SYS_OSC4_REG                   (ARM_EB_BOARD_PERIPH_BASE + 0x0001C)
  62 #define ARM_EB_SYS_LOCK_REG                   (ARM_EB_BOARD_PERIPH_BASE + 0x00020)
  63 #define ARM_EB_SYS_100HZ_REG                  (ARM_EB_BOARD_PERIPH_BASE + 0x00024)
  64 #define ARM_EB_SYS_FLAGS_REG                  (ARM_EB_BOARD_PERIPH_BASE + 0x00030)
  65 #define ARM_EB_SYS_FLAGS_SET_REG              (ARM_EB_BOARD_PERIPH_BASE + 0x00030)
  66 #define ARM_EB_SYS_FLAGS_CLR_REG              (ARM_EB_BOARD_PERIPH_BASE + 0x00034)
  67 #define ARM_EB_SYS_FLAGS_NV_REG               (ARM_EB_BOARD_PERIPH_BASE + 0x00038)
  68 #define ARM_EB_SYS_FLAGS_NV_SET_REG           (ARM_EB_BOARD_PERIPH_BASE + 0x00038)
  69 #define ARM_EB_SYS_FLAGS_NV_CLR_REG           (ARM_EB_BOARD_PERIPH_BASE + 0x0003C)
  70 #define ARM_EB_SYS_RESETCTL_REG               (ARM_EB_BOARD_PERIPH_BASE + 0x00040)
  71 #define ARM_EB_SYS_CLCD_REG                   (ARM_EB_BOARD_PERIPH_BASE + 0x00050)
  72 #define ARM_EB_SYS_PROCID0_REG                (ARM_EB_BOARD_PERIPH_BASE + 0x00084)
  73 #define ARM_EB_SYS_PROCID1_REG                (ARM_EB_BOARD_PERIPH_BASE + 0x00088)
  74
  75 // SP810 Controller
  76 #define SP810_CTRL_BASE                       (ARM_EB_BOARD_PERIPH_BASE + 0x01000)
  77
  78 // SYSTRCL Register
  79 #define ARM_EB_SYSCTRL                                                                                    0x10001000
  80
  81 // Dynamic Memory Controller Base
  82 #define ARM_EB_DMC_BASE                       0x10018000
  83
  84 // Static Memory Controller Base
  85 #define ARM_EB_SMC_CTRL_BASE                  0x10080000
  86
  87 //Note: Moving the framebuffer into the 0x70000000-0x80000000 region does not seem to work
  88 #define PL111_CLCD_VRAM_BASE                  0x00100000
  89
  90 /*// System Configuration Controller register Base addresses
  91 //#define ARM_EB_SYS_CFG_CTRL_BASE                0x100E2000
  92 #define ARM_EB_SYS_CFGRW0_REG                   0x100E2000
  93 #define ARM_EB_SYS_CFGRW1_REG                   0x100E2004
  94 #define ARM_EB_SYS_CFGRW2_REG                   0x100E2008
  95
  96 #define ARM_EB_CFGRW1_REMAP_NOR0                0
  97 #define ARM_EB_CFGRW1_REMAP_NOR1                (1 << 28)
  98 #define ARM_EB_CFGRW1_REMAP_EXT_AXI             (1 << 29)
  99 #define ARM_EB_CFGRW1_REMAP_DRAM                (1 << 30)
 100
 101 // PL301 Fast AXI Base Address
 102 #define ARM_EB_FAXI_BASE                        0x100E9000
 103
 104 // L2x0 Cache Controller Base Address
 105 //#define ARM_EB_L2x0_CTLR_BASE                   0x1E00A000*/
 106
 107 #define ARM_EB_SYS_PROC_ID_MASK                  (UINT32)(0xFFU << 24)
 108 #define ARM_EB_SYS_PROC_ID_CORTEX_A8             (UINT32)(0x0EU << 24)
 109 #define ARM_EB_SYS_PROC_ID_CORTEX_A9             (UINT32)(0x0CU << 24)
 110
 111 /*******************************************
 112 // System Configuration Control
 113 *******************************************/
 114
 115 // Sites where the peripheral is fitted
 116 #define ARM_EB_UNSUPPORTED                        ~0
 117
 118 #define VIRTUAL_SYS_CFG(site,func)                     (((site) << 24) | (func))
 119
 120 #define SYS_CFG_RTC                               VIRTUAL_SYS_CFG(ARM_EB_UNSUPPORTED,1)
 121
 122 #endif