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ArmVExpressPkg: add support for embedding DTBs for AArch64 variants
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1 #
2 # Copyright (c) 2011 - 2015, ARM Limited. All rights reserved.
3 #
4 # This program and the accompanying materials
5 # are licensed and made available under the terms and conditions of the BSD License
6 # which accompanies this distribution. The full text of the license may be found at
7 # http://opensource.org/licenses/bsd-license.php
8 #
9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11 #
12
13 ################################################################################
14 #
15 # FD Section
16 # The [FD] Section is made up of the definition statements and a
17 # description of what goes into the Flash Device Image. Each FD section
18 # defines one flash "device" image. A flash device image may be one of
19 # the following: Removable media bootable image (like a boot floppy
20 # image,) an Option ROM image (that would be "flashed" into an add-in
21 # card,) a System "Flash" image (that would be burned into a system's
22 # flash) or an Update ("Capsule") image that will be used to update and
23 # existing system flash.
24 #
25 ################################################################################
26
27 [FD.FVP_AARCH64_EFI_SEC]
28 BaseAddress = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in SecureROM.
29 Size = 0x04000000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the device (64MiB).
30 ErasePolarity = 1
31
32 # This one is tricky, it must be: BlockSize * NumBlocks = Size
33 BlockSize = 0x00001000
34 NumBlocks = 0x4000
35
36 ################################################################################
37 #
38 # Following are lists of FD Region layout which correspond to the locations of different
39 # images within the flash device.
40 #
41 # Regions must be defined in ascending order and may not overlap.
42 #
43 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
44 # the pipe "|" character, followed by the size of the region, also in hex with the leading
45 # "0x" characters. Like:
46 # Offset|Size
47 # PcdOffsetCName|PcdSizeCName
48 # RegionType <FV, DATA, or FILE>
49 #
50 ################################################################################
51
52 0x00000000|0x00080000
53 gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
54 FV = FVMAIN_SEC
55
56 [FD.FVP_AARCH64_EFI]
57 !ifdef ARM_FVP_RUN_NORFLASH
58 BaseAddress = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in Flash0.
59 !else
60 BaseAddress = 0x88000000|gArmTokenSpaceGuid.PcdFdBaseAddress # UEFI in DRAM + 128MB.
61 !endif
62 Size = 0x04000000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the device (64MiB).
63 ErasePolarity = 1
64
65 # This one is tricky, it must be: BlockSize * NumBlocks = Size
66 BlockSize = 0x00001000
67 NumBlocks = 0x4000
68
69 0x00000000|0x00280000
70 gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
71 FV = FVMAIN_COMPACT
72
73 ################################################################################
74 #
75 # FV Section
76 #
77 # [FV] section is used to define what components or modules are placed within a flash
78 # device file. This section also defines order the components and modules are positioned
79 # within the image. The [FV] section consists of define statements, set statements and
80 # module statements.
81 #
82 ################################################################################
83
84 [FV.FVMAIN_SEC]
85 FvBaseAddress = 0x0 # Secure ROM
86 FvForceRebase = TRUE
87 FvAlignment = 16
88 ERASE_POLARITY = 1
89 MEMORY_MAPPED = TRUE
90 STICKY_WRITE = TRUE
91 LOCK_CAP = TRUE
92 LOCK_STATUS = TRUE
93 WRITE_DISABLED_CAP = TRUE
94 WRITE_ENABLED_CAP = TRUE
95 WRITE_STATUS = TRUE
96 WRITE_LOCK_CAP = TRUE
97 WRITE_LOCK_STATUS = TRUE
98 READ_DISABLED_CAP = TRUE
99 READ_ENABLED_CAP = TRUE
100 READ_STATUS = TRUE
101 READ_LOCK_CAP = TRUE
102 READ_LOCK_STATUS = TRUE
103
104 INF ArmPlatformPkg/Sec/Sec.inf
105
106
107 [FV.FvMain]
108 BlockSize = 0x40
109 NumBlocks = 0 # This FV gets compressed so make it just big enough
110 FvAlignment = 16 # FV alignment and FV attributes setting.
111 ERASE_POLARITY = 1
112 MEMORY_MAPPED = TRUE
113 STICKY_WRITE = TRUE
114 LOCK_CAP = TRUE
115 LOCK_STATUS = TRUE
116 WRITE_DISABLED_CAP = TRUE
117 WRITE_ENABLED_CAP = TRUE
118 WRITE_STATUS = TRUE
119 WRITE_LOCK_CAP = TRUE
120 WRITE_LOCK_STATUS = TRUE
121 READ_DISABLED_CAP = TRUE
122 READ_ENABLED_CAP = TRUE
123 READ_STATUS = TRUE
124 READ_LOCK_CAP = TRUE
125 READ_LOCK_STATUS = TRUE
126
127 APRIORI DXE {
128 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
129 }
130
131 INF MdeModulePkg/Core/Dxe/DxeMain.inf
132 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
133
134 #
135 # PI DXE Drivers producing Architectural Protocols (EFI Services)
136 #
137 INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
138 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
139 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
140 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
141 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
142 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
143 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
144 INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
145 INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
146 INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
147
148 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
149
150 #
151 # Multiple Console IO support
152 #
153 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
154 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
155 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
156 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
157 INF EmbeddedPkg/SerialDxe/SerialDxe.inf
158
159 INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
160 INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
161 INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
162 !ifndef ARM_FOUNDATION_FVP
163 INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
164 !endif
165 INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
166
167 #
168 # Semi-hosting filesystem
169 #
170 INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
171
172 #
173 # FAT filesystem + GPT/MBR partitioning
174 #
175 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
176 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
177 INF FatBinPkg/EnhancedFatDxe/Fat.inf
178 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
179
180 !ifndef ARM_FOUNDATION_FVP
181 #
182 # Multimedia Card Interface
183 #
184 INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
185 INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
186 !endif
187
188 #
189 # Platform Driver
190 #
191 INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf
192 INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
193
194 #
195 # UEFI application (Shell Embedded Boot Loader)
196 #
197 INF ShellBinPkg/UefiShell/UefiShell.inf
198
199 #
200 # Bds
201 #
202 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
203 INF ArmPlatformPkg/Bds/Bds.inf
204
205 # FV Filesystem
206 INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
207
208 #
209 # FDT installation
210 #
211 # The UEFI driver is at the end of the list of the driver to be dispatched
212 # after the device drivers (eg: Ethernet) to ensure we have support for them.
213 INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf
214
215 !ifdef $(DTB_DIR)
216 #
217 # Embed flattened device tree (FDT) images for all known
218 # variants of this platform
219 #
220 FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2) {
221 $(DTB_DIR)/fvp-base-gicv2-psci.dtb
222 }
223 FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2Legacy) {
224 $(DTB_DIR)/fvp-base-gicv2legacy-psci.dtb
225 }
226 FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV3) {
227 $(DTB_DIR)/fvp-base-gicv3-psci.dtb
228 }
229 FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2) {
230 $(DTB_DIR)/fvp-foundation-gicv2-psci.dtb
231 }
232 FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2Legacy) {
233 $(DTB_DIR)/fvp-foundation-gicv2legacy-psci.dtb
234 }
235 FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV3) {
236 $(DTB_DIR)/fvp-foundation-gicv3-psci.dtb
237 }
238 !endif
239
240 [FV.FVMAIN_COMPACT]
241 FvAlignment = 16
242 ERASE_POLARITY = 1
243 MEMORY_MAPPED = TRUE
244 STICKY_WRITE = TRUE
245 LOCK_CAP = TRUE
246 LOCK_STATUS = TRUE
247 WRITE_DISABLED_CAP = TRUE
248 WRITE_ENABLED_CAP = TRUE
249 WRITE_STATUS = TRUE
250 WRITE_LOCK_CAP = TRUE
251 WRITE_LOCK_STATUS = TRUE
252 READ_DISABLED_CAP = TRUE
253 READ_ENABLED_CAP = TRUE
254 READ_STATUS = TRUE
255 READ_LOCK_CAP = TRUE
256 READ_LOCK_STATUS = TRUE
257
258 !if $(EDK2_SKIP_PEICORE) == 1
259 INF ArmPlatformPkg/PrePi/PeiMPCore.inf
260 !else
261 INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
262 INF MdeModulePkg/Core/Pei/PeiMain.inf
263 INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
264 INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
265 INF ArmPkg/Drivers/CpuPei/CpuPei.inf
266 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
267 INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
268 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
269 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
270 !endif
271
272 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
273 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
274 SECTION FV_IMAGE = FVMAIN
275 }
276 }
277
278
279 ################################################################################
280 #
281 # Rules are use with the [FV] section's module INF type to define
282 # how an FFS file is created for a given INF file. The following Rule are the default
283 # rules for the different module type. User can add the customized rules to define the
284 # content of the FFS file.
285 #
286 ################################################################################
287
288
289 ############################################################################
290 # Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
291 ############################################################################
292 #
293 #[Rule.Common.DXE_DRIVER]
294 # FILE DRIVER = $(NAMED_GUID) {
295 # DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
296 # COMPRESS PI_STD {
297 # GUIDED {
298 # PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
299 # UI STRING="$(MODULE_NAME)" Optional
300 # VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
301 # }
302 # }
303 # }
304 #
305 ############################################################################
306
307 [Rule.Common.SEC]
308 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
309 TE TE Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi
310 }
311
312 [Rule.Common.PEI_CORE]
313 FILE PEI_CORE = $(NAMED_GUID) {
314 TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
315 UI STRING ="$(MODULE_NAME)" Optional
316 }
317
318 [Rule.Common.PEIM]
319 FILE PEIM = $(NAMED_GUID) {
320 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
321 TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
322 UI STRING="$(MODULE_NAME)" Optional
323 }
324
325 [Rule.Common.PEIM.TIANOCOMPRESSED]
326 FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
327 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
328 GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
329 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
330 UI STRING="$(MODULE_NAME)" Optional
331 }
332 }
333
334 [Rule.Common.DXE_CORE]
335 FILE DXE_CORE = $(NAMED_GUID) {
336 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
337 UI STRING="$(MODULE_NAME)" Optional
338 }
339
340 [Rule.Common.UEFI_DRIVER]
341 FILE DRIVER = $(NAMED_GUID) {
342 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
343 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
344 UI STRING="$(MODULE_NAME)" Optional
345 }
346
347 [Rule.Common.DXE_DRIVER]
348 FILE DRIVER = $(NAMED_GUID) {
349 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
350 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
351 UI STRING="$(MODULE_NAME)" Optional
352 }
353
354 [Rule.Common.DXE_RUNTIME_DRIVER]
355 FILE DRIVER = $(NAMED_GUID) {
356 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
357 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
358 UI STRING="$(MODULE_NAME)" Optional
359 }
360
361 [Rule.Common.UEFI_APPLICATION]
362 FILE APPLICATION = $(NAMED_GUID) {
363 UI STRING ="$(MODULE_NAME)" Optional
364 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
365 }
366
367 [Rule.Common.UEFI_DRIVER.BINARY]
368 FILE DRIVER = $(NAMED_GUID) {
369 DXE_DEPEX DXE_DEPEX Optional |.depex
370 PE32 PE32 |.efi
371 UI STRING="$(MODULE_NAME)" Optional
372 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
373 }
374
375 [Rule.Common.UEFI_APPLICATION.BINARY]
376 FILE APPLICATION = $(NAMED_GUID) {
377 PE32 PE32 |.efi
378 UI STRING="$(MODULE_NAME)" Optional
379 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
380 }