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1 /** @file
2 * Header defining Versatile Express constants (Base addresses, sizes, flags)
3 *
4 * Copyright (c) 2011, ARM Limited. All rights reserved.
5 *
6 * This program and the accompanying materials
7 * are licensed and made available under the terms and conditions of the BSD License
8 * which accompanies this distribution. The full text of the license may be found at
9 * http://opensource.org/licenses/bsd-license.php
10 *
11 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 *
14 **/
15
16 #ifndef __VEXPRESSMOTHERBOARD_H_
17 #define __VEXPRESSMOTHERBOARD_H_
18
19 #include <ArmPlatform.h>
20
21 /***********************************************************************************
22 // Motherboard memory-mapped peripherals
23 ************************************************************************************/
24
25 // Define MotherBoard SYS flags offsets (from ARM_VE_BOARD_PERIPH_BASE)
26 #define ARM_VE_SYS_LED_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00008)
27 #define ARM_VE_SYS_FLAGS_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00030)
28 #define ARM_VE_SYS_FLAGS_SET_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00030)
29 #define ARM_VE_SYS_FLAGS_CLR_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00034)
30 #define ARM_VE_SYS_FLAGS_NV_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00038)
31 #define ARM_VE_SYS_FLAGS_NV_SET_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00038)
32 #define ARM_VE_SYS_FLAGS_NV_CLR_REG (ARM_VE_BOARD_PERIPH_BASE + 0x0003C)
33 #define ARM_VE_SYS_FLASH (ARM_VE_BOARD_PERIPH_BASE + 0x0004C)
34 #define ARM_VE_SYS_PROCID0_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00084)
35 #define ARM_VE_SYS_PROCID1_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00088)
36 #define ARM_VE_SYS_CFGDATA_REG (ARM_VE_BOARD_PERIPH_BASE + 0x000A0)
37 #define ARM_VE_SYS_CFGCTRL_REG (ARM_VE_BOARD_PERIPH_BASE + 0x000A4)
38 #define ARM_VE_SYS_CFGSTAT_REG (ARM_VE_BOARD_PERIPH_BASE + 0x000A8)
39
40 // SP810 Controller
41 #define SP810_CTRL_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x01000)
42
43 // Uart0
44 #define PL011_CONSOLE_UART_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x09000)
45
46 // SP805 Watchdog on motherboard
47 #define SP805_WDOG_MOTHERBOARD_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x0F000)
48
49 // SP804 Timer Bases
50 #define SP804_TIMER0_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x11000)
51 #define SP804_TIMER1_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x11020)
52 #define SP804_TIMER2_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x12000)
53 #define SP804_TIMER3_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x12020)
54
55 // PL031 Real Time Clock
56 #define PL031_RTC_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x17000)
57
58 // PL111 Colour LCD Controller - motherboard
59 #define PL111_CLCD_MOTHERBOARD_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x1F000)
60 #define PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID 1
61
62 // VRAM offset for the PL111 Colour LCD Controller on the motherboard
63 #define VRAM_MOTHERBOARD_BASE (ARM_VE_SMB_PERIPH_BASE + 0x00000)
64
65 #define SYS_PROC_ID_UNSUPPORTED 0xFF
66 #define SYS_PROC_ID_CORTEX_A9 0x0C
67
68 //
69 // Sites where the peripheral is fitted
70 //
71 #define ARM_VE_UNSUPPORTED ~0
72 #define ARM_VE_MOTHERBOARD_SITE 0
73 #define ARM_VE_DAUGHTERBOARD_1_SITE 1
74 #define ARM_VE_DAUGHTERBOARD_2_SITE 2
75
76 #endif /* VEXPRESSMOTHERBOARD_H_ */