ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Boot.S

   1 //
   2 //  Copyright (c) 2011, ARM Limited. All rights reserved.
   3 //
   4 //  This program and the accompanying materials
   5 //  are licensed and made available under the terms and conditions of the BSD License
   6 //  which accompanies this distribution.  The full text of the license may be found at
   7 //  http://opensource.org/licenses/bsd-license.php
   8 //
   9 //  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 //  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 //
  12 //
  13
  14 #include <AsmMacroIoLib.h>
  15 #include <Base.h>
  16 #include <Library/ArmPlatformLib.h>
  17 #include <Drivers/PL35xSmc.h>
  18 #include <ArmPlatform.h>
  19 #include <AutoGen.h>
  20
  21 .text
  22 .align 3
  23
  24 GCC_ASM_EXPORT(ArmPlatformSecBootAction)
  25 GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)
  26 GCC_ASM_IMPORT(PL35xSmcInitialize)
  27
  28 //
  29 // For each Chip Select: ChipSelect / SetCycle / SetOpMode
  30 //
  31 VersatileExpressSmcConfiguration:
  32     // NOR Flash 0
  33     .word     PL350_SMC_DIRECT_CMD_ADDR_CS(0)
  34     .word     PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) | PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) | PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) | PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) | PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
  35     .word     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_ADV
  36
  37     // NOR Flash 1
  38     .word     PL350_SMC_DIRECT_CMD_ADDR_CS(4)
  39     .word     PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) | PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) | PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) | PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) | PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
  40     .word     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_ADV
  41
  42     // SRAM
  43     .word     PL350_SMC_DIRECT_CMD_ADDR_CS(2)
  44     .word     PL350_SMC_SET_CYCLE_SRAM_T_RC(0x8) | PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) | PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_WP(0x6) | PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
  45     .word     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_ADV
  46
  47     // Usb/Eth/VRAM
  48     .word     PL350_SMC_DIRECT_CMD_ADDR_CS(3)
  49     .word     PL350_SMC_SET_CYCLE_SRAM_T_RC(0xA) | PL350_SMC_SET_CYCLE_SRAM_T_WC(0xA) | PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x2) | PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) | PL350_SMC_SET_CYCLE_SRAM_T_PC(0x3) | PL350_SMC_SET_CYCLE_SRAM_T_TR(0x6)
  50     .word     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC
  51
  52     // Memory Mapped Peripherals
  53     .word     PL350_SMC_DIRECT_CMD_ADDR_CS(7)
  54     .word     PL350_SMC_SET_CYCLE_SRAM_T_RC(0x6) | PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) | PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) | PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
  55     .word     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC
  56
  57     // VRAM
  58     .word     PL350_SMC_DIRECT_CMD_ADDR_CS(1)
  59     .word     0x00049249
  60     .word     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC
  61 VersatileExpressSmcConfigurationEnd:
  62
  63 /**
  64   Call at the beginning of the platform boot up
  65
  66   This function allows the firmware platform to do extra actions at the early
  67   stage of the platform power up.
  68
  69   Note: This function must be implemented in assembler as there is no stack set up yet
  70
  71 **/
  72 ASM_PFX(ArmPlatformSecBootAction):
  73   bx    lr
  74
  75 /**
  76   Initialize the memory where the initial stacks will reside
  77
  78   This memory can contain the initial stacks (Secure and Secure Monitor stacks).
  79   In some platform, this region is already initialized and the implementation of this function can
  80   do nothing. This memory can also represent the Secure RAM.
  81   This function is called before the satck has been set up. Its implementation must ensure the stack
  82   pointer is not used (probably required to use assembly language)
  83
  84 **/
  85 ASM_PFX(ArmPlatformInitializeBootMemory):
  86   mov   r5, lr
  87
  88   //
  89   // Initialize PL354 SMC
  90   //
  91   LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
  92   LoadConstantToReg (VersatileExpressSmcConfiguration, r2)
  93   LoadConstantToReg (VersatileExpressSmcConfigurationEnd, r3)
  94   blx   ASM_PFX(PL35xSmcInitialize)
  95
  96   //
  97   // Page mode setup for VRAM
  98   //
  99   LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
 100
 101   // Read current state
 102   ldr     r0, [r2, #0]
 103   ldr     r0, [r2, #0]
 104   ldr     r0, = 0x00000000
 105   str     r0, [r2, #0]
 106   ldr     r0, [r2, #0]
 107
 108   // Enable page mode
 109   ldr     r0, [r2, #0]
 110   ldr     r0, [r2, #0]
 111   ldr     r0, = 0x00000000
 112   str     r0, [r2, #0]
 113   LoadConstantToReg (0x00900090, r0)
 114   str     r0, [r2, #0]
 115
 116   // Confirm page mode enabled
 117   ldr     r0, [r2, #0]
 118   ldr     r0, [r2, #0]
 119   ldr     r0, = 0x00000000
 120   str     r0, [r2, #0]
 121   ldr     r0, [r2, #0]
 122
 123   bx    r5