ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Boot.asm

   1 //
   2 //  Copyright (c) 2011, ARM Limited. All rights reserved.
   3 //
   4 //  This program and the accompanying materials
   5 //  are licensed and made available under the terms and conditions of the BSD License
   6 //  which accompanies this distribution.  The full text of the license may be found at
   7 //  http://opensource.org/licenses/bsd-license.php
   8 //
   9 //  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 //  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 //
  12 //
  13
  14 #include <AsmMacroIoLib.h>
  15 #include <Base.h>
  16 #include <Library/ArmPlatformLib.h>
  17 #include <Drivers/PL35xSmc.h>
  18 #include <ArmPlatform.h>
  19 #include <AutoGen.h>
  20
  21   INCLUDE AsmMacroIoLib.inc
  22
  23   EXPORT  ArmPlatformSecBootAction
  24   EXPORT  ArmPlatformInitializeBootMemory
  25   IMPORT  PL35xSmcInitialize
  26
  27   PRESERVE8
  28   AREA    CTA9x4BootMode, CODE, READONLY
  29
  30 //
  31 // For each Chip Select: ChipSelect / SetCycle / SetOpMode
  32 //
  33 VersatileExpressSmcConfiguration
  34     // NOR Flash 0
  35     DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(0)
  36     DCD     PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
  37     DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV
  38
  39     // NOR Flash 1
  40     DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(4)
  41     DCD     PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
  42     DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV
  43
  44     // SRAM
  45     DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(2)
  46     DCD     PL350_SMC_SET_CYCLE_SRAM_T_RC(0x8) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
  47     DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_ADV
  48
  49     // Usb/Eth/VRAM
  50     DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(3)
  51     DCD     PL350_SMC_SET_CYCLE_SRAM_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x3) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x6)
  52     DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
  53
  54     // Memory Mapped Peripherals
  55     DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(7)
  56     DCD     PL350_SMC_SET_CYCLE_SRAM_T_RC(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
  57     DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
  58
  59     // VRAM
  60     DCD     PL350_SMC_DIRECT_CMD_ADDR_CS(1)
  61     DCD     0x00049249
  62     DCD     PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
  63 VersatileExpressSmcConfigurationEnd
  64
  65 /**
  66   Call at the beginning of the platform boot up
  67
  68   This function allows the firmware platform to do extra actions at the early
  69   stage of the platform power up.
  70
  71   Note: This function must be implemented in assembler as there is no stack set up yet
  72
  73 **/
  74 ArmPlatformSecBootAction
  75   bx  lr
  76
  77 /**
  78   Initialize the memory where the initial stacks will reside
  79
  80   This memory can contain the initial stacks (Secure and Secure Monitor stacks).
  81   In some platform, this region is already initialized and the implementation of this function can
  82   do nothing. This memory can also represent the Secure RAM.
  83   This function is called before the satck has been set up. Its implementation must ensure the stack
  84   pointer is not used (probably required to use assembly language)
  85
  86 **/
  87 ArmPlatformInitializeBootMemory
  88   mov   r5, lr
  89
  90   //
  91   // Initialize PL354 SMC
  92   //
  93   LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
  94   ldr   r2, =VersatileExpressSmcConfiguration
  95   ldr   r3, =VersatileExpressSmcConfigurationEnd
  96   blx   PL35xSmcInitialize
  97
  98   //
  99   // Page mode setup for VRAM
 100   //
 101   LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
 102
 103   // Read current state
 104   ldr     r0, [r2, #0]
 105   ldr     r0, [r2, #0]
 106   ldr     r0, = 0x00000000
 107   str     r0, [r2, #0]
 108   ldr     r0, [r2, #0]
 109
 110   // Enable page mode
 111   ldr     r0, [r2, #0]
 112   ldr     r0, [r2, #0]
 113   ldr     r0, = 0x00000000
 114   str     r0, [r2, #0]
 115   ldr     r0, = 0x00900090
 116   str     r0, [r2, #0]
 117
 118   // Confirm page mode enabled
 119   ldr     r0, [r2, #0]
 120   ldr     r0, [r2, #0]
 121   ldr     r0, = 0x00000000
 122   str     r0, [r2, #0]
 123   ldr     r0, [r2, #0]
 124
 125   bx    r5