ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c

   1 /** @file
   2 *
   3 *  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
   4 *
   5 *  This program and the accompanying materials
   6 *  are licensed and made available under the terms and conditions of the BSD License
   7 *  which accompanies this distribution.  The full text of the license may be found at
   8 *  http://opensource.org/licenses/bsd-license.php
   9 *
  10 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 *
  13 **/
  14
  15 #include <Library/IoLib.h>
  16 #include <Library/ArmPlatformLib.h>
  17 #include <Library/DebugLib.h>
  18 #include <Library/PcdLib.h>
  19
  20 #include <Ppi/ArmMpCoreInfo.h>
  21
  22 #include <ArmPlatform.h>
  23
  24 /**
  25   Return the core per cluster. The method may differ per core type
  26
  27   This function might be called from assembler before any stack is set.
  28
  29   @return   Return the core count per cluster
  30
  31 **/
  32 UINTN
  33 ArmGetCpuCountPerCluster (
  34   VOID
  35   );
  36
  37 ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
  38   {
  39     // Cluster 0, Core 0
  40     0x0, 0x0,
  41
  42     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
  43     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
  44     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
  45     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
  46     (UINT64)0xFFFFFFFF
  47   },
  48   {
  49     // Cluster 0, Core 1
  50     0x0, 0x1,
  51
  52     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
  53     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
  54     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
  55     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
  56     (UINT64)0xFFFFFFFF
  57   },
  58   {
  59     // Cluster 0, Core 2
  60     0x0, 0x2,
  61
  62     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
  63     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
  64     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
  65     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
  66     (UINT64)0xFFFFFFFF
  67   },
  68   {
  69     // Cluster 0, Core 3
  70     0x0, 0x3,
  71
  72     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
  73     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
  74     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
  75     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
  76     (UINT64)0xFFFFFFFF
  77   },
  78   {
  79     // Cluster 1, Core 0
  80     0x1, 0x0,
  81
  82     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
  83     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
  84     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
  85     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
  86     (UINT64)0xFFFFFFFF
  87   },
  88   {
  89     // Cluster 1, Core 1
  90     0x1, 0x1,
  91
  92     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
  93     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
  94     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
  95     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
  96     (UINT64)0xFFFFFFFF
  97   },
  98   {
  99     // Cluster 1, Core 2
 100     0x1, 0x2,
 101
 102     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
 103     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
 104     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
 105     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
 106     (UINT64)0xFFFFFFFF
 107   },
 108   {
 109     // Cluster 1, Core 3
 110     0x1, 0x3,
 111
 112     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
 113     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
 114     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
 115     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
 116     (UINT64)0xFFFFFFFF
 117   }
 118 };
 119
 120 /**
 121   Return the current Boot Mode
 122
 123   This function returns the boot reason on the platform
 124
 125   @return   Return the current Boot Mode of the platform
 126
 127 **/
 128 EFI_BOOT_MODE
 129 ArmPlatformGetBootMode (
 130   VOID
 131   )
 132 {
 133   return BOOT_WITH_FULL_CONFIGURATION;
 134 }
 135
 136 /**
 137   Initialize controllers that must setup in the normal world
 138
 139   This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
 140   in the PEI phase.
 141
 142 **/
 143 RETURN_STATUS
 144 ArmPlatformInitialize (
 145   IN  UINTN                     MpId
 146   )
 147 {
 148   if (!ArmPlatformIsPrimaryCore (MpId)) {
 149     return RETURN_SUCCESS;
 150   }
 151
 152   // Disable memory remapping and return to normal mapping
 153   MmioOr32 (SP810_CTRL_BASE, BIT8);
 154
 155   return RETURN_SUCCESS;
 156 }
 157
 158 EFI_STATUS
 159 PrePeiCoreGetMpCoreInfo (
 160   OUT UINTN                   *CoreCount,
 161   OUT ARM_CORE_INFO           **ArmCoreTable
 162   )
 163 {
 164   UINT32   ProcType;
 165
 166   ProcType = MmioRead32 (ARM_VE_SYS_PROCID0_REG) & ARM_VE_SYS_PROC_ID_MASK;
 167   if ((ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A9) || (ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A15)) {
 168     // Only support one cluster on all but ARMv8 FVP platform. FVP still uses CortexA9 ID.
 169     *CoreCount    = ArmGetCpuCountPerCluster ();
 170     *ArmCoreTable = mVersatileExpressMpCoreInfoTable;
 171     return EFI_SUCCESS;
 172   } else {
 173     return EFI_UNSUPPORTED;
 174   }
 175 }
 176
 177 ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
 178
 179 EFI_PEI_PPI_DESCRIPTOR      gPlatformPpiTable[] = {
 180   {
 181     EFI_PEI_PPI_DESCRIPTOR_PPI,
 182     &gArmMpCoreInfoPpiGuid,
 183     &mMpCoreInfoPpi
 184   }
 185 };
 186
 187 VOID
 188 ArmPlatformGetPlatformPpiList (
 189   OUT UINTN                   *PpiListSize,
 190   OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
 191   )
 192 {
 193   *PpiListSize = sizeof(gPlatformPpiTable);
 194   *PpiList = gPlatformPpiTable;
 195 }