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1 //
2 // Copyright (c) 2011-2012, ARM Limited. All rights reserved.
3 //
4 // This program and the accompanying materials
5 // are licensed and made available under the terms and conditions of the BSD License
6 // which accompanies this distribution. The full text of the license may be found at
7 // http://opensource.org/licenses/bsd-license.php
8 //
9 // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11 //
12 //
13
14 #include <AsmMacroIoLib.h>
15 #include <Library/ArmPlatformLib.h>
16 #include <Drivers/PL35xSmc.h>
17 #include <ArmPlatform.h>
18
19 //
20 // For each Chip Select: ChipSelect / SetCycle / SetOpMode
21 //
22 VersatileExpressSmcConfiguration:
23 // NOR Flash 0
24 .word PL350_SMC_DIRECT_CMD_ADDR_CS(0)
25 .word PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) | PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) | PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) | PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) | PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
26 .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_ADV
27
28 // NOR Flash 1
29 .word PL350_SMC_DIRECT_CMD_ADDR_CS(4)
30 .word PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) | PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) | PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) | PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) | PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
31 .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT | PL350_SMC_SET_OPMODE_SET_ADV
32
33 // SRAM
34 .word PL350_SMC_DIRECT_CMD_ADDR_CS(2)
35 .word PL350_SMC_SET_CYCLE_SRAM_T_RC(0x8) | PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) | PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_WP(0x6) | PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
36 .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_ADV
37
38 // Usb/Eth/VRAM
39 .word PL350_SMC_DIRECT_CMD_ADDR_CS(3)
40 .word PL350_SMC_SET_CYCLE_SRAM_T_RC(0xA) | PL350_SMC_SET_CYCLE_SRAM_T_WC(0xA) | PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x2) | PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) | PL350_SMC_SET_CYCLE_SRAM_T_PC(0x3) | PL350_SMC_SET_CYCLE_SRAM_T_TR(0x6)
41 .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC
42
43 // Memory Mapped Peripherals
44 .word PL350_SMC_DIRECT_CMD_ADDR_CS(7)
45 .word PL350_SMC_SET_CYCLE_SRAM_T_RC(0x6) | PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) | PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) | PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) | PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
46 .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC
47
48 // VRAM
49 .word PL350_SMC_DIRECT_CMD_ADDR_CS(1)
50 .word 0x00049249
51 .word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC
52 VersatileExpressSmcConfigurationEnd:
53
54 /**
55 Call at the beginning of the platform boot up
56
57 This function allows the firmware platform to do extra actions at the early
58 stage of the platform power up.
59
60 Note: This function must be implemented in assembler as there is no stack set up yet
61
62 **/
63 ASM_FUNC(ArmPlatformSecBootAction)
64 bx lr
65
66 /**
67 Initialize the memory where the initial stacks will reside
68
69 This memory can contain the initial stacks (Secure and Secure Monitor stacks).
70 In some platform, this region is already initialized and the implementation of this function can
71 do nothing. This memory can also represent the Secure RAM.
72 This function is called before the satck has been set up. Its implementation must ensure the stack
73 pointer is not used (probably required to use assembly language)
74
75 **/
76 ASM_FUNC(ArmPlatformSecBootMemoryInit)
77 mov r5, lr
78
79 //
80 // Initialize PL354 SMC
81 //
82 MOV32 (r1, ARM_VE_SMC_CTRL_BASE)
83 MOV32 (r2, VersatileExpressSmcConfiguration)
84 MOV32 (r3, VersatileExpressSmcConfigurationEnd)
85 blx ASM_PFX(PL35xSmcInitialize)
86
87 //
88 // Page mode setup for VRAM
89 //
90 MOV32 (r2, VRAM_MOTHERBOARD_BASE)
91
92 // Read current state
93 ldr r0, [r2, #0]
94 ldr r0, [r2, #0]
95 ldr r0, = 0x00000000
96 str r0, [r2, #0]
97 ldr r0, [r2, #0]
98
99 // Enable page mode
100 ldr r0, [r2, #0]
101 ldr r0, [r2, #0]
102 ldr r0, = 0x00000000
103 str r0, [r2, #0]
104 ldr r0, = 0x00900090
105 str r0, [r2, #0]
106
107 // Confirm page mode enabled
108 ldr r0, [r2, #0]
109 ldr r0, [r2, #0]
110 ldr r0, = 0x00000000
111 str r0, [r2, #0]
112 ldr r0, [r2, #0]
113
114 bx r5