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1 /** @file
2 Serial I/O Port library functions with base address discovered from FDT
3
4 Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
5 Copyright (c) 2012 - 2013, ARM Ltd. All rights reserved.<BR>
6 Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
7
8 This program and the accompanying materials
9 are licensed and made available under the terms and conditions of the BSD License
10 which accompanies this distribution. The full text of the license may be found at
11 http://opensource.org/licenses/bsd-license.php
12
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15
16 **/
17
18 #include <Base.h>
19
20 #include <Library/PcdLib.h>
21 #include <Library/SerialPortLib.h>
22 #include <Library/SerialPortExtLib.h>
23 #include <libfdt.h>
24
25 #include <Drivers/PL011Uart.h>
26
27 RETURN_STATUS
28 EFIAPI
29 SerialPortInitialize (
30 VOID
31 )
32 {
33 //
34 // This SerialPortInitialize() function is completely empty, for a number of
35 // reasons:
36 // - if we are executing from flash, it is hard to keep state (i.e., store the
37 // discovered base address in a global), and the most robust way to deal
38 // with this is to discover the base address at every Write ();
39 // - calls to the Write() function in this module may be issued before this
40 // initialization function is called: this is not a problem when the base
41 // address of the UART is hardcoded, and only the baud rate may be wrong,
42 // but if we don't know the base address yet, we may be poking into memory
43 // that does not tolerate being poked into;
44 // - SEC and PEI phases produce debug output only, so with debug disabled, no
45 // initialization (or device tree parsing) is performed at all.
46 //
47 // Note that this means that on *every* Write () call, the device tree will be
48 // parsed and the UART re-initialized. However, this is a small price to pay
49 // for having serial debug output on a UART with no fixed base address.
50 //
51 return RETURN_SUCCESS;
52 }
53
54 STATIC
55 UINT64
56 SerialPortGetBaseAddress (
57 VOID
58 )
59 {
60 UINT64 BaudRate;
61 UINT32 ReceiveFifoDepth;
62 EFI_PARITY_TYPE Parity;
63 UINT8 DataBits;
64 EFI_STOP_BITS_TYPE StopBits;
65 VOID *DeviceTreeBase;
66 INT32 Node, Prev;
67 INT32 Len;
68 CONST CHAR8 *Compatible;
69 CONST CHAR8 *CompatibleItem;
70 CONST UINT64 *RegProperty;
71 UINTN UartBase;
72 RETURN_STATUS Status;
73
74 DeviceTreeBase = (VOID *)(UINTN)FixedPcdGet64 (PcdDeviceTreeInitialBaseAddress);
75
76 if ((DeviceTreeBase == NULL) || (fdt_check_header (DeviceTreeBase) != 0)) {
77 return 0;
78 }
79
80 //
81 // Enumerate all FDT nodes looking for a PL011 and capture its base address
82 //
83 for (Prev = 0;; Prev = Node) {
84 Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
85 if (Node < 0) {
86 break;
87 }
88
89 Compatible = fdt_getprop (DeviceTreeBase, Node, "compatible", &Len);
90 if (Compatible == NULL) {
91 continue;
92 }
93
94 //
95 // Iterate over the NULL-separated items in the compatible string
96 //
97 for (CompatibleItem = Compatible; CompatibleItem < Compatible + Len;
98 CompatibleItem += 1 + AsciiStrLen (CompatibleItem)) {
99
100 if (AsciiStrCmp (CompatibleItem, "arm,pl011") == 0) {
101 RegProperty = fdt_getprop (DeviceTreeBase, Node, "reg", &Len);
102 if (Len != 16) {
103 return 0;
104 }
105 UartBase = (UINTN)fdt64_to_cpu (ReadUnaligned64 (RegProperty));
106
107 BaudRate = (UINTN)FixedPcdGet64 (PcdUartDefaultBaudRate);
108 ReceiveFifoDepth = 0; // Use the default value for Fifo depth
109 Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity);
110 DataBits = FixedPcdGet8 (PcdUartDefaultDataBits);
111 StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits);
112
113 Status = PL011UartInitializePort (
114 UartBase,
115 &BaudRate, &ReceiveFifoDepth, &Parity, &DataBits, &StopBits);
116 if (!EFI_ERROR (Status)) {
117 return UartBase;
118 }
119 }
120 }
121 }
122 return 0;
123 }
124
125 /**
126 Write data to serial device.
127
128 @param Buffer Point of data buffer which need to be written.
129 @param NumberOfBytes Number of output bytes which are cached in Buffer.
130
131 @retval 0 Write data failed.
132 @retval !0 Actual number of bytes written to serial device.
133
134 **/
135 UINTN
136 EFIAPI
137 SerialPortWrite (
138 IN UINT8 *Buffer,
139 IN UINTN NumberOfBytes
140 )
141 {
142 UINT64 SerialRegisterBase;
143
144 SerialRegisterBase = SerialPortGetBaseAddress ();
145 if (SerialRegisterBase != 0) {
146 return PL011UartWrite ((UINTN)SerialRegisterBase, Buffer, NumberOfBytes);
147 }
148 return 0;
149 }
150
151 /**
152 Read data from serial device and save the data in buffer.
153
154 @param Buffer Point of data buffer which need to be written.
155 @param NumberOfBytes Size of Buffer[].
156
157 @retval 0 Read data failed.
158 @retval !0 Actual number of bytes read from serial device.
159
160 **/
161 UINTN
162 EFIAPI
163 SerialPortRead (
164 OUT UINT8 *Buffer,
165 IN UINTN NumberOfBytes
166 )
167 {
168 return 0;
169 }
170
171 /**
172 Check to see if any data is available to be read from the debug device.
173
174 @retval TRUE At least one byte of data is available to be read
175 @retval FALSE No data is available to be read
176
177 **/
178 BOOLEAN
179 EFIAPI
180 SerialPortPoll (
181 VOID
182 )
183 {
184 return FALSE;
185 }