ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/HdLcd.c

   1 /** @file  Lcd.c
   2
   3   Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
   4
   5   This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #include <Library/DebugLib.h>
  16 #include <Library/IoLib.h>
  17 #include <Library/LcdPlatformLib.h>
  18 #include <Library/MemoryAllocationLib.h>
  19 #include <Library/PcdLib.h>
  20
  21 #include "HdLcd.h"
  22 #include "LcdGraphicsOutputDxe.h"
  23
  24 /**********************************************************************
  25  *
  26  *  This file contains all the bits of the Lcd that are
  27  *  platform independent.
  28  *
  29  **********************************************************************/
  30
  31 EFI_STATUS
  32 LcdInitialize (
  33   IN EFI_PHYSICAL_ADDRESS   VramBaseAddress
  34   )
  35 {
  36   // Disable the controller
  37   MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE);
  38
  39   // Disable all interrupts
  40   MmioWrite32(HDLCD_REG_INT_MASK, 0);
  41
  42   // Define start of the VRAM. This never changes for any graphics mode
  43   MmioWrite32(HDLCD_REG_FB_BASE, (UINT32) VramBaseAddress);
  44
  45   // Setup various registers that never change
  46   MmioWrite32(HDLCD_REG_BUS_OPTIONS,  (4 << 8) | HDLCD_BURST_8);
  47   MmioWrite32(HDLCD_REG_POLARITIES,   HDLCD_PXCLK_LOW | HDLCD_DATA_HIGH | HDLCD_DATEN_HIGH | HDLCD_HSYNC_LOW | HDLCD_VSYNC_HIGH);
  48   MmioWrite32(HDLCD_REG_PIXEL_FORMAT, HDLCD_LITTLE_ENDIAN | HDLCD_4BYTES_PER_PIXEL);
  49   MmioWrite32(HDLCD_REG_RED_SELECT,   (0 << 16 | 8 << 8 |  0));
  50   MmioWrite32(HDLCD_REG_GREEN_SELECT, (0 << 16 | 8 << 8 |  8));
  51   MmioWrite32(HDLCD_REG_BLUE_SELECT,  (0 << 16 | 8 << 8 | 16));
  52
  53   return EFI_SUCCESS;
  54 }
  55
  56 EFI_STATUS
  57 LcdSetMode (
  58   IN UINT32  ModeNumber
  59   )
  60 {
  61   EFI_STATUS        Status;
  62   UINT32            HRes;
  63   UINT32            HSync;
  64   UINT32            HBackPorch;
  65   UINT32            HFrontPorch;
  66   UINT32            VRes;
  67   UINT32            VSync;
  68   UINT32            VBackPorch;
  69   UINT32            VFrontPorch;
  70   UINT32            BytesPerPixel;
  71   LCD_BPP           LcdBpp;
  72
  73
  74   // Set the video mode timings and other relevant information
  75   Status = LcdPlatformGetTimings (ModeNumber,
  76                                   &HRes,&HSync,&HBackPorch,&HFrontPorch,
  77                                   &VRes,&VSync,&VBackPorch,&VFrontPorch);
  78   ASSERT_EFI_ERROR (Status);
  79   if (EFI_ERROR( Status )) {
  80     return EFI_DEVICE_ERROR;
  81   }
  82
  83   Status = LcdPlatformGetBpp (ModeNumber,&LcdBpp);
  84   ASSERT_EFI_ERROR (Status);
  85   if (EFI_ERROR( Status )) {
  86     return EFI_DEVICE_ERROR;
  87   }
  88
  89   BytesPerPixel = GetBytesPerPixel(LcdBpp);
  90
  91   // Disable the controller
  92   MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE);
  93
  94   // Update the frame buffer information with the new settings
  95   MmioWrite32(HDLCD_REG_FB_LINE_LENGTH, HRes * BytesPerPixel);
  96   MmioWrite32(HDLCD_REG_FB_LINE_PITCH,  HRes * BytesPerPixel);
  97   MmioWrite32(HDLCD_REG_FB_LINE_COUNT,  VRes - 1);
  98
  99   // Set the vertical timing information
 100   MmioWrite32(HDLCD_REG_V_SYNC,         VSync);
 101   MmioWrite32(HDLCD_REG_V_BACK_PORCH,   VBackPorch);
 102   MmioWrite32(HDLCD_REG_V_DATA,         VRes - 1);
 103   MmioWrite32(HDLCD_REG_V_FRONT_PORCH,  VFrontPorch);
 104
 105   // Set the horizontal timing information
 106   MmioWrite32(HDLCD_REG_H_SYNC,         HSync);
 107   MmioWrite32(HDLCD_REG_H_BACK_PORCH,   HBackPorch);
 108   MmioWrite32(HDLCD_REG_H_DATA,         HRes - 1);
 109   MmioWrite32(HDLCD_REG_H_FRONT_PORCH,  HFrontPorch);
 110
 111   // Enable the controller
 112   MmioWrite32(HDLCD_REG_COMMAND, HDLCD_ENABLE);
 113
 114   return EFI_SUCCESS;
 115 }
 116
 117 VOID
 118 LcdShutdown (
 119   VOID
 120   )
 121 {
 122   // Disable the controller
 123   MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);
 124 }
 125
 126 EFI_STATUS
 127 LcdIdentify (
 128   VOID
 129   )
 130 {
 131   return EFI_SUCCESS;
 132 }