ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111Lcd.c

   1 /** @file  PL111Lcd.c
   2
   3   Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
   4   This program and the accompanying materials
   5   are licensed and made available under the terms and conditions of the BSD License
   6   which accompanies this distribution.  The full text of the license may be found at
   7   http://opensource.org/licenses/bsd-license.php
   8
   9   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 **/
  13
  14 #include <Library/DebugLib.h>
  15 #include <Library/IoLib.h>
  16 #include <Library/LcdPlatformLib.h>
  17 #include <Library/MemoryAllocationLib.h>
  18 #include <Library/PcdLib.h>
  19
  20 #include <Drivers/PL111Lcd.h>
  21
  22 #include "LcdGraphicsOutputDxe.h"
  23
  24 /**********************************************************************
  25  *
  26  *  This file contains all the bits of the PL111 that are
  27  *  platform independent.
  28  *
  29  **********************************************************************/
  30
  31 EFI_STATUS
  32 PL111Indentify (
  33   VOID
  34   )
  35 {
  36   // Check if this is a PrimeCell Peripheral
  37   if (    ( MmioRead8( PL111_REG_CLCD_P_CELL_ID_0 ) != 0x0D )
  38        || ( MmioRead8( PL111_REG_CLCD_P_CELL_ID_1 ) != 0xF0 )
  39        || ( MmioRead8( PL111_REG_CLCD_P_CELL_ID_2 ) != 0x05 )
  40        || ( MmioRead8( PL111_REG_CLCD_P_CELL_ID_3 ) != 0xB1 ) ) {
  41     return EFI_NOT_FOUND;
  42   }
  43
  44   // Check if this PrimeCell Peripheral is the PL111 LCD
  45   if (    ( MmioRead8( PL111_REG_CLCD_PERIPH_ID_0 ) != 0x11 )
  46        || ( MmioRead8( PL111_REG_CLCD_PERIPH_ID_1 ) != 0x11 )
  47        || ( (MmioRead8( PL111_REG_CLCD_PERIPH_ID_2 ) & 0xF) != 0x04 )
  48        || ( MmioRead8( PL111_REG_CLCD_PERIPH_ID_3 ) != 0x00 ) ) {
  49     return EFI_NOT_FOUND;
  50   }
  51
  52   return EFI_SUCCESS;
  53 }
  54
  55 EFI_STATUS
  56 LcdInitialize (
  57   IN EFI_PHYSICAL_ADDRESS   VramBaseAddress
  58   )
  59 {
  60   EFI_STATUS  Status = EFI_SUCCESS;
  61
  62   // Check if the PL111 is fitted on this motherboard
  63   Status = PL111Indentify();
  64   if (EFI_ERROR( Status )) {
  65     return EFI_DEVICE_ERROR;
  66   }
  67
  68   // Define start of the VRAM. This never changes for any graphics mode
  69   MmioWrite32(PL111_REG_LCD_UP_BASE, (UINT32) VramBaseAddress);
  70   MmioWrite32(PL111_REG_LCD_LP_BASE, 0); // We are not using a double buffer
  71
  72   // Disable all interrupts from the PL111
  73   MmioWrite32(PL111_REG_LCD_IMSC, 0);
  74
  75   return EFI_SUCCESS;
  76 }
  77
  78 EFI_STATUS
  79 LcdSetMode (
  80   IN UINT32  ModeNumber
  81   )
  82 {
  83   EFI_STATUS        Status;
  84   UINT32            HRes;
  85   UINT32            HSync;
  86   UINT32            HBackPorch;
  87   UINT32            HFrontPorch;
  88   UINT32            VRes;
  89   UINT32            VSync;
  90   UINT32            VBackPorch;
  91   UINT32            VFrontPorch;
  92   UINT32            LcdControl;
  93   LCD_BPP           LcdBpp;
  94
  95   // Set the video mode timings and other relevant information
  96   Status = LcdPlatformGetTimings (ModeNumber,
  97                                   &HRes,&HSync,&HBackPorch,&HFrontPorch,
  98                                   &VRes,&VSync,&VBackPorch,&VFrontPorch);
  99   ASSERT_EFI_ERROR (Status);
 100   if (EFI_ERROR( Status )) {
 101     return EFI_DEVICE_ERROR;
 102   }
 103
 104   Status = LcdPlatformGetBpp (ModeNumber,&LcdBpp);
 105   ASSERT_EFI_ERROR (Status);
 106   if (EFI_ERROR( Status )) {
 107     return EFI_DEVICE_ERROR;
 108   }
 109
 110   // Disable the CLCD_LcdEn bit
 111   LcdControl = MmioRead32( PL111_REG_LCD_CONTROL);
 112   MmioWrite32(PL111_REG_LCD_CONTROL,  LcdControl & ~1);
 113
 114   // Set Timings
 115   MmioWrite32 (PL111_REG_LCD_TIMING_0, HOR_AXIS_PANEL(HBackPorch, HFrontPorch, HSync, HRes));
 116   MmioWrite32 (PL111_REG_LCD_TIMING_1, VER_AXIS_PANEL(VBackPorch, VFrontPorch, VSync, VRes));
 117   MmioWrite32 (PL111_REG_LCD_TIMING_2, CLK_SIG_POLARITY(HRes));
 118   MmioWrite32 (PL111_REG_LCD_TIMING_3, 0);
 119
 120   // PL111_REG_LCD_CONTROL
 121   LcdControl = PL111_CTRL_LCD_EN | PL111_CTRL_LCD_BPP(LcdBpp) | PL111_CTRL_LCD_TFT | PL111_CTRL_BGR;
 122   MmioWrite32(PL111_REG_LCD_CONTROL,  LcdControl);
 123
 124   // Turn on power to the LCD Panel
 125   LcdControl |= PL111_CTRL_LCD_PWR;
 126   MmioWrite32(PL111_REG_LCD_CONTROL,  LcdControl);
 127
 128   return EFI_SUCCESS;
 129 }
 130
 131 VOID
 132 LcdShutdown (
 133   VOID
 134   )
 135 {
 136   // Nothing to do in terms of hardware.
 137   // We could switch off the monitor display if required
 138
 139   //TODO: ImplementMe
 140 }